| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* DAG Instruction Selector for the R600 target *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | // *** NOTE: This file is #included into the middle of the target |
| 10 | // *** instruction selector class. These functions are really methods. |
| 11 | |
| 12 | // If GET_DAGISEL_DECL is #defined with any value, only function |
| 13 | // declarations will be included when this file is included. |
| 14 | // If GET_DAGISEL_BODY is #defined, its value should be the name of |
| 15 | // the instruction selector class. Function bodies will be emitted |
| 16 | // and each function's name will be qualified with the name of the |
| 17 | // class. |
| 18 | // |
| 19 | // When neither of the GET_DAGISEL* macros is defined, the functions |
| 20 | // are emitted inline. |
| 21 | |
| 22 | #if defined(GET_DAGISEL_DECL) && defined(GET_DAGISEL_BODY) |
| 23 | #error GET_DAGISEL_DECL and GET_DAGISEL_BODY cannot be both defined, undef both for inline definitions |
| 24 | #endif |
| 25 | |
| 26 | #ifdef GET_DAGISEL_BODY |
| 27 | #define LOCAL_DAGISEL_STRINGIZE(X) LOCAL_DAGISEL_STRINGIZE_(X) |
| 28 | #define LOCAL_DAGISEL_STRINGIZE_(X) #X |
| 29 | static_assert(sizeof(LOCAL_DAGISEL_STRINGIZE(GET_DAGISEL_BODY)) > 1, |
| 30 | "GET_DAGISEL_BODY is empty: it should be defined with the class name" ); |
| 31 | #undef LOCAL_DAGISEL_STRINGIZE_ |
| 32 | #undef LOCAL_DAGISEL_STRINGIZE |
| 33 | #endif |
| 34 | |
| 35 | #if !defined(GET_DAGISEL_DECL) && !defined(GET_DAGISEL_BODY) |
| 36 | #define DAGISEL_INLINE 1 |
| 37 | #else |
| 38 | #define DAGISEL_INLINE 0 |
| 39 | #endif |
| 40 | |
| 41 | #if !DAGISEL_INLINE |
| 42 | #define DAGISEL_CLASS_COLONCOLON GET_DAGISEL_BODY :: |
| 43 | #else |
| 44 | #define DAGISEL_CLASS_COLONCOLON |
| 45 | #endif |
| 46 | |
| 47 | #ifdef GET_DAGISEL_DECL |
| 48 | void SelectCode(SDNode *N); |
| 49 | #endif |
| 50 | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
| 51 | void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N) |
| 52 | { |
| 53 | // Some target values are emitted as 2 bytes, TARGET_VAL handles |
| 54 | // this. |
| 55 | #define TARGET_VAL(X) X & 255, unsigned(X) >> 8 |
| 56 | static const unsigned char MatcherTable[] = { |
| 57 | /* 0*/ OPC_SwitchOpcode /*103 cases */, 99|128,2/*355*/, TARGET_VAL(ISD::SRL),// ->360 |
| 58 | /* 5*/ OPC_Scope, 11|128,1/*139*/, /*->147*/ // 2 children in Scope |
| 59 | /* 8*/ OPC_MoveChild0, |
| 60 | /* 9*/ OPC_CheckOpcode, TARGET_VAL(ISD::SHL), |
| 61 | /* 12*/ OPC_RecordChild0, // #0 = $src |
| 62 | /* 13*/ OPC_MoveChild1, |
| 63 | /* 14*/ OPC_CheckOpcode, TARGET_VAL(ISD::SUB), |
| 64 | /* 17*/ OPC_CheckChild0Integer, 32, |
| 65 | /* 19*/ OPC_RecordChild1, // #1 = $width |
| 66 | /* 20*/ OPC_CheckType, MVT::i32, |
| 67 | /* 22*/ OPC_MoveParent, |
| 68 | /* 23*/ OPC_CheckPredicate, 0, // Predicate_shl_oneuse |
| 69 | /* 25*/ OPC_MoveParent, |
| 70 | /* 26*/ OPC_MoveChild1, |
| 71 | /* 27*/ OPC_CheckOpcode, TARGET_VAL(ISD::SUB), |
| 72 | /* 30*/ OPC_CheckChild0Integer, 32, |
| 73 | /* 32*/ OPC_CheckChild1Same, 1, |
| 74 | /* 34*/ OPC_CheckType, MVT::i32, |
| 75 | /* 36*/ OPC_MoveParent, |
| 76 | /* 37*/ OPC_CheckType, MVT::i32, |
| 77 | /* 39*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 78 | /* 41*/ OPC_EmitInteger, MVT::i32, 0, |
| 79 | /* 44*/ OPC_EmitInteger, MVT::i32, 0, |
| 80 | /* 47*/ OPC_EmitInteger, MVT::i32, 0, |
| 81 | /* 50*/ OPC_EmitInteger, MVT::i32, 0, |
| 82 | /* 53*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 83 | /* 65*/ OPC_EmitInteger, MVT::i32, 0, |
| 84 | /* 68*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 85 | MVT::i32, 1/*#Ops*/, 7, // Results = #8 |
| 86 | /* 75*/ OPC_EmitInteger, MVT::i32, 0, |
| 87 | /* 78*/ OPC_EmitInteger, MVT::i32, 0, |
| 88 | /* 81*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 89 | /* 93*/ OPC_EmitInteger, MVT::i32, 0, |
| 90 | /* 96*/ OPC_EmitInteger, MVT::i32, 0, |
| 91 | /* 99*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 92 | /* 111*/ OPC_EmitInteger, MVT::i32, 1, |
| 93 | /* 114*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 94 | /* 117*/ OPC_EmitInteger, MVT::i32, 0, |
| 95 | /* 120*/ OPC_EmitInteger, MVT::i32, 0, |
| 96 | /* 123*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_UINT_eg), 0, |
| 97 | MVT::i32, 18/*#Ops*/, 2, 3, 0, 4, 5, 6, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, |
| 98 | // Src: (srl:{ *:[i32] } (shl:{ *:[i32] } i32:{ *:[i32] }:$src, (sub:{ *:[i32] } 32:{ *:[i32] }, i32:{ *:[i32] }:$width))<<P:Predicate_shl_oneuse>>, (sub:{ *:[i32] } 32:{ *:[i32] }, i32:{ *:[i32] }:$width)) - Complexity = 23 |
| 99 | // Dst: (BFE_UINT_eg:{ *:[i32] } ?:{ *:[i32] }:$src, (MOV_IMM_I32:{ *:[i32] } 0:{ *:[i32] }), ?:{ *:[i32] }:$width) |
| 100 | /* 147*/ /*Scope*/ 82|128,1/*210*/, /*->359*/ |
| 101 | /* 149*/ OPC_RecordChild0, // #0 = $src0 |
| 102 | /* 150*/ OPC_RecordChild1, // #1 = $src1 |
| 103 | /* 151*/ OPC_CheckChild1Type, MVT::i32, |
| 104 | /* 153*/ OPC_CheckType, MVT::i32, |
| 105 | /* 155*/ OPC_Scope, 100, /*->257*/ // 2 children in Scope |
| 106 | /* 157*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 107 | /* 159*/ OPC_EmitInteger, MVT::i32, 0, |
| 108 | /* 162*/ OPC_EmitInteger, MVT::i32, 0, |
| 109 | /* 165*/ OPC_EmitInteger, MVT::i32, 1, |
| 110 | /* 168*/ OPC_EmitInteger, MVT::i32, 0, |
| 111 | /* 171*/ OPC_EmitInteger, MVT::i32, 0, |
| 112 | /* 174*/ OPC_EmitInteger, MVT::i32, 0, |
| 113 | /* 177*/ OPC_EmitInteger, MVT::i32, 0, |
| 114 | /* 180*/ OPC_EmitInteger, MVT::i32, 0, |
| 115 | /* 183*/ OPC_EmitInteger, MVT::i32, 0, |
| 116 | /* 186*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 117 | /* 198*/ OPC_EmitInteger, MVT::i32, 0, |
| 118 | /* 201*/ OPC_EmitInteger, MVT::i32, 0, |
| 119 | /* 204*/ OPC_EmitInteger, MVT::i32, 0, |
| 120 | /* 207*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 121 | /* 219*/ OPC_EmitInteger, MVT::i32, 1, |
| 122 | /* 222*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 123 | /* 225*/ OPC_EmitInteger, MVT::i32, 0, |
| 124 | /* 228*/ OPC_EmitInteger, MVT::i32, 0, |
| 125 | /* 231*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LSHR_r600), 0, |
| 126 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 127 | // Src: (srl:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 128 | // Dst: (LSHR_r600:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 129 | /* 257*/ /*Scope*/ 100, /*->358*/ |
| 130 | /* 258*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 131 | /* 260*/ OPC_EmitInteger, MVT::i32, 0, |
| 132 | /* 263*/ OPC_EmitInteger, MVT::i32, 0, |
| 133 | /* 266*/ OPC_EmitInteger, MVT::i32, 1, |
| 134 | /* 269*/ OPC_EmitInteger, MVT::i32, 0, |
| 135 | /* 272*/ OPC_EmitInteger, MVT::i32, 0, |
| 136 | /* 275*/ OPC_EmitInteger, MVT::i32, 0, |
| 137 | /* 278*/ OPC_EmitInteger, MVT::i32, 0, |
| 138 | /* 281*/ OPC_EmitInteger, MVT::i32, 0, |
| 139 | /* 284*/ OPC_EmitInteger, MVT::i32, 0, |
| 140 | /* 287*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 141 | /* 299*/ OPC_EmitInteger, MVT::i32, 0, |
| 142 | /* 302*/ OPC_EmitInteger, MVT::i32, 0, |
| 143 | /* 305*/ OPC_EmitInteger, MVT::i32, 0, |
| 144 | /* 308*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 145 | /* 320*/ OPC_EmitInteger, MVT::i32, 1, |
| 146 | /* 323*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 147 | /* 326*/ OPC_EmitInteger, MVT::i32, 0, |
| 148 | /* 329*/ OPC_EmitInteger, MVT::i32, 0, |
| 149 | /* 332*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LSHR_eg), 0, |
| 150 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 151 | // Src: (srl:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 152 | // Dst: (LSHR_eg:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 153 | /* 358*/ 0, /*End of Scope*/ |
| 154 | /* 359*/ 0, /*End of Scope*/ |
| 155 | /* 360*/ /*SwitchOpcode*/ 99|128,2/*355*/, TARGET_VAL(ISD::SRA),// ->719 |
| 156 | /* 364*/ OPC_Scope, 11|128,1/*139*/, /*->506*/ // 2 children in Scope |
| 157 | /* 367*/ OPC_MoveChild0, |
| 158 | /* 368*/ OPC_CheckOpcode, TARGET_VAL(ISD::SHL), |
| 159 | /* 371*/ OPC_RecordChild0, // #0 = $src |
| 160 | /* 372*/ OPC_MoveChild1, |
| 161 | /* 373*/ OPC_CheckOpcode, TARGET_VAL(ISD::SUB), |
| 162 | /* 376*/ OPC_CheckChild0Integer, 32, |
| 163 | /* 378*/ OPC_RecordChild1, // #1 = $width |
| 164 | /* 379*/ OPC_CheckType, MVT::i32, |
| 165 | /* 381*/ OPC_MoveParent, |
| 166 | /* 382*/ OPC_CheckPredicate, 0, // Predicate_shl_oneuse |
| 167 | /* 384*/ OPC_MoveParent, |
| 168 | /* 385*/ OPC_MoveChild1, |
| 169 | /* 386*/ OPC_CheckOpcode, TARGET_VAL(ISD::SUB), |
| 170 | /* 389*/ OPC_CheckChild0Integer, 32, |
| 171 | /* 391*/ OPC_CheckChild1Same, 1, |
| 172 | /* 393*/ OPC_CheckType, MVT::i32, |
| 173 | /* 395*/ OPC_MoveParent, |
| 174 | /* 396*/ OPC_CheckType, MVT::i32, |
| 175 | /* 398*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 176 | /* 400*/ OPC_EmitInteger, MVT::i32, 0, |
| 177 | /* 403*/ OPC_EmitInteger, MVT::i32, 0, |
| 178 | /* 406*/ OPC_EmitInteger, MVT::i32, 0, |
| 179 | /* 409*/ OPC_EmitInteger, MVT::i32, 0, |
| 180 | /* 412*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 181 | /* 424*/ OPC_EmitInteger, MVT::i32, 0, |
| 182 | /* 427*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 183 | MVT::i32, 1/*#Ops*/, 7, // Results = #8 |
| 184 | /* 434*/ OPC_EmitInteger, MVT::i32, 0, |
| 185 | /* 437*/ OPC_EmitInteger, MVT::i32, 0, |
| 186 | /* 440*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 187 | /* 452*/ OPC_EmitInteger, MVT::i32, 0, |
| 188 | /* 455*/ OPC_EmitInteger, MVT::i32, 0, |
| 189 | /* 458*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 190 | /* 470*/ OPC_EmitInteger, MVT::i32, 1, |
| 191 | /* 473*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 192 | /* 476*/ OPC_EmitInteger, MVT::i32, 0, |
| 193 | /* 479*/ OPC_EmitInteger, MVT::i32, 0, |
| 194 | /* 482*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_INT_eg), 0, |
| 195 | MVT::i32, 18/*#Ops*/, 2, 3, 0, 4, 5, 6, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, |
| 196 | // Src: (sra:{ *:[i32] } (shl:{ *:[i32] } i32:{ *:[i32] }:$src, (sub:{ *:[i32] } 32:{ *:[i32] }, i32:{ *:[i32] }:$width))<<P:Predicate_shl_oneuse>>, (sub:{ *:[i32] } 32:{ *:[i32] }, i32:{ *:[i32] }:$width)) - Complexity = 23 |
| 197 | // Dst: (BFE_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$src, (MOV_IMM_I32:{ *:[i32] } 0:{ *:[i32] }), ?:{ *:[i32] }:$width) |
| 198 | /* 506*/ /*Scope*/ 82|128,1/*210*/, /*->718*/ |
| 199 | /* 508*/ OPC_RecordChild0, // #0 = $src0 |
| 200 | /* 509*/ OPC_RecordChild1, // #1 = $src1 |
| 201 | /* 510*/ OPC_CheckChild1Type, MVT::i32, |
| 202 | /* 512*/ OPC_CheckType, MVT::i32, |
| 203 | /* 514*/ OPC_Scope, 100, /*->616*/ // 2 children in Scope |
| 204 | /* 516*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 205 | /* 518*/ OPC_EmitInteger, MVT::i32, 0, |
| 206 | /* 521*/ OPC_EmitInteger, MVT::i32, 0, |
| 207 | /* 524*/ OPC_EmitInteger, MVT::i32, 1, |
| 208 | /* 527*/ OPC_EmitInteger, MVT::i32, 0, |
| 209 | /* 530*/ OPC_EmitInteger, MVT::i32, 0, |
| 210 | /* 533*/ OPC_EmitInteger, MVT::i32, 0, |
| 211 | /* 536*/ OPC_EmitInteger, MVT::i32, 0, |
| 212 | /* 539*/ OPC_EmitInteger, MVT::i32, 0, |
| 213 | /* 542*/ OPC_EmitInteger, MVT::i32, 0, |
| 214 | /* 545*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 215 | /* 557*/ OPC_EmitInteger, MVT::i32, 0, |
| 216 | /* 560*/ OPC_EmitInteger, MVT::i32, 0, |
| 217 | /* 563*/ OPC_EmitInteger, MVT::i32, 0, |
| 218 | /* 566*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 219 | /* 578*/ OPC_EmitInteger, MVT::i32, 1, |
| 220 | /* 581*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 221 | /* 584*/ OPC_EmitInteger, MVT::i32, 0, |
| 222 | /* 587*/ OPC_EmitInteger, MVT::i32, 0, |
| 223 | /* 590*/ OPC_MorphNodeTo1, TARGET_VAL(R600::ASHR_r600), 0, |
| 224 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 225 | // Src: (sra:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 226 | // Dst: (ASHR_r600:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 227 | /* 616*/ /*Scope*/ 100, /*->717*/ |
| 228 | /* 617*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 229 | /* 619*/ OPC_EmitInteger, MVT::i32, 0, |
| 230 | /* 622*/ OPC_EmitInteger, MVT::i32, 0, |
| 231 | /* 625*/ OPC_EmitInteger, MVT::i32, 1, |
| 232 | /* 628*/ OPC_EmitInteger, MVT::i32, 0, |
| 233 | /* 631*/ OPC_EmitInteger, MVT::i32, 0, |
| 234 | /* 634*/ OPC_EmitInteger, MVT::i32, 0, |
| 235 | /* 637*/ OPC_EmitInteger, MVT::i32, 0, |
| 236 | /* 640*/ OPC_EmitInteger, MVT::i32, 0, |
| 237 | /* 643*/ OPC_EmitInteger, MVT::i32, 0, |
| 238 | /* 646*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 239 | /* 658*/ OPC_EmitInteger, MVT::i32, 0, |
| 240 | /* 661*/ OPC_EmitInteger, MVT::i32, 0, |
| 241 | /* 664*/ OPC_EmitInteger, MVT::i32, 0, |
| 242 | /* 667*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 243 | /* 679*/ OPC_EmitInteger, MVT::i32, 1, |
| 244 | /* 682*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 245 | /* 685*/ OPC_EmitInteger, MVT::i32, 0, |
| 246 | /* 688*/ OPC_EmitInteger, MVT::i32, 0, |
| 247 | /* 691*/ OPC_MorphNodeTo1, TARGET_VAL(R600::ASHR_eg), 0, |
| 248 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 249 | // Src: (sra:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 250 | // Dst: (ASHR_eg:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 251 | /* 717*/ 0, /*End of Scope*/ |
| 252 | /* 718*/ 0, /*End of Scope*/ |
| 253 | /* 719*/ /*SwitchOpcode*/ 126, TARGET_VAL(AMDGPUISD::R600_EXPORT),// ->848 |
| 254 | /* 722*/ OPC_RecordNode, // #0 = 'R600_EXPORT' chained node |
| 255 | /* 723*/ OPC_RecordChild1, // #1 = $src |
| 256 | /* 724*/ OPC_CheckChild1Type, MVT::v4f32, |
| 257 | /* 726*/ OPC_RecordChild2, // #2 = $base |
| 258 | /* 727*/ OPC_MoveChild2, |
| 259 | /* 728*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 260 | /* 731*/ OPC_CheckType, MVT::i32, |
| 261 | /* 733*/ OPC_MoveParent, |
| 262 | /* 734*/ OPC_RecordChild3, // #3 = $type |
| 263 | /* 735*/ OPC_MoveChild3, |
| 264 | /* 736*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 265 | /* 739*/ OPC_CheckType, MVT::i32, |
| 266 | /* 741*/ OPC_MoveParent, |
| 267 | /* 742*/ OPC_RecordChild4, // #4 = $swz_x |
| 268 | /* 743*/ OPC_MoveChild4, |
| 269 | /* 744*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 270 | /* 747*/ OPC_CheckType, MVT::i32, |
| 271 | /* 749*/ OPC_MoveParent, |
| 272 | /* 750*/ OPC_RecordChild5, // #5 = $swz_y |
| 273 | /* 751*/ OPC_MoveChild5, |
| 274 | /* 752*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 275 | /* 755*/ OPC_CheckType, MVT::i32, |
| 276 | /* 757*/ OPC_MoveParent, |
| 277 | /* 758*/ OPC_RecordChild6, // #6 = $swz_z |
| 278 | /* 759*/ OPC_MoveChild6, |
| 279 | /* 760*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 280 | /* 763*/ OPC_CheckType, MVT::i32, |
| 281 | /* 765*/ OPC_MoveParent, |
| 282 | /* 766*/ OPC_RecordChild7, // #7 = $swz_w |
| 283 | /* 767*/ OPC_MoveChild7, |
| 284 | /* 768*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 285 | /* 771*/ OPC_CheckType, MVT::i32, |
| 286 | /* 773*/ OPC_MoveParent, |
| 287 | /* 774*/ OPC_Scope, 35, /*->811*/ // 2 children in Scope |
| 288 | /* 776*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 289 | /* 778*/ OPC_EmitMergeInputChains1_0, |
| 290 | /* 779*/ OPC_EmitConvertToTarget, 3, |
| 291 | /* 781*/ OPC_EmitConvertToTarget, 2, |
| 292 | /* 783*/ OPC_EmitConvertToTarget, 4, |
| 293 | /* 785*/ OPC_EmitConvertToTarget, 5, |
| 294 | /* 787*/ OPC_EmitConvertToTarget, 6, |
| 295 | /* 789*/ OPC_EmitConvertToTarget, 7, |
| 296 | /* 791*/ OPC_EmitInteger, MVT::i32, 39, |
| 297 | /* 794*/ OPC_EmitInteger, MVT::i32, 0, |
| 298 | /* 797*/ OPC_MorphNodeTo0, TARGET_VAL(R600::R600_ExportSwz), 0|OPFL_Chain, |
| 299 | 9/*#Ops*/, 1, 8, 9, 10, 11, 12, 13, 14, 15, |
| 300 | // Src: (R600_EXPORT R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$base, (imm:{ *:[i32] }):$type, (imm:{ *:[i32] }):$swz_x, (imm:{ *:[i32] }):$swz_y, (imm:{ *:[i32] }):$swz_z, (imm:{ *:[i32] }):$swz_w) - Complexity = 21 |
| 301 | // Dst: (R600_ExportSwz R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$type, (imm:{ *:[i32] }):$base, (imm:{ *:[i32] }):$swz_x, (imm:{ *:[i32] }):$swz_y, (imm:{ *:[i32] }):$swz_z, (imm:{ *:[i32] }):$swz_w, 39:{ *:[i32] }, 0:{ *:[i32] }) |
| 302 | /* 811*/ /*Scope*/ 35, /*->847*/ |
| 303 | /* 812*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 304 | /* 814*/ OPC_EmitMergeInputChains1_0, |
| 305 | /* 815*/ OPC_EmitConvertToTarget, 3, |
| 306 | /* 817*/ OPC_EmitConvertToTarget, 2, |
| 307 | /* 819*/ OPC_EmitConvertToTarget, 4, |
| 308 | /* 821*/ OPC_EmitConvertToTarget, 5, |
| 309 | /* 823*/ OPC_EmitConvertToTarget, 6, |
| 310 | /* 825*/ OPC_EmitConvertToTarget, 7, |
| 311 | /* 827*/ OPC_EmitInteger, MVT::i32, 83, |
| 312 | /* 830*/ OPC_EmitInteger, MVT::i32, 0, |
| 313 | /* 833*/ OPC_MorphNodeTo0, TARGET_VAL(R600::EG_ExportSwz), 0|OPFL_Chain, |
| 314 | 9/*#Ops*/, 1, 8, 9, 10, 11, 12, 13, 14, 15, |
| 315 | // Src: (R600_EXPORT R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$base, (imm:{ *:[i32] }):$type, (imm:{ *:[i32] }):$swz_x, (imm:{ *:[i32] }):$swz_y, (imm:{ *:[i32] }):$swz_z, (imm:{ *:[i32] }):$swz_w) - Complexity = 21 |
| 316 | // Dst: (EG_ExportSwz R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$type, (imm:{ *:[i32] }):$base, (imm:{ *:[i32] }):$swz_x, (imm:{ *:[i32] }):$swz_y, (imm:{ *:[i32] }):$swz_z, (imm:{ *:[i32] }):$swz_w, 83:{ *:[i32] }, 0:{ *:[i32] }) |
| 317 | /* 847*/ 0, /*End of Scope*/ |
| 318 | /* 848*/ /*SwitchOpcode*/ 84|128,8/*1108*/, TARGET_VAL(ISD::AND),// ->1960 |
| 319 | /* 852*/ OPC_Scope, 37|128,2/*293*/, /*->1148*/ // 5 children in Scope |
| 320 | /* 855*/ OPC_RecordChild0, // #0 = $src |
| 321 | /* 856*/ OPC_MoveChild1, |
| 322 | /* 857*/ OPC_SwitchOpcode /*2 cases */, 8|128,1/*136*/, TARGET_VAL(ISD::ADD),// ->998 |
| 323 | /* 862*/ OPC_MoveChild0, |
| 324 | /* 863*/ OPC_CheckOpcode, TARGET_VAL(ISD::SHL), |
| 325 | /* 866*/ OPC_CheckChild0Integer, 1, |
| 326 | /* 868*/ OPC_RecordChild1, // #1 = $width |
| 327 | /* 869*/ OPC_CheckChild1Type, MVT::i32, |
| 328 | /* 871*/ OPC_CheckPredicate, 0, // Predicate_shl_oneuse |
| 329 | /* 873*/ OPC_MoveParent, |
| 330 | /* 874*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 331 | /* 885*/ OPC_CheckPredicate, 0, // Predicate_add_oneuse |
| 332 | /* 887*/ OPC_MoveParent, |
| 333 | /* 888*/ OPC_CheckType, MVT::i32, |
| 334 | /* 890*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 335 | /* 892*/ OPC_EmitInteger, MVT::i32, 0, |
| 336 | /* 895*/ OPC_EmitInteger, MVT::i32, 0, |
| 337 | /* 898*/ OPC_EmitInteger, MVT::i32, 0, |
| 338 | /* 901*/ OPC_EmitInteger, MVT::i32, 0, |
| 339 | /* 904*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 340 | /* 916*/ OPC_EmitInteger, MVT::i32, 0, |
| 341 | /* 919*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 342 | MVT::i32, 1/*#Ops*/, 7, // Results = #8 |
| 343 | /* 926*/ OPC_EmitInteger, MVT::i32, 0, |
| 344 | /* 929*/ OPC_EmitInteger, MVT::i32, 0, |
| 345 | /* 932*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 346 | /* 944*/ OPC_EmitInteger, MVT::i32, 0, |
| 347 | /* 947*/ OPC_EmitInteger, MVT::i32, 0, |
| 348 | /* 950*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 349 | /* 962*/ OPC_EmitInteger, MVT::i32, 1, |
| 350 | /* 965*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 351 | /* 968*/ OPC_EmitInteger, MVT::i32, 0, |
| 352 | /* 971*/ OPC_EmitInteger, MVT::i32, 0, |
| 353 | /* 974*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_UINT_eg), 0, |
| 354 | MVT::i32, 18/*#Ops*/, 2, 3, 0, 4, 5, 6, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, |
| 355 | // Src: (and:{ *:[i32] } i32:{ *:[i32] }:$src, (add:{ *:[i32] } (shl:{ *:[i32] } 1:{ *:[i32] }, i32:{ *:[i32] }:$width)<<P:Predicate_shl_oneuse>>, -1:{ *:[i32] })<<P:Predicate_add_oneuse>>) - Complexity = 21 |
| 356 | // Dst: (BFE_UINT_eg:{ *:[i32] } ?:{ *:[i32] }:$src, (MOV_IMM_I32:{ *:[i32] } 0:{ *:[i32] }), ?:{ *:[i32] }:$width) |
| 357 | /* 998*/ /*SwitchOpcode*/ 17|128,1/*145*/, TARGET_VAL(ISD::XOR),// ->1147 |
| 358 | /* 1002*/ OPC_MoveChild0, |
| 359 | /* 1003*/ OPC_CheckOpcode, TARGET_VAL(ISD::SHL), |
| 360 | /* 1006*/ OPC_CheckChild0Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 361 | /* 1017*/ OPC_RecordChild1, // #1 = $width |
| 362 | /* 1018*/ OPC_CheckChild1Type, MVT::i32, |
| 363 | /* 1020*/ OPC_CheckPredicate, 0, // Predicate_shl_oneuse |
| 364 | /* 1022*/ OPC_MoveParent, |
| 365 | /* 1023*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 366 | /* 1034*/ OPC_CheckPredicate, 0, // Predicate_xor_oneuse |
| 367 | /* 1036*/ OPC_MoveParent, |
| 368 | /* 1037*/ OPC_CheckType, MVT::i32, |
| 369 | /* 1039*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 370 | /* 1041*/ OPC_EmitInteger, MVT::i32, 0, |
| 371 | /* 1044*/ OPC_EmitInteger, MVT::i32, 0, |
| 372 | /* 1047*/ OPC_EmitInteger, MVT::i32, 0, |
| 373 | /* 1050*/ OPC_EmitInteger, MVT::i32, 0, |
| 374 | /* 1053*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 375 | /* 1065*/ OPC_EmitInteger, MVT::i32, 0, |
| 376 | /* 1068*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 377 | MVT::i32, 1/*#Ops*/, 7, // Results = #8 |
| 378 | /* 1075*/ OPC_EmitInteger, MVT::i32, 0, |
| 379 | /* 1078*/ OPC_EmitInteger, MVT::i32, 0, |
| 380 | /* 1081*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 381 | /* 1093*/ OPC_EmitInteger, MVT::i32, 0, |
| 382 | /* 1096*/ OPC_EmitInteger, MVT::i32, 0, |
| 383 | /* 1099*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 384 | /* 1111*/ OPC_EmitInteger, MVT::i32, 1, |
| 385 | /* 1114*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 386 | /* 1117*/ OPC_EmitInteger, MVT::i32, 0, |
| 387 | /* 1120*/ OPC_EmitInteger, MVT::i32, 0, |
| 388 | /* 1123*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_UINT_eg), 0, |
| 389 | MVT::i32, 18/*#Ops*/, 2, 3, 0, 4, 5, 6, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, |
| 390 | // Src: (and:{ *:[i32] } i32:{ *:[i32] }:$src, (xor:{ *:[i32] } (shl:{ *:[i32] } -1:{ *:[i32] }, i32:{ *:[i32] }:$width)<<P:Predicate_shl_oneuse>>, -1:{ *:[i32] })<<P:Predicate_xor_oneuse>>) - Complexity = 21 |
| 391 | // Dst: (BFE_UINT_eg:{ *:[i32] } ?:{ *:[i32] }:$src, (MOV_IMM_I32:{ *:[i32] } 0:{ *:[i32] }), ?:{ *:[i32] }:$width) |
| 392 | /* 1147*/ 0, // EndSwitchOpcode |
| 393 | /* 1148*/ /*Scope*/ 38|128,2/*294*/, /*->1444*/ |
| 394 | /* 1150*/ OPC_MoveChild0, |
| 395 | /* 1151*/ OPC_SwitchOpcode /*2 cases */, 9|128,1/*137*/, TARGET_VAL(ISD::ADD),// ->1293 |
| 396 | /* 1156*/ OPC_MoveChild0, |
| 397 | /* 1157*/ OPC_CheckOpcode, TARGET_VAL(ISD::SHL), |
| 398 | /* 1160*/ OPC_CheckChild0Integer, 1, |
| 399 | /* 1162*/ OPC_RecordChild1, // #0 = $width |
| 400 | /* 1163*/ OPC_CheckChild1Type, MVT::i32, |
| 401 | /* 1165*/ OPC_CheckPredicate, 0, // Predicate_shl_oneuse |
| 402 | /* 1167*/ OPC_MoveParent, |
| 403 | /* 1168*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 404 | /* 1179*/ OPC_CheckPredicate, 0, // Predicate_add_oneuse |
| 405 | /* 1181*/ OPC_MoveParent, |
| 406 | /* 1182*/ OPC_RecordChild1, // #1 = $src |
| 407 | /* 1183*/ OPC_CheckType, MVT::i32, |
| 408 | /* 1185*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 409 | /* 1187*/ OPC_EmitInteger, MVT::i32, 0, |
| 410 | /* 1190*/ OPC_EmitInteger, MVT::i32, 0, |
| 411 | /* 1193*/ OPC_EmitInteger, MVT::i32, 0, |
| 412 | /* 1196*/ OPC_EmitInteger, MVT::i32, 0, |
| 413 | /* 1199*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 414 | /* 1211*/ OPC_EmitInteger, MVT::i32, 0, |
| 415 | /* 1214*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 416 | MVT::i32, 1/*#Ops*/, 7, // Results = #8 |
| 417 | /* 1221*/ OPC_EmitInteger, MVT::i32, 0, |
| 418 | /* 1224*/ OPC_EmitInteger, MVT::i32, 0, |
| 419 | /* 1227*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 420 | /* 1239*/ OPC_EmitInteger, MVT::i32, 0, |
| 421 | /* 1242*/ OPC_EmitInteger, MVT::i32, 0, |
| 422 | /* 1245*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 423 | /* 1257*/ OPC_EmitInteger, MVT::i32, 1, |
| 424 | /* 1260*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 425 | /* 1263*/ OPC_EmitInteger, MVT::i32, 0, |
| 426 | /* 1266*/ OPC_EmitInteger, MVT::i32, 0, |
| 427 | /* 1269*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_UINT_eg), 0, |
| 428 | MVT::i32, 18/*#Ops*/, 2, 3, 1, 4, 5, 6, 8, 9, 10, 11, 0, 12, 13, 14, 15, 16, 17, 18, |
| 429 | // Src: (and:{ *:[i32] } (add:{ *:[i32] } (shl:{ *:[i32] } 1:{ *:[i32] }, i32:{ *:[i32] }:$width)<<P:Predicate_shl_oneuse>>, -1:{ *:[i32] })<<P:Predicate_add_oneuse>>, i32:{ *:[i32] }:$src) - Complexity = 21 |
| 430 | // Dst: (BFE_UINT_eg:{ *:[i32] } ?:{ *:[i32] }:$src, (MOV_IMM_I32:{ *:[i32] } 0:{ *:[i32] }), ?:{ *:[i32] }:$width) |
| 431 | /* 1293*/ /*SwitchOpcode*/ 18|128,1/*146*/, TARGET_VAL(ISD::XOR),// ->1443 |
| 432 | /* 1297*/ OPC_MoveChild0, |
| 433 | /* 1298*/ OPC_CheckOpcode, TARGET_VAL(ISD::SHL), |
| 434 | /* 1301*/ OPC_CheckChild0Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 435 | /* 1312*/ OPC_RecordChild1, // #0 = $width |
| 436 | /* 1313*/ OPC_CheckChild1Type, MVT::i32, |
| 437 | /* 1315*/ OPC_CheckPredicate, 0, // Predicate_shl_oneuse |
| 438 | /* 1317*/ OPC_MoveParent, |
| 439 | /* 1318*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 440 | /* 1329*/ OPC_CheckPredicate, 0, // Predicate_xor_oneuse |
| 441 | /* 1331*/ OPC_MoveParent, |
| 442 | /* 1332*/ OPC_RecordChild1, // #1 = $src |
| 443 | /* 1333*/ OPC_CheckType, MVT::i32, |
| 444 | /* 1335*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 445 | /* 1337*/ OPC_EmitInteger, MVT::i32, 0, |
| 446 | /* 1340*/ OPC_EmitInteger, MVT::i32, 0, |
| 447 | /* 1343*/ OPC_EmitInteger, MVT::i32, 0, |
| 448 | /* 1346*/ OPC_EmitInteger, MVT::i32, 0, |
| 449 | /* 1349*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 450 | /* 1361*/ OPC_EmitInteger, MVT::i32, 0, |
| 451 | /* 1364*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 452 | MVT::i32, 1/*#Ops*/, 7, // Results = #8 |
| 453 | /* 1371*/ OPC_EmitInteger, MVT::i32, 0, |
| 454 | /* 1374*/ OPC_EmitInteger, MVT::i32, 0, |
| 455 | /* 1377*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 456 | /* 1389*/ OPC_EmitInteger, MVT::i32, 0, |
| 457 | /* 1392*/ OPC_EmitInteger, MVT::i32, 0, |
| 458 | /* 1395*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 459 | /* 1407*/ OPC_EmitInteger, MVT::i32, 1, |
| 460 | /* 1410*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 461 | /* 1413*/ OPC_EmitInteger, MVT::i32, 0, |
| 462 | /* 1416*/ OPC_EmitInteger, MVT::i32, 0, |
| 463 | /* 1419*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_UINT_eg), 0, |
| 464 | MVT::i32, 18/*#Ops*/, 2, 3, 1, 4, 5, 6, 8, 9, 10, 11, 0, 12, 13, 14, 15, 16, 17, 18, |
| 465 | // Src: (and:{ *:[i32] } (xor:{ *:[i32] } (shl:{ *:[i32] } -1:{ *:[i32] }, i32:{ *:[i32] }:$width)<<P:Predicate_shl_oneuse>>, -1:{ *:[i32] })<<P:Predicate_xor_oneuse>>, i32:{ *:[i32] }:$src) - Complexity = 21 |
| 466 | // Dst: (BFE_UINT_eg:{ *:[i32] } ?:{ *:[i32] }:$src, (MOV_IMM_I32:{ *:[i32] } 0:{ *:[i32] }), ?:{ *:[i32] }:$width) |
| 467 | /* 1443*/ 0, // EndSwitchOpcode |
| 468 | /* 1444*/ /*Scope*/ 11|128,1/*139*/, /*->1585*/ |
| 469 | /* 1446*/ OPC_RecordChild0, // #0 = $src |
| 470 | /* 1447*/ OPC_MoveChild1, |
| 471 | /* 1448*/ OPC_CheckOpcode, TARGET_VAL(ISD::SRL), |
| 472 | /* 1451*/ OPC_CheckChild0Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 473 | /* 1462*/ OPC_MoveChild1, |
| 474 | /* 1463*/ OPC_CheckOpcode, TARGET_VAL(ISD::SUB), |
| 475 | /* 1466*/ OPC_CheckChild0Integer, 32, |
| 476 | /* 1468*/ OPC_RecordChild1, // #1 = $width |
| 477 | /* 1469*/ OPC_CheckType, MVT::i32, |
| 478 | /* 1471*/ OPC_MoveParent, |
| 479 | /* 1472*/ OPC_CheckPredicate, 0, // Predicate_srl_oneuse |
| 480 | /* 1474*/ OPC_MoveParent, |
| 481 | /* 1475*/ OPC_CheckType, MVT::i32, |
| 482 | /* 1477*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 483 | /* 1479*/ OPC_EmitInteger, MVT::i32, 0, |
| 484 | /* 1482*/ OPC_EmitInteger, MVT::i32, 0, |
| 485 | /* 1485*/ OPC_EmitInteger, MVT::i32, 0, |
| 486 | /* 1488*/ OPC_EmitInteger, MVT::i32, 0, |
| 487 | /* 1491*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 488 | /* 1503*/ OPC_EmitInteger, MVT::i32, 0, |
| 489 | /* 1506*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 490 | MVT::i32, 1/*#Ops*/, 7, // Results = #8 |
| 491 | /* 1513*/ OPC_EmitInteger, MVT::i32, 0, |
| 492 | /* 1516*/ OPC_EmitInteger, MVT::i32, 0, |
| 493 | /* 1519*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 494 | /* 1531*/ OPC_EmitInteger, MVT::i32, 0, |
| 495 | /* 1534*/ OPC_EmitInteger, MVT::i32, 0, |
| 496 | /* 1537*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 497 | /* 1549*/ OPC_EmitInteger, MVT::i32, 1, |
| 498 | /* 1552*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 499 | /* 1555*/ OPC_EmitInteger, MVT::i32, 0, |
| 500 | /* 1558*/ OPC_EmitInteger, MVT::i32, 0, |
| 501 | /* 1561*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_UINT_eg), 0, |
| 502 | MVT::i32, 18/*#Ops*/, 2, 3, 0, 4, 5, 6, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, |
| 503 | // Src: (and:{ *:[i32] } i32:{ *:[i32] }:$src, (srl:{ *:[i32] } -1:{ *:[i32] }, (sub:{ *:[i32] } 32:{ *:[i32] }, i32:{ *:[i32] }:$width))<<P:Predicate_srl_oneuse>>) - Complexity = 20 |
| 504 | // Dst: (BFE_UINT_eg:{ *:[i32] } ?:{ *:[i32] }:$src, (MOV_IMM_I32:{ *:[i32] } 0:{ *:[i32] }), ?:{ *:[i32] }:$width) |
| 505 | /* 1585*/ /*Scope*/ 11|128,2/*267*/, /*->1854*/ |
| 506 | /* 1587*/ OPC_MoveChild0, |
| 507 | /* 1588*/ OPC_CheckOpcode, TARGET_VAL(ISD::SRL), |
| 508 | /* 1591*/ OPC_Scope, 7|128,1/*135*/, /*->1729*/ // 2 children in Scope |
| 509 | /* 1594*/ OPC_CheckChild0Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 510 | /* 1605*/ OPC_MoveChild1, |
| 511 | /* 1606*/ OPC_CheckOpcode, TARGET_VAL(ISD::SUB), |
| 512 | /* 1609*/ OPC_CheckChild0Integer, 32, |
| 513 | /* 1611*/ OPC_RecordChild1, // #0 = $width |
| 514 | /* 1612*/ OPC_CheckType, MVT::i32, |
| 515 | /* 1614*/ OPC_MoveParent, |
| 516 | /* 1615*/ OPC_CheckPredicate, 0, // Predicate_srl_oneuse |
| 517 | /* 1617*/ OPC_MoveParent, |
| 518 | /* 1618*/ OPC_RecordChild1, // #1 = $src |
| 519 | /* 1619*/ OPC_CheckType, MVT::i32, |
| 520 | /* 1621*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 521 | /* 1623*/ OPC_EmitInteger, MVT::i32, 0, |
| 522 | /* 1626*/ OPC_EmitInteger, MVT::i32, 0, |
| 523 | /* 1629*/ OPC_EmitInteger, MVT::i32, 0, |
| 524 | /* 1632*/ OPC_EmitInteger, MVT::i32, 0, |
| 525 | /* 1635*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 526 | /* 1647*/ OPC_EmitInteger, MVT::i32, 0, |
| 527 | /* 1650*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 528 | MVT::i32, 1/*#Ops*/, 7, // Results = #8 |
| 529 | /* 1657*/ OPC_EmitInteger, MVT::i32, 0, |
| 530 | /* 1660*/ OPC_EmitInteger, MVT::i32, 0, |
| 531 | /* 1663*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 532 | /* 1675*/ OPC_EmitInteger, MVT::i32, 0, |
| 533 | /* 1678*/ OPC_EmitInteger, MVT::i32, 0, |
| 534 | /* 1681*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 535 | /* 1693*/ OPC_EmitInteger, MVT::i32, 1, |
| 536 | /* 1696*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 537 | /* 1699*/ OPC_EmitInteger, MVT::i32, 0, |
| 538 | /* 1702*/ OPC_EmitInteger, MVT::i32, 0, |
| 539 | /* 1705*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_UINT_eg), 0, |
| 540 | MVT::i32, 18/*#Ops*/, 2, 3, 1, 4, 5, 6, 8, 9, 10, 11, 0, 12, 13, 14, 15, 16, 17, 18, |
| 541 | // Src: (and:{ *:[i32] } (srl:{ *:[i32] } -1:{ *:[i32] }, (sub:{ *:[i32] } 32:{ *:[i32] }, i32:{ *:[i32] }:$width))<<P:Predicate_srl_oneuse>>, i32:{ *:[i32] }:$src) - Complexity = 20 |
| 542 | // Dst: (BFE_UINT_eg:{ *:[i32] } ?:{ *:[i32] }:$src, (MOV_IMM_I32:{ *:[i32] } 0:{ *:[i32] }), ?:{ *:[i32] }:$width) |
| 543 | /* 1729*/ /*Scope*/ 123, /*->1853*/ |
| 544 | /* 1730*/ OPC_RecordChild0, // #0 = $src |
| 545 | /* 1731*/ OPC_RecordChild1, // #1 = $rshift |
| 546 | /* 1732*/ OPC_CheckChild1Type, MVT::i32, |
| 547 | /* 1734*/ OPC_MoveParent, |
| 548 | /* 1735*/ OPC_RecordChild1, // #2 = $mask |
| 549 | /* 1736*/ OPC_MoveChild1, |
| 550 | /* 1737*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 551 | /* 1740*/ OPC_CheckPredicate, 1, // Predicate_IMMZeroBasedBitfieldMask |
| 552 | /* 1742*/ OPC_MoveParent, |
| 553 | /* 1743*/ OPC_CheckType, MVT::i32, |
| 554 | /* 1745*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 555 | /* 1747*/ OPC_EmitInteger, MVT::i32, 0, |
| 556 | /* 1750*/ OPC_EmitInteger, MVT::i32, 0, |
| 557 | /* 1753*/ OPC_EmitInteger, MVT::i32, 0, |
| 558 | /* 1756*/ OPC_EmitInteger, MVT::i32, 0, |
| 559 | /* 1759*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 560 | /* 1771*/ OPC_EmitInteger, MVT::i32, 0, |
| 561 | /* 1774*/ OPC_EmitInteger, MVT::i32, 0, |
| 562 | /* 1777*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 563 | /* 1789*/ OPC_EmitNodeXForm, 0, 2, // IMMPopCount |
| 564 | /* 1792*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 565 | MVT::i32, 1/*#Ops*/, 11, // Results = #12 |
| 566 | /* 1799*/ OPC_EmitInteger, MVT::i32, 0, |
| 567 | /* 1802*/ OPC_EmitInteger, MVT::i32, 0, |
| 568 | /* 1805*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 569 | /* 1817*/ OPC_EmitInteger, MVT::i32, 1, |
| 570 | /* 1820*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 571 | /* 1823*/ OPC_EmitInteger, MVT::i32, 0, |
| 572 | /* 1826*/ OPC_EmitInteger, MVT::i32, 0, |
| 573 | /* 1829*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_UINT_eg), 0, |
| 574 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 12, 13, 14, 15, 16, 17, 18, 19, |
| 575 | // Src: (and:{ *:[i32] } (srl:{ *:[i32] } i32:{ *:[i32] }:$src, i32:{ *:[i32] }:$rshift), (imm:{ *:[i32] })<<P:Predicate_IMMZeroBasedBitfieldMask>>:$mask) - Complexity = 10 |
| 576 | // Dst: (BFE_UINT_eg:{ *:[i32] } ?:{ *:[i32] }:$src, ?:{ *:[i32] }:$rshift, (MOV_IMM_I32:{ *:[i32] } (IMMPopCount:{ *:[i32] } ?:{ *:[i32] }:$mask))) |
| 577 | /* 1853*/ 0, /*End of Scope*/ |
| 578 | /* 1854*/ /*Scope*/ 104, /*->1959*/ |
| 579 | /* 1855*/ OPC_RecordChild0, // #0 = $src0 |
| 580 | /* 1856*/ OPC_RecordChild1, // #1 = $src1 |
| 581 | /* 1857*/ OPC_CheckType, MVT::i32, |
| 582 | /* 1859*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 583 | /* 1861*/ OPC_EmitInteger, MVT::i32, 0, |
| 584 | /* 1864*/ OPC_EmitInteger, MVT::i32, 0, |
| 585 | /* 1867*/ OPC_EmitInteger, MVT::i32, 1, |
| 586 | /* 1870*/ OPC_EmitInteger, MVT::i32, 0, |
| 587 | /* 1873*/ OPC_EmitInteger, MVT::i32, 0, |
| 588 | /* 1876*/ OPC_EmitInteger, MVT::i32, 0, |
| 589 | /* 1879*/ OPC_EmitInteger, MVT::i32, 0, |
| 590 | /* 1882*/ OPC_EmitInteger, MVT::i32, 0, |
| 591 | /* 1885*/ OPC_EmitInteger, MVT::i32, 0, |
| 592 | /* 1888*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 593 | /* 1900*/ OPC_EmitInteger, MVT::i32, 0, |
| 594 | /* 1903*/ OPC_EmitInteger, MVT::i32, 0, |
| 595 | /* 1906*/ OPC_EmitInteger, MVT::i32, 0, |
| 596 | /* 1909*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 597 | /* 1921*/ OPC_EmitInteger, MVT::i32, 1, |
| 598 | /* 1924*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 599 | /* 1927*/ OPC_EmitInteger, MVT::i32, 0, |
| 600 | /* 1930*/ OPC_EmitInteger, MVT::i32, 0, |
| 601 | /* 1933*/ OPC_MorphNodeTo1, TARGET_VAL(R600::AND_INT), 0, |
| 602 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 603 | // Src: (and:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 604 | // Dst: (AND_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 605 | /* 1959*/ 0, /*End of Scope*/ |
| 606 | /* 1960*/ /*SwitchOpcode*/ 118|128,3/*502*/, TARGET_VAL(ISD::INTRINSIC_VOID),// ->2466 |
| 607 | /* 1964*/ OPC_RecordNode, // #0 = 'intrinsic_void' chained node |
| 608 | /* 1965*/ OPC_Scope, 64|128,2/*320*/, /*->2288*/ // 4 children in Scope |
| 609 | /* 1968*/ OPC_CheckChild1Integer, 84|128,51/*6612*/, |
| 610 | /* 1971*/ OPC_RecordChild2, // #1 = $src |
| 611 | /* 1972*/ OPC_RecordChild3, // #2 = $arraybase |
| 612 | /* 1973*/ OPC_MoveChild3, |
| 613 | /* 1974*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 614 | /* 1977*/ OPC_MoveParent, |
| 615 | /* 1978*/ OPC_Scope, 76, /*->2056*/ // 4 children in Scope |
| 616 | /* 1980*/ OPC_CheckChild4Integer, 0, |
| 617 | /* 1982*/ OPC_RecordChild5, // #3 = $mask |
| 618 | /* 1983*/ OPC_MoveChild5, |
| 619 | /* 1984*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 620 | /* 1987*/ OPC_MoveParent, |
| 621 | /* 1988*/ OPC_Scope, 32, /*->2022*/ // 2 children in Scope |
| 622 | /* 1990*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 623 | /* 1992*/ OPC_EmitMergeInputChains1_0, |
| 624 | /* 1993*/ OPC_EmitInteger, MVT::i32, 0, |
| 625 | /* 1996*/ OPC_EmitConvertToTarget, 2, |
| 626 | /* 1998*/ OPC_EmitInteger, MVT::i32, 127|128,31/*4095*/, |
| 627 | /* 2002*/ OPC_EmitConvertToTarget, 3, |
| 628 | /* 2004*/ OPC_EmitInteger, MVT::i32, 32, |
| 629 | /* 2007*/ OPC_EmitInteger, MVT::i32, 0, |
| 630 | /* 2010*/ OPC_MorphNodeTo0, TARGET_VAL(R600::R600_ExportBuf), 0|OPFL_Chain, |
| 631 | 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9, |
| 632 | // Src: (intrinsic_void 6612:{ *:[iPTR] }, R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$arraybase, 0:{ *:[i32] }, (imm:{ *:[i32] }):$mask) - Complexity = 19 |
| 633 | // Dst: (R600_ExportBuf R600_Reg128:{ *:[v4f32] }:$src, 0:{ *:[i32] }, (imm:{ *:[i32] }):$arraybase, 4095:{ *:[i32] }, (imm:{ *:[i32] }):$mask, 32:{ *:[i32] }, 0:{ *:[i32] }) |
| 634 | /* 2022*/ /*Scope*/ 32, /*->2055*/ |
| 635 | /* 2023*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 636 | /* 2025*/ OPC_EmitMergeInputChains1_0, |
| 637 | /* 2026*/ OPC_EmitInteger, MVT::i32, 0, |
| 638 | /* 2029*/ OPC_EmitConvertToTarget, 2, |
| 639 | /* 2031*/ OPC_EmitInteger, MVT::i32, 127|128,31/*4095*/, |
| 640 | /* 2035*/ OPC_EmitConvertToTarget, 3, |
| 641 | /* 2037*/ OPC_EmitInteger, MVT::i32, 64, |
| 642 | /* 2040*/ OPC_EmitInteger, MVT::i32, 0, |
| 643 | /* 2043*/ OPC_MorphNodeTo0, TARGET_VAL(R600::EG_ExportBuf), 0|OPFL_Chain, |
| 644 | 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9, |
| 645 | // Src: (intrinsic_void 6612:{ *:[iPTR] }, R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$arraybase, 0:{ *:[i32] }, (imm:{ *:[i32] }):$mask) - Complexity = 19 |
| 646 | // Dst: (EG_ExportBuf R600_Reg128:{ *:[v4f32] }:$src, 0:{ *:[i32] }, (imm:{ *:[i32] }):$arraybase, 4095:{ *:[i32] }, (imm:{ *:[i32] }):$mask, 64:{ *:[i32] }, 0:{ *:[i32] }) |
| 647 | /* 2055*/ 0, /*End of Scope*/ |
| 648 | /* 2056*/ /*Scope*/ 76, /*->2133*/ |
| 649 | /* 2057*/ OPC_CheckChild4Integer, 1, |
| 650 | /* 2059*/ OPC_RecordChild5, // #3 = $mask |
| 651 | /* 2060*/ OPC_MoveChild5, |
| 652 | /* 2061*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 653 | /* 2064*/ OPC_MoveParent, |
| 654 | /* 2065*/ OPC_Scope, 32, /*->2099*/ // 2 children in Scope |
| 655 | /* 2067*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 656 | /* 2069*/ OPC_EmitMergeInputChains1_0, |
| 657 | /* 2070*/ OPC_EmitInteger, MVT::i32, 0, |
| 658 | /* 2073*/ OPC_EmitConvertToTarget, 2, |
| 659 | /* 2075*/ OPC_EmitInteger, MVT::i32, 127|128,31/*4095*/, |
| 660 | /* 2079*/ OPC_EmitConvertToTarget, 3, |
| 661 | /* 2081*/ OPC_EmitInteger, MVT::i32, 33, |
| 662 | /* 2084*/ OPC_EmitInteger, MVT::i32, 0, |
| 663 | /* 2087*/ OPC_MorphNodeTo0, TARGET_VAL(R600::R600_ExportBuf), 0|OPFL_Chain, |
| 664 | 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9, |
| 665 | // Src: (intrinsic_void 6612:{ *:[iPTR] }, R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$arraybase, 1:{ *:[i32] }, (imm:{ *:[i32] }):$mask) - Complexity = 19 |
| 666 | // Dst: (R600_ExportBuf ?:{ *:[v4f32] }:$src, 0:{ *:[i32] }, (imm:{ *:[i32] }):$arraybase, 4095:{ *:[i32] }, (imm:{ *:[i32] }):$mask, 33:{ *:[i32] }, 0:{ *:[i32] }) |
| 667 | /* 2099*/ /*Scope*/ 32, /*->2132*/ |
| 668 | /* 2100*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 669 | /* 2102*/ OPC_EmitMergeInputChains1_0, |
| 670 | /* 2103*/ OPC_EmitInteger, MVT::i32, 0, |
| 671 | /* 2106*/ OPC_EmitConvertToTarget, 2, |
| 672 | /* 2108*/ OPC_EmitInteger, MVT::i32, 127|128,31/*4095*/, |
| 673 | /* 2112*/ OPC_EmitConvertToTarget, 3, |
| 674 | /* 2114*/ OPC_EmitInteger, MVT::i32, 65, |
| 675 | /* 2117*/ OPC_EmitInteger, MVT::i32, 0, |
| 676 | /* 2120*/ OPC_MorphNodeTo0, TARGET_VAL(R600::EG_ExportBuf), 0|OPFL_Chain, |
| 677 | 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9, |
| 678 | // Src: (intrinsic_void 6612:{ *:[iPTR] }, R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$arraybase, 1:{ *:[i32] }, (imm:{ *:[i32] }):$mask) - Complexity = 19 |
| 679 | // Dst: (EG_ExportBuf ?:{ *:[v4f32] }:$src, 0:{ *:[i32] }, (imm:{ *:[i32] }):$arraybase, 4095:{ *:[i32] }, (imm:{ *:[i32] }):$mask, 65:{ *:[i32] }, 0:{ *:[i32] }) |
| 680 | /* 2132*/ 0, /*End of Scope*/ |
| 681 | /* 2133*/ /*Scope*/ 76, /*->2210*/ |
| 682 | /* 2134*/ OPC_CheckChild4Integer, 2, |
| 683 | /* 2136*/ OPC_RecordChild5, // #3 = $mask |
| 684 | /* 2137*/ OPC_MoveChild5, |
| 685 | /* 2138*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 686 | /* 2141*/ OPC_MoveParent, |
| 687 | /* 2142*/ OPC_Scope, 32, /*->2176*/ // 2 children in Scope |
| 688 | /* 2144*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 689 | /* 2146*/ OPC_EmitMergeInputChains1_0, |
| 690 | /* 2147*/ OPC_EmitInteger, MVT::i32, 0, |
| 691 | /* 2150*/ OPC_EmitConvertToTarget, 2, |
| 692 | /* 2152*/ OPC_EmitInteger, MVT::i32, 127|128,31/*4095*/, |
| 693 | /* 2156*/ OPC_EmitConvertToTarget, 3, |
| 694 | /* 2158*/ OPC_EmitInteger, MVT::i32, 34, |
| 695 | /* 2161*/ OPC_EmitInteger, MVT::i32, 0, |
| 696 | /* 2164*/ OPC_MorphNodeTo0, TARGET_VAL(R600::R600_ExportBuf), 0|OPFL_Chain, |
| 697 | 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9, |
| 698 | // Src: (intrinsic_void 6612:{ *:[iPTR] }, R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$arraybase, 2:{ *:[i32] }, (imm:{ *:[i32] }):$mask) - Complexity = 19 |
| 699 | // Dst: (R600_ExportBuf ?:{ *:[v4f32] }:$src, 0:{ *:[i32] }, (imm:{ *:[i32] }):$arraybase, 4095:{ *:[i32] }, (imm:{ *:[i32] }):$mask, 34:{ *:[i32] }, 0:{ *:[i32] }) |
| 700 | /* 2176*/ /*Scope*/ 32, /*->2209*/ |
| 701 | /* 2177*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 702 | /* 2179*/ OPC_EmitMergeInputChains1_0, |
| 703 | /* 2180*/ OPC_EmitInteger, MVT::i32, 0, |
| 704 | /* 2183*/ OPC_EmitConvertToTarget, 2, |
| 705 | /* 2185*/ OPC_EmitInteger, MVT::i32, 127|128,31/*4095*/, |
| 706 | /* 2189*/ OPC_EmitConvertToTarget, 3, |
| 707 | /* 2191*/ OPC_EmitInteger, MVT::i32, 66, |
| 708 | /* 2194*/ OPC_EmitInteger, MVT::i32, 0, |
| 709 | /* 2197*/ OPC_MorphNodeTo0, TARGET_VAL(R600::EG_ExportBuf), 0|OPFL_Chain, |
| 710 | 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9, |
| 711 | // Src: (intrinsic_void 6612:{ *:[iPTR] }, R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$arraybase, 2:{ *:[i32] }, (imm:{ *:[i32] }):$mask) - Complexity = 19 |
| 712 | // Dst: (EG_ExportBuf ?:{ *:[v4f32] }:$src, 0:{ *:[i32] }, (imm:{ *:[i32] }):$arraybase, 4095:{ *:[i32] }, (imm:{ *:[i32] }):$mask, 66:{ *:[i32] }, 0:{ *:[i32] }) |
| 713 | /* 2209*/ 0, /*End of Scope*/ |
| 714 | /* 2210*/ /*Scope*/ 76, /*->2287*/ |
| 715 | /* 2211*/ OPC_CheckChild4Integer, 3, |
| 716 | /* 2213*/ OPC_RecordChild5, // #3 = $mask |
| 717 | /* 2214*/ OPC_MoveChild5, |
| 718 | /* 2215*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 719 | /* 2218*/ OPC_MoveParent, |
| 720 | /* 2219*/ OPC_Scope, 32, /*->2253*/ // 2 children in Scope |
| 721 | /* 2221*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 722 | /* 2223*/ OPC_EmitMergeInputChains1_0, |
| 723 | /* 2224*/ OPC_EmitInteger, MVT::i32, 0, |
| 724 | /* 2227*/ OPC_EmitConvertToTarget, 2, |
| 725 | /* 2229*/ OPC_EmitInteger, MVT::i32, 127|128,31/*4095*/, |
| 726 | /* 2233*/ OPC_EmitConvertToTarget, 3, |
| 727 | /* 2235*/ OPC_EmitInteger, MVT::i32, 35, |
| 728 | /* 2238*/ OPC_EmitInteger, MVT::i32, 0, |
| 729 | /* 2241*/ OPC_MorphNodeTo0, TARGET_VAL(R600::R600_ExportBuf), 0|OPFL_Chain, |
| 730 | 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9, |
| 731 | // Src: (intrinsic_void 6612:{ *:[iPTR] }, R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$arraybase, 3:{ *:[i32] }, (imm:{ *:[i32] }):$mask) - Complexity = 19 |
| 732 | // Dst: (R600_ExportBuf ?:{ *:[v4f32] }:$src, 0:{ *:[i32] }, (imm:{ *:[i32] }):$arraybase, 4095:{ *:[i32] }, (imm:{ *:[i32] }):$mask, 35:{ *:[i32] }, 0:{ *:[i32] }) |
| 733 | /* 2253*/ /*Scope*/ 32, /*->2286*/ |
| 734 | /* 2254*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 735 | /* 2256*/ OPC_EmitMergeInputChains1_0, |
| 736 | /* 2257*/ OPC_EmitInteger, MVT::i32, 0, |
| 737 | /* 2260*/ OPC_EmitConvertToTarget, 2, |
| 738 | /* 2262*/ OPC_EmitInteger, MVT::i32, 127|128,31/*4095*/, |
| 739 | /* 2266*/ OPC_EmitConvertToTarget, 3, |
| 740 | /* 2268*/ OPC_EmitInteger, MVT::i32, 67, |
| 741 | /* 2271*/ OPC_EmitInteger, MVT::i32, 0, |
| 742 | /* 2274*/ OPC_MorphNodeTo0, TARGET_VAL(R600::EG_ExportBuf), 0|OPFL_Chain, |
| 743 | 7/*#Ops*/, 1, 4, 5, 6, 7, 8, 9, |
| 744 | // Src: (intrinsic_void 6612:{ *:[iPTR] }, R600_Reg128:{ *:[v4f32] }:$src, (imm:{ *:[i32] }):$arraybase, 3:{ *:[i32] }, (imm:{ *:[i32] }):$mask) - Complexity = 19 |
| 745 | // Dst: (EG_ExportBuf ?:{ *:[v4f32] }:$src, 0:{ *:[i32] }, (imm:{ *:[i32] }):$arraybase, 4095:{ *:[i32] }, (imm:{ *:[i32] }):$mask, 67:{ *:[i32] }, 0:{ *:[i32] }) |
| 746 | /* 2286*/ 0, /*End of Scope*/ |
| 747 | /* 2287*/ 0, /*End of Scope*/ |
| 748 | /* 2288*/ /*Scope*/ 49, /*->2338*/ |
| 749 | /* 2289*/ OPC_CheckChild1Integer, 66|128,51/*6594*/, |
| 750 | /* 2292*/ OPC_RecordChild2, // #1 = $rw_gpr |
| 751 | /* 2293*/ OPC_RecordChild3, // #2 = $index_gpr |
| 752 | /* 2294*/ OPC_RecordChild4, // #3 = $rat_id |
| 753 | /* 2295*/ OPC_MoveChild4, |
| 754 | /* 2296*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 755 | /* 2299*/ OPC_MoveParent, |
| 756 | /* 2300*/ OPC_Scope, 17, /*->2319*/ // 2 children in Scope |
| 757 | /* 2302*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 758 | /* 2304*/ OPC_EmitMergeInputChains1_0, |
| 759 | /* 2305*/ OPC_EmitConvertToTarget, 3, |
| 760 | /* 2307*/ OPC_EmitInteger, MVT::i32, 0, |
| 761 | /* 2310*/ OPC_MorphNodeTo0, TARGET_VAL(R600::RAT_STORE_TYPED_cm), 0|OPFL_Chain, |
| 762 | 4/*#Ops*/, 1, 2, 4, 5, |
| 763 | // Src: (intrinsic_void 6594:{ *:[iPTR] }, R600_Reg128:{ *:[v4i32] }:$rw_gpr, R600_Reg128:{ *:[v4i32] }:$index_gpr, (imm:{ *:[i32] }):$rat_id) - Complexity = 11 |
| 764 | // Dst: (RAT_STORE_TYPED_cm R600_Reg128:{ *:[v4i32] }:$rw_gpr, R600_Reg128:{ *:[v4i32] }:$index_gpr, (imm:{ *:[i32] }):$rat_id) |
| 765 | /* 2319*/ /*Scope*/ 17, /*->2337*/ |
| 766 | /* 2320*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 767 | /* 2322*/ OPC_EmitMergeInputChains1_0, |
| 768 | /* 2323*/ OPC_EmitConvertToTarget, 3, |
| 769 | /* 2325*/ OPC_EmitInteger, MVT::i32, 0, |
| 770 | /* 2328*/ OPC_MorphNodeTo0, TARGET_VAL(R600::RAT_STORE_TYPED_eg), 0|OPFL_Chain, |
| 771 | 4/*#Ops*/, 1, 2, 4, 5, |
| 772 | // Src: (intrinsic_void 6594:{ *:[iPTR] }, R600_Reg128:{ *:[v4i32] }:$rw_gpr, R600_Reg128:{ *:[v4i32] }:$index_gpr, (imm:{ *:[i32] }):$rat_id) - Complexity = 11 |
| 773 | // Dst: (RAT_STORE_TYPED_eg R600_Reg128:{ *:[v4i32] }:$rw_gpr, R600_Reg128:{ *:[v4i32] }:$index_gpr, (imm:{ *:[i32] }):$rat_id) |
| 774 | /* 2337*/ 0, /*End of Scope*/ |
| 775 | /* 2338*/ /*Scope*/ 11, /*->2350*/ |
| 776 | /* 2339*/ OPC_CheckChild1Integer, 63|128,51/*6591*/, |
| 777 | /* 2342*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 778 | /* 2344*/ OPC_EmitMergeInputChains1_0, |
| 779 | /* 2345*/ OPC_MorphNodeTo0, TARGET_VAL(R600::GROUP_BARRIER), 0|OPFL_Chain, |
| 780 | 0/*#Ops*/, |
| 781 | // Src: (intrinsic_void 6591:{ *:[iPTR] }) - Complexity = 8 |
| 782 | // Dst: (GROUP_BARRIER) |
| 783 | /* 2350*/ /*Scope*/ 114, /*->2465*/ |
| 784 | /* 2351*/ OPC_CheckChild1Integer, 65|128,51/*6593*/, |
| 785 | /* 2354*/ OPC_RecordChild2, // #1 = $src0 |
| 786 | /* 2355*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 787 | /* 2357*/ OPC_EmitMergeInputChains1_0, |
| 788 | /* 2358*/ OPC_EmitInteger, MVT::i32, 0, |
| 789 | /* 2361*/ OPC_EmitInteger, MVT::i32, 0, |
| 790 | /* 2364*/ OPC_EmitInteger, MVT::i32, 1, |
| 791 | /* 2367*/ OPC_EmitInteger, MVT::i32, 0, |
| 792 | /* 2370*/ OPC_EmitInteger, MVT::i32, 0, |
| 793 | /* 2373*/ OPC_EmitInteger, MVT::i32, 0, |
| 794 | /* 2376*/ OPC_EmitRegister, MVT::f32, R600::ZERO, |
| 795 | /* 2379*/ OPC_EmitInteger, MVT::i32, 0, |
| 796 | /* 2382*/ OPC_EmitInteger, MVT::i32, 0, |
| 797 | /* 2385*/ OPC_EmitInteger, MVT::i32, 0, |
| 798 | /* 2388*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 799 | /* 2400*/ OPC_EmitInteger, MVT::i32, 0, |
| 800 | /* 2403*/ OPC_EmitInteger, MVT::i32, 0, |
| 801 | /* 2406*/ OPC_EmitInteger, MVT::i32, 0, |
| 802 | /* 2409*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 803 | /* 2421*/ OPC_EmitInteger, MVT::i32, 1, |
| 804 | /* 2424*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 805 | /* 2427*/ OPC_EmitInteger, MVT::i32, 0, |
| 806 | /* 2430*/ OPC_EmitInteger, MVT::i32, 0, |
| 807 | /* 2433*/ OPC_EmitNode1, TARGET_VAL(R600::KILLGT), 0|OPFL_Chain, |
| 808 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 1, 13, 14, 15, 16, 17, 18, 19, 20, // Results = #21 |
| 809 | /* 2459*/ OPC_MorphNodeTo0, TARGET_VAL(R600::MASK_WRITE), 0|OPFL_Chain, |
| 810 | 1/*#Ops*/, 21, |
| 811 | // Src: (intrinsic_void 6593:{ *:[iPTR] }, f32:{ *:[f32] }:$src0) - Complexity = 8 |
| 812 | // Dst: (MASK_WRITE (KILLGT:{ *:[i32] } ZERO:{ *:[f32] }, ?:{ *:[f32] }:$src0)) |
| 813 | /* 2465*/ 0, /*End of Scope*/ |
| 814 | /* 2466*/ /*SwitchOpcode*/ 15|128,116/*14863*/, TARGET_VAL(ISD::OR),// ->17333 |
| 815 | /* 2470*/ OPC_Scope, 34|128,115/*14754*/, /*->17227*/ // 2 children in Scope |
| 816 | /* 2473*/ OPC_MoveChild0, |
| 817 | /* 2474*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 818 | /* 2477*/ OPC_Scope, 93|128,5/*733*/, /*->3213*/ // 8 children in Scope |
| 819 | /* 2480*/ OPC_RecordChild0, // #0 = $y |
| 820 | /* 2481*/ OPC_Scope, 108|128,3/*492*/, /*->2976*/ // 2 children in Scope |
| 821 | /* 2484*/ OPC_RecordChild1, // #1 = $x |
| 822 | /* 2485*/ OPC_MoveParent, |
| 823 | /* 2486*/ OPC_MoveChild1, |
| 824 | /* 2487*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 825 | /* 2490*/ OPC_Scope, 120, /*->2612*/ // 4 children in Scope |
| 826 | /* 2492*/ OPC_RecordChild0, // #2 = $z |
| 827 | /* 2493*/ OPC_MoveChild1, |
| 828 | /* 2494*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 829 | /* 2497*/ OPC_CheckChild0Same, 1, |
| 830 | /* 2499*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 831 | /* 2510*/ OPC_MoveParent, |
| 832 | /* 2511*/ OPC_MoveParent, |
| 833 | /* 2512*/ OPC_CheckType, MVT::i32, |
| 834 | /* 2514*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 835 | /* 2516*/ OPC_EmitInteger, MVT::i32, 0, |
| 836 | /* 2519*/ OPC_EmitInteger, MVT::i32, 0, |
| 837 | /* 2522*/ OPC_EmitInteger, MVT::i32, 0, |
| 838 | /* 2525*/ OPC_EmitInteger, MVT::i32, 0, |
| 839 | /* 2528*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 840 | /* 2540*/ OPC_EmitInteger, MVT::i32, 0, |
| 841 | /* 2543*/ OPC_EmitInteger, MVT::i32, 0, |
| 842 | /* 2546*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 843 | /* 2558*/ OPC_EmitInteger, MVT::i32, 0, |
| 844 | /* 2561*/ OPC_EmitInteger, MVT::i32, 0, |
| 845 | /* 2564*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 846 | /* 2576*/ OPC_EmitInteger, MVT::i32, 1, |
| 847 | /* 2579*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 848 | /* 2582*/ OPC_EmitInteger, MVT::i32, 0, |
| 849 | /* 2585*/ OPC_EmitInteger, MVT::i32, 0, |
| 850 | /* 2588*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 851 | MVT::i32, 18/*#Ops*/, 3, 4, 1, 5, 6, 7, 0, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 852 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$y, i32:{ *:[i32] }:$x), (and:{ *:[i32] } i32:{ *:[i32] }:$z, (xor:{ *:[i32] } i32:{ *:[i32] }:$x, -1:{ *:[i32] }))) - Complexity = 17 |
| 853 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 854 | /* 2612*/ /*Scope*/ 120, /*->2733*/ |
| 855 | /* 2613*/ OPC_MoveChild0, |
| 856 | /* 2614*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 857 | /* 2617*/ OPC_CheckChild0Same, 1, |
| 858 | /* 2619*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 859 | /* 2630*/ OPC_MoveParent, |
| 860 | /* 2631*/ OPC_RecordChild1, // #2 = $z |
| 861 | /* 2632*/ OPC_MoveParent, |
| 862 | /* 2633*/ OPC_CheckType, MVT::i32, |
| 863 | /* 2635*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 864 | /* 2637*/ OPC_EmitInteger, MVT::i32, 0, |
| 865 | /* 2640*/ OPC_EmitInteger, MVT::i32, 0, |
| 866 | /* 2643*/ OPC_EmitInteger, MVT::i32, 0, |
| 867 | /* 2646*/ OPC_EmitInteger, MVT::i32, 0, |
| 868 | /* 2649*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 869 | /* 2661*/ OPC_EmitInteger, MVT::i32, 0, |
| 870 | /* 2664*/ OPC_EmitInteger, MVT::i32, 0, |
| 871 | /* 2667*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 872 | /* 2679*/ OPC_EmitInteger, MVT::i32, 0, |
| 873 | /* 2682*/ OPC_EmitInteger, MVT::i32, 0, |
| 874 | /* 2685*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 875 | /* 2697*/ OPC_EmitInteger, MVT::i32, 1, |
| 876 | /* 2700*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 877 | /* 2703*/ OPC_EmitInteger, MVT::i32, 0, |
| 878 | /* 2706*/ OPC_EmitInteger, MVT::i32, 0, |
| 879 | /* 2709*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 880 | MVT::i32, 18/*#Ops*/, 3, 4, 1, 5, 6, 7, 0, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 881 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$y, i32:{ *:[i32] }:$x), (and:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$x, -1:{ *:[i32] }), i32:{ *:[i32] }:$z)) - Complexity = 17 |
| 882 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 883 | /* 2733*/ /*Scope*/ 120, /*->2854*/ |
| 884 | /* 2734*/ OPC_RecordChild0, // #2 = $z |
| 885 | /* 2735*/ OPC_MoveChild1, |
| 886 | /* 2736*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 887 | /* 2739*/ OPC_CheckChild0Same, 0, |
| 888 | /* 2741*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 889 | /* 2752*/ OPC_MoveParent, |
| 890 | /* 2753*/ OPC_MoveParent, |
| 891 | /* 2754*/ OPC_CheckType, MVT::i32, |
| 892 | /* 2756*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 893 | /* 2758*/ OPC_EmitInteger, MVT::i32, 0, |
| 894 | /* 2761*/ OPC_EmitInteger, MVT::i32, 0, |
| 895 | /* 2764*/ OPC_EmitInteger, MVT::i32, 0, |
| 896 | /* 2767*/ OPC_EmitInteger, MVT::i32, 0, |
| 897 | /* 2770*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 898 | /* 2782*/ OPC_EmitInteger, MVT::i32, 0, |
| 899 | /* 2785*/ OPC_EmitInteger, MVT::i32, 0, |
| 900 | /* 2788*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 901 | /* 2800*/ OPC_EmitInteger, MVT::i32, 0, |
| 902 | /* 2803*/ OPC_EmitInteger, MVT::i32, 0, |
| 903 | /* 2806*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 904 | /* 2818*/ OPC_EmitInteger, MVT::i32, 1, |
| 905 | /* 2821*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 906 | /* 2824*/ OPC_EmitInteger, MVT::i32, 0, |
| 907 | /* 2827*/ OPC_EmitInteger, MVT::i32, 0, |
| 908 | /* 2830*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 909 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 910 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), (and:{ *:[i32] } i32:{ *:[i32] }:$z, (xor:{ *:[i32] } i32:{ *:[i32] }:$x, -1:{ *:[i32] }))) - Complexity = 17 |
| 911 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 912 | /* 2854*/ /*Scope*/ 120, /*->2975*/ |
| 913 | /* 2855*/ OPC_MoveChild0, |
| 914 | /* 2856*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 915 | /* 2859*/ OPC_CheckChild0Same, 0, |
| 916 | /* 2861*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 917 | /* 2872*/ OPC_MoveParent, |
| 918 | /* 2873*/ OPC_RecordChild1, // #2 = $z |
| 919 | /* 2874*/ OPC_MoveParent, |
| 920 | /* 2875*/ OPC_CheckType, MVT::i32, |
| 921 | /* 2877*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 922 | /* 2879*/ OPC_EmitInteger, MVT::i32, 0, |
| 923 | /* 2882*/ OPC_EmitInteger, MVT::i32, 0, |
| 924 | /* 2885*/ OPC_EmitInteger, MVT::i32, 0, |
| 925 | /* 2888*/ OPC_EmitInteger, MVT::i32, 0, |
| 926 | /* 2891*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 927 | /* 2903*/ OPC_EmitInteger, MVT::i32, 0, |
| 928 | /* 2906*/ OPC_EmitInteger, MVT::i32, 0, |
| 929 | /* 2909*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 930 | /* 2921*/ OPC_EmitInteger, MVT::i32, 0, |
| 931 | /* 2924*/ OPC_EmitInteger, MVT::i32, 0, |
| 932 | /* 2927*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 933 | /* 2939*/ OPC_EmitInteger, MVT::i32, 1, |
| 934 | /* 2942*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 935 | /* 2945*/ OPC_EmitInteger, MVT::i32, 0, |
| 936 | /* 2948*/ OPC_EmitInteger, MVT::i32, 0, |
| 937 | /* 2951*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 938 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 939 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), (and:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$x, -1:{ *:[i32] }), i32:{ *:[i32] }:$z)) - Complexity = 17 |
| 940 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 941 | /* 2975*/ 0, /*End of Scope*/ |
| 942 | /* 2976*/ /*Scope*/ 106|128,1/*234*/, /*->3212*/ |
| 943 | /* 2978*/ OPC_MoveChild1, |
| 944 | /* 2979*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 945 | /* 2982*/ OPC_RecordChild0, // #1 = $x |
| 946 | /* 2983*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 947 | /* 2994*/ OPC_MoveParent, |
| 948 | /* 2995*/ OPC_MoveParent, |
| 949 | /* 2996*/ OPC_MoveChild1, |
| 950 | /* 2997*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 951 | /* 3000*/ OPC_Scope, 104, /*->3106*/ // 2 children in Scope |
| 952 | /* 3002*/ OPC_RecordChild0, // #2 = $y |
| 953 | /* 3003*/ OPC_CheckChild1Same, 1, |
| 954 | /* 3005*/ OPC_MoveParent, |
| 955 | /* 3006*/ OPC_CheckType, MVT::i32, |
| 956 | /* 3008*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 957 | /* 3010*/ OPC_EmitInteger, MVT::i32, 0, |
| 958 | /* 3013*/ OPC_EmitInteger, MVT::i32, 0, |
| 959 | /* 3016*/ OPC_EmitInteger, MVT::i32, 0, |
| 960 | /* 3019*/ OPC_EmitInteger, MVT::i32, 0, |
| 961 | /* 3022*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 962 | /* 3034*/ OPC_EmitInteger, MVT::i32, 0, |
| 963 | /* 3037*/ OPC_EmitInteger, MVT::i32, 0, |
| 964 | /* 3040*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 965 | /* 3052*/ OPC_EmitInteger, MVT::i32, 0, |
| 966 | /* 3055*/ OPC_EmitInteger, MVT::i32, 0, |
| 967 | /* 3058*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 968 | /* 3070*/ OPC_EmitInteger, MVT::i32, 1, |
| 969 | /* 3073*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 970 | /* 3076*/ OPC_EmitInteger, MVT::i32, 0, |
| 971 | /* 3079*/ OPC_EmitInteger, MVT::i32, 0, |
| 972 | /* 3082*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 973 | MVT::i32, 18/*#Ops*/, 3, 4, 1, 5, 6, 7, 2, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 974 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$z, (xor:{ *:[i32] } i32:{ *:[i32] }:$x, -1:{ *:[i32] })), (and:{ *:[i32] } i32:{ *:[i32] }:$y, i32:{ *:[i32] }:$x)) - Complexity = 17 |
| 975 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 976 | /* 3106*/ /*Scope*/ 104, /*->3211*/ |
| 977 | /* 3107*/ OPC_CheckChild0Same, 1, |
| 978 | /* 3109*/ OPC_RecordChild1, // #2 = $y |
| 979 | /* 3110*/ OPC_MoveParent, |
| 980 | /* 3111*/ OPC_CheckType, MVT::i32, |
| 981 | /* 3113*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 982 | /* 3115*/ OPC_EmitInteger, MVT::i32, 0, |
| 983 | /* 3118*/ OPC_EmitInteger, MVT::i32, 0, |
| 984 | /* 3121*/ OPC_EmitInteger, MVT::i32, 0, |
| 985 | /* 3124*/ OPC_EmitInteger, MVT::i32, 0, |
| 986 | /* 3127*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 987 | /* 3139*/ OPC_EmitInteger, MVT::i32, 0, |
| 988 | /* 3142*/ OPC_EmitInteger, MVT::i32, 0, |
| 989 | /* 3145*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 990 | /* 3157*/ OPC_EmitInteger, MVT::i32, 0, |
| 991 | /* 3160*/ OPC_EmitInteger, MVT::i32, 0, |
| 992 | /* 3163*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 993 | /* 3175*/ OPC_EmitInteger, MVT::i32, 1, |
| 994 | /* 3178*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 995 | /* 3181*/ OPC_EmitInteger, MVT::i32, 0, |
| 996 | /* 3184*/ OPC_EmitInteger, MVT::i32, 0, |
| 997 | /* 3187*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 998 | MVT::i32, 18/*#Ops*/, 3, 4, 1, 5, 6, 7, 2, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 999 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$z, (xor:{ *:[i32] } i32:{ *:[i32] }:$x, -1:{ *:[i32] })), (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y)) - Complexity = 17 |
| 1000 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 1001 | /* 3211*/ 0, /*End of Scope*/ |
| 1002 | /* 3212*/ 0, /*End of Scope*/ |
| 1003 | /* 3213*/ /*Scope*/ 107|128,1/*235*/, /*->3450*/ |
| 1004 | /* 3215*/ OPC_MoveChild0, |
| 1005 | /* 3216*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 1006 | /* 3219*/ OPC_RecordChild0, // #0 = $x |
| 1007 | /* 3220*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1008 | /* 3231*/ OPC_MoveParent, |
| 1009 | /* 3232*/ OPC_RecordChild1, // #1 = $z |
| 1010 | /* 3233*/ OPC_MoveParent, |
| 1011 | /* 3234*/ OPC_MoveChild1, |
| 1012 | /* 3235*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 1013 | /* 3238*/ OPC_Scope, 104, /*->3344*/ // 2 children in Scope |
| 1014 | /* 3240*/ OPC_RecordChild0, // #2 = $y |
| 1015 | /* 3241*/ OPC_CheckChild1Same, 0, |
| 1016 | /* 3243*/ OPC_MoveParent, |
| 1017 | /* 3244*/ OPC_CheckType, MVT::i32, |
| 1018 | /* 3246*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1019 | /* 3248*/ OPC_EmitInteger, MVT::i32, 0, |
| 1020 | /* 3251*/ OPC_EmitInteger, MVT::i32, 0, |
| 1021 | /* 3254*/ OPC_EmitInteger, MVT::i32, 0, |
| 1022 | /* 3257*/ OPC_EmitInteger, MVT::i32, 0, |
| 1023 | /* 3260*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1024 | /* 3272*/ OPC_EmitInteger, MVT::i32, 0, |
| 1025 | /* 3275*/ OPC_EmitInteger, MVT::i32, 0, |
| 1026 | /* 3278*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1027 | /* 3290*/ OPC_EmitInteger, MVT::i32, 0, |
| 1028 | /* 3293*/ OPC_EmitInteger, MVT::i32, 0, |
| 1029 | /* 3296*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1030 | /* 3308*/ OPC_EmitInteger, MVT::i32, 1, |
| 1031 | /* 3311*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1032 | /* 3314*/ OPC_EmitInteger, MVT::i32, 0, |
| 1033 | /* 3317*/ OPC_EmitInteger, MVT::i32, 0, |
| 1034 | /* 3320*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1035 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 2, 8, 9, 10, 1, 11, 12, 13, 14, 15, 16, 17, |
| 1036 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$x, -1:{ *:[i32] }), i32:{ *:[i32] }:$z), (and:{ *:[i32] } i32:{ *:[i32] }:$y, i32:{ *:[i32] }:$x)) - Complexity = 17 |
| 1037 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 1038 | /* 3344*/ /*Scope*/ 104, /*->3449*/ |
| 1039 | /* 3345*/ OPC_CheckChild0Same, 0, |
| 1040 | /* 3347*/ OPC_RecordChild1, // #2 = $y |
| 1041 | /* 3348*/ OPC_MoveParent, |
| 1042 | /* 3349*/ OPC_CheckType, MVT::i32, |
| 1043 | /* 3351*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1044 | /* 3353*/ OPC_EmitInteger, MVT::i32, 0, |
| 1045 | /* 3356*/ OPC_EmitInteger, MVT::i32, 0, |
| 1046 | /* 3359*/ OPC_EmitInteger, MVT::i32, 0, |
| 1047 | /* 3362*/ OPC_EmitInteger, MVT::i32, 0, |
| 1048 | /* 3365*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1049 | /* 3377*/ OPC_EmitInteger, MVT::i32, 0, |
| 1050 | /* 3380*/ OPC_EmitInteger, MVT::i32, 0, |
| 1051 | /* 3383*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1052 | /* 3395*/ OPC_EmitInteger, MVT::i32, 0, |
| 1053 | /* 3398*/ OPC_EmitInteger, MVT::i32, 0, |
| 1054 | /* 3401*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1055 | /* 3413*/ OPC_EmitInteger, MVT::i32, 1, |
| 1056 | /* 3416*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1057 | /* 3419*/ OPC_EmitInteger, MVT::i32, 0, |
| 1058 | /* 3422*/ OPC_EmitInteger, MVT::i32, 0, |
| 1059 | /* 3425*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1060 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 2, 8, 9, 10, 1, 11, 12, 13, 14, 15, 16, 17, |
| 1061 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$x, -1:{ *:[i32] }), i32:{ *:[i32] }:$z), (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y)) - Complexity = 17 |
| 1062 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 1063 | /* 3449*/ 0, /*End of Scope*/ |
| 1064 | /* 3450*/ /*Scope*/ 39|128,14/*1831*/, /*->5283*/ |
| 1065 | /* 3452*/ OPC_RecordChild0, // #0 = $y |
| 1066 | /* 3453*/ OPC_Scope, 72|128,9/*1224*/, /*->4680*/ // 2 children in Scope |
| 1067 | /* 3456*/ OPC_RecordChild1, // #1 = $x |
| 1068 | /* 3457*/ OPC_MoveParent, |
| 1069 | /* 3458*/ OPC_MoveChild1, |
| 1070 | /* 3459*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 1071 | /* 3462*/ OPC_Scope, 46|128,2/*302*/, /*->3767*/ // 4 children in Scope |
| 1072 | /* 3465*/ OPC_RecordChild0, // #2 = $z |
| 1073 | /* 3466*/ OPC_MoveChild1, |
| 1074 | /* 3467*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 1075 | /* 3470*/ OPC_CheckChild0Same, 1, |
| 1076 | /* 3472*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1077 | /* 3483*/ OPC_MoveParent, |
| 1078 | /* 3484*/ OPC_MoveParent, |
| 1079 | /* 3485*/ OPC_CheckType, MVT::i64, |
| 1080 | /* 3487*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1081 | /* 3489*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 1082 | /* 3492*/ OPC_EmitInteger, MVT::i32, 0, |
| 1083 | /* 3495*/ OPC_EmitInteger, MVT::i32, 0, |
| 1084 | /* 3498*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1085 | /* 3501*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1086 | MVT::i32, 2/*#Ops*/, 1, 6, // Results = #7 |
| 1087 | /* 3509*/ OPC_EmitInteger, MVT::i32, 0, |
| 1088 | /* 3512*/ OPC_EmitInteger, MVT::i32, 0, |
| 1089 | /* 3515*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1090 | /* 3527*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1091 | /* 3530*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1092 | MVT::i32, 2/*#Ops*/, 0, 11, // Results = #12 |
| 1093 | /* 3538*/ OPC_EmitInteger, MVT::i32, 0, |
| 1094 | /* 3541*/ OPC_EmitInteger, MVT::i32, 0, |
| 1095 | /* 3544*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1096 | /* 3556*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1097 | /* 3559*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1098 | MVT::i32, 2/*#Ops*/, 2, 16, // Results = #17 |
| 1099 | /* 3567*/ OPC_EmitInteger, MVT::i32, 0, |
| 1100 | /* 3570*/ OPC_EmitInteger, MVT::i32, 0, |
| 1101 | /* 3573*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1102 | /* 3585*/ OPC_EmitInteger, MVT::i32, 1, |
| 1103 | /* 3588*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1104 | /* 3591*/ OPC_EmitInteger, MVT::i32, 0, |
| 1105 | /* 3594*/ OPC_EmitInteger, MVT::i32, 0, |
| 1106 | /* 3597*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1107 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 1108 | /* 3621*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1109 | /* 3624*/ OPC_EmitInteger, MVT::i32, 0, |
| 1110 | /* 3627*/ OPC_EmitInteger, MVT::i32, 0, |
| 1111 | /* 3630*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1112 | /* 3633*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1113 | MVT::i32, 2/*#Ops*/, 1, 29, // Results = #30 |
| 1114 | /* 3641*/ OPC_EmitInteger, MVT::i32, 0, |
| 1115 | /* 3644*/ OPC_EmitInteger, MVT::i32, 0, |
| 1116 | /* 3647*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1117 | /* 3659*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1118 | /* 3662*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1119 | MVT::i32, 2/*#Ops*/, 0, 34, // Results = #35 |
| 1120 | /* 3670*/ OPC_EmitInteger, MVT::i32, 0, |
| 1121 | /* 3673*/ OPC_EmitInteger, MVT::i32, 0, |
| 1122 | /* 3676*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1123 | /* 3688*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1124 | /* 3691*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1125 | MVT::i32, 2/*#Ops*/, 2, 39, // Results = #40 |
| 1126 | /* 3699*/ OPC_EmitInteger, MVT::i32, 0, |
| 1127 | /* 3702*/ OPC_EmitInteger, MVT::i32, 0, |
| 1128 | /* 3705*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1129 | /* 3717*/ OPC_EmitInteger, MVT::i32, 1, |
| 1130 | /* 3720*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1131 | /* 3723*/ OPC_EmitInteger, MVT::i32, 0, |
| 1132 | /* 3726*/ OPC_EmitInteger, MVT::i32, 0, |
| 1133 | /* 3729*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1134 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 1135 | /* 3753*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1136 | /* 3756*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 1137 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 1138 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$y, i64:{ *:[i64] }:$x), (and:{ *:[i64] } i64:{ *:[i64] }:$z, (xor:{ *:[i64] } i64:{ *:[i64] }:$x, -1:{ *:[i64] }))) - Complexity = 17 |
| 1139 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 1140 | /* 3767*/ /*Scope*/ 46|128,2/*302*/, /*->4071*/ |
| 1141 | /* 3769*/ OPC_MoveChild0, |
| 1142 | /* 3770*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 1143 | /* 3773*/ OPC_CheckChild0Same, 1, |
| 1144 | /* 3775*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1145 | /* 3786*/ OPC_MoveParent, |
| 1146 | /* 3787*/ OPC_RecordChild1, // #2 = $z |
| 1147 | /* 3788*/ OPC_MoveParent, |
| 1148 | /* 3789*/ OPC_CheckType, MVT::i64, |
| 1149 | /* 3791*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1150 | /* 3793*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 1151 | /* 3796*/ OPC_EmitInteger, MVT::i32, 0, |
| 1152 | /* 3799*/ OPC_EmitInteger, MVT::i32, 0, |
| 1153 | /* 3802*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1154 | /* 3805*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1155 | MVT::i32, 2/*#Ops*/, 1, 6, // Results = #7 |
| 1156 | /* 3813*/ OPC_EmitInteger, MVT::i32, 0, |
| 1157 | /* 3816*/ OPC_EmitInteger, MVT::i32, 0, |
| 1158 | /* 3819*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1159 | /* 3831*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1160 | /* 3834*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1161 | MVT::i32, 2/*#Ops*/, 0, 11, // Results = #12 |
| 1162 | /* 3842*/ OPC_EmitInteger, MVT::i32, 0, |
| 1163 | /* 3845*/ OPC_EmitInteger, MVT::i32, 0, |
| 1164 | /* 3848*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1165 | /* 3860*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1166 | /* 3863*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1167 | MVT::i32, 2/*#Ops*/, 2, 16, // Results = #17 |
| 1168 | /* 3871*/ OPC_EmitInteger, MVT::i32, 0, |
| 1169 | /* 3874*/ OPC_EmitInteger, MVT::i32, 0, |
| 1170 | /* 3877*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1171 | /* 3889*/ OPC_EmitInteger, MVT::i32, 1, |
| 1172 | /* 3892*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1173 | /* 3895*/ OPC_EmitInteger, MVT::i32, 0, |
| 1174 | /* 3898*/ OPC_EmitInteger, MVT::i32, 0, |
| 1175 | /* 3901*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1176 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 1177 | /* 3925*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1178 | /* 3928*/ OPC_EmitInteger, MVT::i32, 0, |
| 1179 | /* 3931*/ OPC_EmitInteger, MVT::i32, 0, |
| 1180 | /* 3934*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1181 | /* 3937*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1182 | MVT::i32, 2/*#Ops*/, 1, 29, // Results = #30 |
| 1183 | /* 3945*/ OPC_EmitInteger, MVT::i32, 0, |
| 1184 | /* 3948*/ OPC_EmitInteger, MVT::i32, 0, |
| 1185 | /* 3951*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1186 | /* 3963*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1187 | /* 3966*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1188 | MVT::i32, 2/*#Ops*/, 0, 34, // Results = #35 |
| 1189 | /* 3974*/ OPC_EmitInteger, MVT::i32, 0, |
| 1190 | /* 3977*/ OPC_EmitInteger, MVT::i32, 0, |
| 1191 | /* 3980*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1192 | /* 3992*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1193 | /* 3995*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1194 | MVT::i32, 2/*#Ops*/, 2, 39, // Results = #40 |
| 1195 | /* 4003*/ OPC_EmitInteger, MVT::i32, 0, |
| 1196 | /* 4006*/ OPC_EmitInteger, MVT::i32, 0, |
| 1197 | /* 4009*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1198 | /* 4021*/ OPC_EmitInteger, MVT::i32, 1, |
| 1199 | /* 4024*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1200 | /* 4027*/ OPC_EmitInteger, MVT::i32, 0, |
| 1201 | /* 4030*/ OPC_EmitInteger, MVT::i32, 0, |
| 1202 | /* 4033*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1203 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 1204 | /* 4057*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1205 | /* 4060*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 1206 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 1207 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$y, i64:{ *:[i64] }:$x), (and:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$x, -1:{ *:[i64] }), i64:{ *:[i64] }:$z)) - Complexity = 17 |
| 1208 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 1209 | /* 4071*/ /*Scope*/ 46|128,2/*302*/, /*->4375*/ |
| 1210 | /* 4073*/ OPC_RecordChild0, // #2 = $z |
| 1211 | /* 4074*/ OPC_MoveChild1, |
| 1212 | /* 4075*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 1213 | /* 4078*/ OPC_CheckChild0Same, 0, |
| 1214 | /* 4080*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1215 | /* 4091*/ OPC_MoveParent, |
| 1216 | /* 4092*/ OPC_MoveParent, |
| 1217 | /* 4093*/ OPC_CheckType, MVT::i64, |
| 1218 | /* 4095*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1219 | /* 4097*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 1220 | /* 4100*/ OPC_EmitInteger, MVT::i32, 0, |
| 1221 | /* 4103*/ OPC_EmitInteger, MVT::i32, 0, |
| 1222 | /* 4106*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1223 | /* 4109*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1224 | MVT::i32, 2/*#Ops*/, 0, 6, // Results = #7 |
| 1225 | /* 4117*/ OPC_EmitInteger, MVT::i32, 0, |
| 1226 | /* 4120*/ OPC_EmitInteger, MVT::i32, 0, |
| 1227 | /* 4123*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1228 | /* 4135*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1229 | /* 4138*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1230 | MVT::i32, 2/*#Ops*/, 1, 11, // Results = #12 |
| 1231 | /* 4146*/ OPC_EmitInteger, MVT::i32, 0, |
| 1232 | /* 4149*/ OPC_EmitInteger, MVT::i32, 0, |
| 1233 | /* 4152*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1234 | /* 4164*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1235 | /* 4167*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1236 | MVT::i32, 2/*#Ops*/, 2, 16, // Results = #17 |
| 1237 | /* 4175*/ OPC_EmitInteger, MVT::i32, 0, |
| 1238 | /* 4178*/ OPC_EmitInteger, MVT::i32, 0, |
| 1239 | /* 4181*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1240 | /* 4193*/ OPC_EmitInteger, MVT::i32, 1, |
| 1241 | /* 4196*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1242 | /* 4199*/ OPC_EmitInteger, MVT::i32, 0, |
| 1243 | /* 4202*/ OPC_EmitInteger, MVT::i32, 0, |
| 1244 | /* 4205*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1245 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 1246 | /* 4229*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1247 | /* 4232*/ OPC_EmitInteger, MVT::i32, 0, |
| 1248 | /* 4235*/ OPC_EmitInteger, MVT::i32, 0, |
| 1249 | /* 4238*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1250 | /* 4241*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1251 | MVT::i32, 2/*#Ops*/, 0, 29, // Results = #30 |
| 1252 | /* 4249*/ OPC_EmitInteger, MVT::i32, 0, |
| 1253 | /* 4252*/ OPC_EmitInteger, MVT::i32, 0, |
| 1254 | /* 4255*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1255 | /* 4267*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1256 | /* 4270*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1257 | MVT::i32, 2/*#Ops*/, 1, 34, // Results = #35 |
| 1258 | /* 4278*/ OPC_EmitInteger, MVT::i32, 0, |
| 1259 | /* 4281*/ OPC_EmitInteger, MVT::i32, 0, |
| 1260 | /* 4284*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1261 | /* 4296*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1262 | /* 4299*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1263 | MVT::i32, 2/*#Ops*/, 2, 39, // Results = #40 |
| 1264 | /* 4307*/ OPC_EmitInteger, MVT::i32, 0, |
| 1265 | /* 4310*/ OPC_EmitInteger, MVT::i32, 0, |
| 1266 | /* 4313*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1267 | /* 4325*/ OPC_EmitInteger, MVT::i32, 1, |
| 1268 | /* 4328*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1269 | /* 4331*/ OPC_EmitInteger, MVT::i32, 0, |
| 1270 | /* 4334*/ OPC_EmitInteger, MVT::i32, 0, |
| 1271 | /* 4337*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1272 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 1273 | /* 4361*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1274 | /* 4364*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 1275 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 1276 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$y), (and:{ *:[i64] } i64:{ *:[i64] }:$z, (xor:{ *:[i64] } i64:{ *:[i64] }:$x, -1:{ *:[i64] }))) - Complexity = 17 |
| 1277 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 1278 | /* 4375*/ /*Scope*/ 46|128,2/*302*/, /*->4679*/ |
| 1279 | /* 4377*/ OPC_MoveChild0, |
| 1280 | /* 4378*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 1281 | /* 4381*/ OPC_CheckChild0Same, 0, |
| 1282 | /* 4383*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1283 | /* 4394*/ OPC_MoveParent, |
| 1284 | /* 4395*/ OPC_RecordChild1, // #2 = $z |
| 1285 | /* 4396*/ OPC_MoveParent, |
| 1286 | /* 4397*/ OPC_CheckType, MVT::i64, |
| 1287 | /* 4399*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1288 | /* 4401*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 1289 | /* 4404*/ OPC_EmitInteger, MVT::i32, 0, |
| 1290 | /* 4407*/ OPC_EmitInteger, MVT::i32, 0, |
| 1291 | /* 4410*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1292 | /* 4413*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1293 | MVT::i32, 2/*#Ops*/, 0, 6, // Results = #7 |
| 1294 | /* 4421*/ OPC_EmitInteger, MVT::i32, 0, |
| 1295 | /* 4424*/ OPC_EmitInteger, MVT::i32, 0, |
| 1296 | /* 4427*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1297 | /* 4439*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1298 | /* 4442*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1299 | MVT::i32, 2/*#Ops*/, 1, 11, // Results = #12 |
| 1300 | /* 4450*/ OPC_EmitInteger, MVT::i32, 0, |
| 1301 | /* 4453*/ OPC_EmitInteger, MVT::i32, 0, |
| 1302 | /* 4456*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1303 | /* 4468*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1304 | /* 4471*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1305 | MVT::i32, 2/*#Ops*/, 2, 16, // Results = #17 |
| 1306 | /* 4479*/ OPC_EmitInteger, MVT::i32, 0, |
| 1307 | /* 4482*/ OPC_EmitInteger, MVT::i32, 0, |
| 1308 | /* 4485*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1309 | /* 4497*/ OPC_EmitInteger, MVT::i32, 1, |
| 1310 | /* 4500*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1311 | /* 4503*/ OPC_EmitInteger, MVT::i32, 0, |
| 1312 | /* 4506*/ OPC_EmitInteger, MVT::i32, 0, |
| 1313 | /* 4509*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1314 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 1315 | /* 4533*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1316 | /* 4536*/ OPC_EmitInteger, MVT::i32, 0, |
| 1317 | /* 4539*/ OPC_EmitInteger, MVT::i32, 0, |
| 1318 | /* 4542*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1319 | /* 4545*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1320 | MVT::i32, 2/*#Ops*/, 0, 29, // Results = #30 |
| 1321 | /* 4553*/ OPC_EmitInteger, MVT::i32, 0, |
| 1322 | /* 4556*/ OPC_EmitInteger, MVT::i32, 0, |
| 1323 | /* 4559*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1324 | /* 4571*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1325 | /* 4574*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1326 | MVT::i32, 2/*#Ops*/, 1, 34, // Results = #35 |
| 1327 | /* 4582*/ OPC_EmitInteger, MVT::i32, 0, |
| 1328 | /* 4585*/ OPC_EmitInteger, MVT::i32, 0, |
| 1329 | /* 4588*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1330 | /* 4600*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1331 | /* 4603*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1332 | MVT::i32, 2/*#Ops*/, 2, 39, // Results = #40 |
| 1333 | /* 4611*/ OPC_EmitInteger, MVT::i32, 0, |
| 1334 | /* 4614*/ OPC_EmitInteger, MVT::i32, 0, |
| 1335 | /* 4617*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1336 | /* 4629*/ OPC_EmitInteger, MVT::i32, 1, |
| 1337 | /* 4632*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1338 | /* 4635*/ OPC_EmitInteger, MVT::i32, 0, |
| 1339 | /* 4638*/ OPC_EmitInteger, MVT::i32, 0, |
| 1340 | /* 4641*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1341 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 1342 | /* 4665*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1343 | /* 4668*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 1344 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 1345 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$y), (and:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$x, -1:{ *:[i64] }), i64:{ *:[i64] }:$z)) - Complexity = 17 |
| 1346 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 1347 | /* 4679*/ 0, /*End of Scope*/ |
| 1348 | /* 4680*/ /*Scope*/ 88|128,4/*600*/, /*->5282*/ |
| 1349 | /* 4682*/ OPC_MoveChild1, |
| 1350 | /* 4683*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 1351 | /* 4686*/ OPC_RecordChild0, // #1 = $x |
| 1352 | /* 4687*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1353 | /* 4698*/ OPC_MoveParent, |
| 1354 | /* 4699*/ OPC_MoveParent, |
| 1355 | /* 4700*/ OPC_MoveChild1, |
| 1356 | /* 4701*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 1357 | /* 4704*/ OPC_Scope, 30|128,2/*286*/, /*->4993*/ // 2 children in Scope |
| 1358 | /* 4707*/ OPC_RecordChild0, // #2 = $y |
| 1359 | /* 4708*/ OPC_CheckChild1Same, 1, |
| 1360 | /* 4710*/ OPC_MoveParent, |
| 1361 | /* 4711*/ OPC_CheckType, MVT::i64, |
| 1362 | /* 4713*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1363 | /* 4715*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 1364 | /* 4718*/ OPC_EmitInteger, MVT::i32, 0, |
| 1365 | /* 4721*/ OPC_EmitInteger, MVT::i32, 0, |
| 1366 | /* 4724*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1367 | /* 4727*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1368 | MVT::i32, 2/*#Ops*/, 1, 6, // Results = #7 |
| 1369 | /* 4735*/ OPC_EmitInteger, MVT::i32, 0, |
| 1370 | /* 4738*/ OPC_EmitInteger, MVT::i32, 0, |
| 1371 | /* 4741*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1372 | /* 4753*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1373 | /* 4756*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1374 | MVT::i32, 2/*#Ops*/, 2, 11, // Results = #12 |
| 1375 | /* 4764*/ OPC_EmitInteger, MVT::i32, 0, |
| 1376 | /* 4767*/ OPC_EmitInteger, MVT::i32, 0, |
| 1377 | /* 4770*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1378 | /* 4782*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1379 | /* 4785*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1380 | MVT::i32, 2/*#Ops*/, 0, 16, // Results = #17 |
| 1381 | /* 4793*/ OPC_EmitInteger, MVT::i32, 0, |
| 1382 | /* 4796*/ OPC_EmitInteger, MVT::i32, 0, |
| 1383 | /* 4799*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1384 | /* 4811*/ OPC_EmitInteger, MVT::i32, 1, |
| 1385 | /* 4814*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1386 | /* 4817*/ OPC_EmitInteger, MVT::i32, 0, |
| 1387 | /* 4820*/ OPC_EmitInteger, MVT::i32, 0, |
| 1388 | /* 4823*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1389 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 1390 | /* 4847*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1391 | /* 4850*/ OPC_EmitInteger, MVT::i32, 0, |
| 1392 | /* 4853*/ OPC_EmitInteger, MVT::i32, 0, |
| 1393 | /* 4856*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1394 | /* 4859*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1395 | MVT::i32, 2/*#Ops*/, 1, 29, // Results = #30 |
| 1396 | /* 4867*/ OPC_EmitInteger, MVT::i32, 0, |
| 1397 | /* 4870*/ OPC_EmitInteger, MVT::i32, 0, |
| 1398 | /* 4873*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1399 | /* 4885*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1400 | /* 4888*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1401 | MVT::i32, 2/*#Ops*/, 2, 34, // Results = #35 |
| 1402 | /* 4896*/ OPC_EmitInteger, MVT::i32, 0, |
| 1403 | /* 4899*/ OPC_EmitInteger, MVT::i32, 0, |
| 1404 | /* 4902*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1405 | /* 4914*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1406 | /* 4917*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1407 | MVT::i32, 2/*#Ops*/, 0, 39, // Results = #40 |
| 1408 | /* 4925*/ OPC_EmitInteger, MVT::i32, 0, |
| 1409 | /* 4928*/ OPC_EmitInteger, MVT::i32, 0, |
| 1410 | /* 4931*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1411 | /* 4943*/ OPC_EmitInteger, MVT::i32, 1, |
| 1412 | /* 4946*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1413 | /* 4949*/ OPC_EmitInteger, MVT::i32, 0, |
| 1414 | /* 4952*/ OPC_EmitInteger, MVT::i32, 0, |
| 1415 | /* 4955*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1416 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 1417 | /* 4979*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1418 | /* 4982*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 1419 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 1420 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$z, (xor:{ *:[i64] } i64:{ *:[i64] }:$x, -1:{ *:[i64] })), (and:{ *:[i64] } i64:{ *:[i64] }:$y, i64:{ *:[i64] }:$x)) - Complexity = 17 |
| 1421 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 1422 | /* 4993*/ /*Scope*/ 30|128,2/*286*/, /*->5281*/ |
| 1423 | /* 4995*/ OPC_CheckChild0Same, 1, |
| 1424 | /* 4997*/ OPC_RecordChild1, // #2 = $y |
| 1425 | /* 4998*/ OPC_MoveParent, |
| 1426 | /* 4999*/ OPC_CheckType, MVT::i64, |
| 1427 | /* 5001*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1428 | /* 5003*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 1429 | /* 5006*/ OPC_EmitInteger, MVT::i32, 0, |
| 1430 | /* 5009*/ OPC_EmitInteger, MVT::i32, 0, |
| 1431 | /* 5012*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1432 | /* 5015*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1433 | MVT::i32, 2/*#Ops*/, 1, 6, // Results = #7 |
| 1434 | /* 5023*/ OPC_EmitInteger, MVT::i32, 0, |
| 1435 | /* 5026*/ OPC_EmitInteger, MVT::i32, 0, |
| 1436 | /* 5029*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1437 | /* 5041*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1438 | /* 5044*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1439 | MVT::i32, 2/*#Ops*/, 2, 11, // Results = #12 |
| 1440 | /* 5052*/ OPC_EmitInteger, MVT::i32, 0, |
| 1441 | /* 5055*/ OPC_EmitInteger, MVT::i32, 0, |
| 1442 | /* 5058*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1443 | /* 5070*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1444 | /* 5073*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1445 | MVT::i32, 2/*#Ops*/, 0, 16, // Results = #17 |
| 1446 | /* 5081*/ OPC_EmitInteger, MVT::i32, 0, |
| 1447 | /* 5084*/ OPC_EmitInteger, MVT::i32, 0, |
| 1448 | /* 5087*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1449 | /* 5099*/ OPC_EmitInteger, MVT::i32, 1, |
| 1450 | /* 5102*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1451 | /* 5105*/ OPC_EmitInteger, MVT::i32, 0, |
| 1452 | /* 5108*/ OPC_EmitInteger, MVT::i32, 0, |
| 1453 | /* 5111*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1454 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 1455 | /* 5135*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1456 | /* 5138*/ OPC_EmitInteger, MVT::i32, 0, |
| 1457 | /* 5141*/ OPC_EmitInteger, MVT::i32, 0, |
| 1458 | /* 5144*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1459 | /* 5147*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1460 | MVT::i32, 2/*#Ops*/, 1, 29, // Results = #30 |
| 1461 | /* 5155*/ OPC_EmitInteger, MVT::i32, 0, |
| 1462 | /* 5158*/ OPC_EmitInteger, MVT::i32, 0, |
| 1463 | /* 5161*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1464 | /* 5173*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1465 | /* 5176*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1466 | MVT::i32, 2/*#Ops*/, 2, 34, // Results = #35 |
| 1467 | /* 5184*/ OPC_EmitInteger, MVT::i32, 0, |
| 1468 | /* 5187*/ OPC_EmitInteger, MVT::i32, 0, |
| 1469 | /* 5190*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1470 | /* 5202*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1471 | /* 5205*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1472 | MVT::i32, 2/*#Ops*/, 0, 39, // Results = #40 |
| 1473 | /* 5213*/ OPC_EmitInteger, MVT::i32, 0, |
| 1474 | /* 5216*/ OPC_EmitInteger, MVT::i32, 0, |
| 1475 | /* 5219*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1476 | /* 5231*/ OPC_EmitInteger, MVT::i32, 1, |
| 1477 | /* 5234*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1478 | /* 5237*/ OPC_EmitInteger, MVT::i32, 0, |
| 1479 | /* 5240*/ OPC_EmitInteger, MVT::i32, 0, |
| 1480 | /* 5243*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1481 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 1482 | /* 5267*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1483 | /* 5270*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 1484 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 1485 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$z, (xor:{ *:[i64] } i64:{ *:[i64] }:$x, -1:{ *:[i64] })), (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$y)) - Complexity = 17 |
| 1486 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 1487 | /* 5281*/ 0, /*End of Scope*/ |
| 1488 | /* 5282*/ 0, /*End of Scope*/ |
| 1489 | /* 5283*/ /*Scope*/ 89|128,4/*601*/, /*->5886*/ |
| 1490 | /* 5285*/ OPC_MoveChild0, |
| 1491 | /* 5286*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 1492 | /* 5289*/ OPC_RecordChild0, // #0 = $x |
| 1493 | /* 5290*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1494 | /* 5301*/ OPC_MoveParent, |
| 1495 | /* 5302*/ OPC_RecordChild1, // #1 = $z |
| 1496 | /* 5303*/ OPC_MoveParent, |
| 1497 | /* 5304*/ OPC_MoveChild1, |
| 1498 | /* 5305*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 1499 | /* 5308*/ OPC_Scope, 30|128,2/*286*/, /*->5597*/ // 2 children in Scope |
| 1500 | /* 5311*/ OPC_RecordChild0, // #2 = $y |
| 1501 | /* 5312*/ OPC_CheckChild1Same, 0, |
| 1502 | /* 5314*/ OPC_MoveParent, |
| 1503 | /* 5315*/ OPC_CheckType, MVT::i64, |
| 1504 | /* 5317*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1505 | /* 5319*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 1506 | /* 5322*/ OPC_EmitInteger, MVT::i32, 0, |
| 1507 | /* 5325*/ OPC_EmitInteger, MVT::i32, 0, |
| 1508 | /* 5328*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1509 | /* 5331*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1510 | MVT::i32, 2/*#Ops*/, 0, 6, // Results = #7 |
| 1511 | /* 5339*/ OPC_EmitInteger, MVT::i32, 0, |
| 1512 | /* 5342*/ OPC_EmitInteger, MVT::i32, 0, |
| 1513 | /* 5345*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1514 | /* 5357*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1515 | /* 5360*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1516 | MVT::i32, 2/*#Ops*/, 2, 11, // Results = #12 |
| 1517 | /* 5368*/ OPC_EmitInteger, MVT::i32, 0, |
| 1518 | /* 5371*/ OPC_EmitInteger, MVT::i32, 0, |
| 1519 | /* 5374*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1520 | /* 5386*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1521 | /* 5389*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1522 | MVT::i32, 2/*#Ops*/, 1, 16, // Results = #17 |
| 1523 | /* 5397*/ OPC_EmitInteger, MVT::i32, 0, |
| 1524 | /* 5400*/ OPC_EmitInteger, MVT::i32, 0, |
| 1525 | /* 5403*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1526 | /* 5415*/ OPC_EmitInteger, MVT::i32, 1, |
| 1527 | /* 5418*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1528 | /* 5421*/ OPC_EmitInteger, MVT::i32, 0, |
| 1529 | /* 5424*/ OPC_EmitInteger, MVT::i32, 0, |
| 1530 | /* 5427*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1531 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 1532 | /* 5451*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1533 | /* 5454*/ OPC_EmitInteger, MVT::i32, 0, |
| 1534 | /* 5457*/ OPC_EmitInteger, MVT::i32, 0, |
| 1535 | /* 5460*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1536 | /* 5463*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1537 | MVT::i32, 2/*#Ops*/, 0, 29, // Results = #30 |
| 1538 | /* 5471*/ OPC_EmitInteger, MVT::i32, 0, |
| 1539 | /* 5474*/ OPC_EmitInteger, MVT::i32, 0, |
| 1540 | /* 5477*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1541 | /* 5489*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1542 | /* 5492*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1543 | MVT::i32, 2/*#Ops*/, 2, 34, // Results = #35 |
| 1544 | /* 5500*/ OPC_EmitInteger, MVT::i32, 0, |
| 1545 | /* 5503*/ OPC_EmitInteger, MVT::i32, 0, |
| 1546 | /* 5506*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1547 | /* 5518*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1548 | /* 5521*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1549 | MVT::i32, 2/*#Ops*/, 1, 39, // Results = #40 |
| 1550 | /* 5529*/ OPC_EmitInteger, MVT::i32, 0, |
| 1551 | /* 5532*/ OPC_EmitInteger, MVT::i32, 0, |
| 1552 | /* 5535*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1553 | /* 5547*/ OPC_EmitInteger, MVT::i32, 1, |
| 1554 | /* 5550*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1555 | /* 5553*/ OPC_EmitInteger, MVT::i32, 0, |
| 1556 | /* 5556*/ OPC_EmitInteger, MVT::i32, 0, |
| 1557 | /* 5559*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1558 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 1559 | /* 5583*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1560 | /* 5586*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 1561 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 1562 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$x, -1:{ *:[i64] }), i64:{ *:[i64] }:$z), (and:{ *:[i64] } i64:{ *:[i64] }:$y, i64:{ *:[i64] }:$x)) - Complexity = 17 |
| 1563 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 1564 | /* 5597*/ /*Scope*/ 30|128,2/*286*/, /*->5885*/ |
| 1565 | /* 5599*/ OPC_CheckChild0Same, 0, |
| 1566 | /* 5601*/ OPC_RecordChild1, // #2 = $y |
| 1567 | /* 5602*/ OPC_MoveParent, |
| 1568 | /* 5603*/ OPC_CheckType, MVT::i64, |
| 1569 | /* 5605*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1570 | /* 5607*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 1571 | /* 5610*/ OPC_EmitInteger, MVT::i32, 0, |
| 1572 | /* 5613*/ OPC_EmitInteger, MVT::i32, 0, |
| 1573 | /* 5616*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1574 | /* 5619*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1575 | MVT::i32, 2/*#Ops*/, 0, 6, // Results = #7 |
| 1576 | /* 5627*/ OPC_EmitInteger, MVT::i32, 0, |
| 1577 | /* 5630*/ OPC_EmitInteger, MVT::i32, 0, |
| 1578 | /* 5633*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1579 | /* 5645*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1580 | /* 5648*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1581 | MVT::i32, 2/*#Ops*/, 2, 11, // Results = #12 |
| 1582 | /* 5656*/ OPC_EmitInteger, MVT::i32, 0, |
| 1583 | /* 5659*/ OPC_EmitInteger, MVT::i32, 0, |
| 1584 | /* 5662*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1585 | /* 5674*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1586 | /* 5677*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1587 | MVT::i32, 2/*#Ops*/, 1, 16, // Results = #17 |
| 1588 | /* 5685*/ OPC_EmitInteger, MVT::i32, 0, |
| 1589 | /* 5688*/ OPC_EmitInteger, MVT::i32, 0, |
| 1590 | /* 5691*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1591 | /* 5703*/ OPC_EmitInteger, MVT::i32, 1, |
| 1592 | /* 5706*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1593 | /* 5709*/ OPC_EmitInteger, MVT::i32, 0, |
| 1594 | /* 5712*/ OPC_EmitInteger, MVT::i32, 0, |
| 1595 | /* 5715*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1596 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 1597 | /* 5739*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 1598 | /* 5742*/ OPC_EmitInteger, MVT::i32, 0, |
| 1599 | /* 5745*/ OPC_EmitInteger, MVT::i32, 0, |
| 1600 | /* 5748*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1601 | /* 5751*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1602 | MVT::i32, 2/*#Ops*/, 0, 29, // Results = #30 |
| 1603 | /* 5759*/ OPC_EmitInteger, MVT::i32, 0, |
| 1604 | /* 5762*/ OPC_EmitInteger, MVT::i32, 0, |
| 1605 | /* 5765*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1606 | /* 5777*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1607 | /* 5780*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1608 | MVT::i32, 2/*#Ops*/, 2, 34, // Results = #35 |
| 1609 | /* 5788*/ OPC_EmitInteger, MVT::i32, 0, |
| 1610 | /* 5791*/ OPC_EmitInteger, MVT::i32, 0, |
| 1611 | /* 5794*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1612 | /* 5806*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1613 | /* 5809*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 1614 | MVT::i32, 2/*#Ops*/, 1, 39, // Results = #40 |
| 1615 | /* 5817*/ OPC_EmitInteger, MVT::i32, 0, |
| 1616 | /* 5820*/ OPC_EmitInteger, MVT::i32, 0, |
| 1617 | /* 5823*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1618 | /* 5835*/ OPC_EmitInteger, MVT::i32, 1, |
| 1619 | /* 5838*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1620 | /* 5841*/ OPC_EmitInteger, MVT::i32, 0, |
| 1621 | /* 5844*/ OPC_EmitInteger, MVT::i32, 0, |
| 1622 | /* 5847*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1623 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 1624 | /* 5871*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 1625 | /* 5874*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 1626 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 1627 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$x, -1:{ *:[i64] }), i64:{ *:[i64] }:$z), (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$y)) - Complexity = 17 |
| 1628 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 1629 | /* 5885*/ 0, /*End of Scope*/ |
| 1630 | /* 5886*/ /*Scope*/ 18|128,19/*2450*/, /*->8338*/ |
| 1631 | /* 5888*/ OPC_RecordChild0, // #0 = $x |
| 1632 | /* 5889*/ OPC_Scope, 30|128,13/*1694*/, /*->7586*/ // 2 children in Scope |
| 1633 | /* 5892*/ OPC_RecordChild1, // #1 = $z |
| 1634 | /* 5893*/ OPC_MoveParent, |
| 1635 | /* 5894*/ OPC_MoveChild1, |
| 1636 | /* 5895*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 1637 | /* 5898*/ OPC_Scope, 35|128,3/*419*/, /*->6320*/ // 4 children in Scope |
| 1638 | /* 5901*/ OPC_RecordChild0, // #2 = $y |
| 1639 | /* 5902*/ OPC_MoveChild1, |
| 1640 | /* 5903*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 1641 | /* 5906*/ OPC_Scope, 76|128,1/*204*/, /*->6113*/ // 2 children in Scope |
| 1642 | /* 5909*/ OPC_CheckChild0Same, 0, |
| 1643 | /* 5911*/ OPC_CheckChild1Same, 1, |
| 1644 | /* 5913*/ OPC_MoveParent, |
| 1645 | /* 5914*/ OPC_MoveParent, |
| 1646 | /* 5915*/ OPC_CheckType, MVT::i32, |
| 1647 | /* 5917*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1648 | /* 5919*/ OPC_EmitInteger, MVT::i32, 0, |
| 1649 | /* 5922*/ OPC_EmitInteger, MVT::i32, 0, |
| 1650 | /* 5925*/ OPC_EmitInteger, MVT::i32, 0, |
| 1651 | /* 5928*/ OPC_EmitInteger, MVT::i32, 0, |
| 1652 | /* 5931*/ OPC_EmitInteger, MVT::i32, 1, |
| 1653 | /* 5934*/ OPC_EmitInteger, MVT::i32, 0, |
| 1654 | /* 5937*/ OPC_EmitInteger, MVT::i32, 0, |
| 1655 | /* 5940*/ OPC_EmitInteger, MVT::i32, 0, |
| 1656 | /* 5943*/ OPC_EmitInteger, MVT::i32, 0, |
| 1657 | /* 5946*/ OPC_EmitInteger, MVT::i32, 0, |
| 1658 | /* 5949*/ OPC_EmitInteger, MVT::i32, 0, |
| 1659 | /* 5952*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1660 | /* 5964*/ OPC_EmitInteger, MVT::i32, 0, |
| 1661 | /* 5967*/ OPC_EmitInteger, MVT::i32, 0, |
| 1662 | /* 5970*/ OPC_EmitInteger, MVT::i32, 0, |
| 1663 | /* 5973*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1664 | /* 5985*/ OPC_EmitInteger, MVT::i32, 1, |
| 1665 | /* 5988*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1666 | /* 5991*/ OPC_EmitInteger, MVT::i32, 0, |
| 1667 | /* 5994*/ OPC_EmitInteger, MVT::i32, 0, |
| 1668 | /* 5997*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 1669 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 0, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 1670 | /* 6023*/ OPC_EmitInteger, MVT::i32, 0, |
| 1671 | /* 6026*/ OPC_EmitInteger, MVT::i32, 0, |
| 1672 | /* 6029*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1673 | /* 6041*/ OPC_EmitInteger, MVT::i32, 0, |
| 1674 | /* 6044*/ OPC_EmitInteger, MVT::i32, 0, |
| 1675 | /* 6047*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1676 | /* 6059*/ OPC_EmitInteger, MVT::i32, 0, |
| 1677 | /* 6062*/ OPC_EmitInteger, MVT::i32, 0, |
| 1678 | /* 6065*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1679 | /* 6077*/ OPC_EmitInteger, MVT::i32, 1, |
| 1680 | /* 6080*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1681 | /* 6083*/ OPC_EmitInteger, MVT::i32, 0, |
| 1682 | /* 6086*/ OPC_EmitInteger, MVT::i32, 0, |
| 1683 | /* 6089*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1684 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 1, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 1685 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z), (and:{ *:[i32] } i32:{ *:[i32] }:$y, (or:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z))) - Complexity = 12 |
| 1686 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 1687 | /* 6113*/ /*Scope*/ 76|128,1/*204*/, /*->6319*/ |
| 1688 | /* 6115*/ OPC_CheckChild0Same, 1, |
| 1689 | /* 6117*/ OPC_CheckChild1Same, 0, |
| 1690 | /* 6119*/ OPC_MoveParent, |
| 1691 | /* 6120*/ OPC_MoveParent, |
| 1692 | /* 6121*/ OPC_CheckType, MVT::i32, |
| 1693 | /* 6123*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1694 | /* 6125*/ OPC_EmitInteger, MVT::i32, 0, |
| 1695 | /* 6128*/ OPC_EmitInteger, MVT::i32, 0, |
| 1696 | /* 6131*/ OPC_EmitInteger, MVT::i32, 0, |
| 1697 | /* 6134*/ OPC_EmitInteger, MVT::i32, 0, |
| 1698 | /* 6137*/ OPC_EmitInteger, MVT::i32, 1, |
| 1699 | /* 6140*/ OPC_EmitInteger, MVT::i32, 0, |
| 1700 | /* 6143*/ OPC_EmitInteger, MVT::i32, 0, |
| 1701 | /* 6146*/ OPC_EmitInteger, MVT::i32, 0, |
| 1702 | /* 6149*/ OPC_EmitInteger, MVT::i32, 0, |
| 1703 | /* 6152*/ OPC_EmitInteger, MVT::i32, 0, |
| 1704 | /* 6155*/ OPC_EmitInteger, MVT::i32, 0, |
| 1705 | /* 6158*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1706 | /* 6170*/ OPC_EmitInteger, MVT::i32, 0, |
| 1707 | /* 6173*/ OPC_EmitInteger, MVT::i32, 0, |
| 1708 | /* 6176*/ OPC_EmitInteger, MVT::i32, 0, |
| 1709 | /* 6179*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1710 | /* 6191*/ OPC_EmitInteger, MVT::i32, 1, |
| 1711 | /* 6194*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1712 | /* 6197*/ OPC_EmitInteger, MVT::i32, 0, |
| 1713 | /* 6200*/ OPC_EmitInteger, MVT::i32, 0, |
| 1714 | /* 6203*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 1715 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 0, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 1716 | /* 6229*/ OPC_EmitInteger, MVT::i32, 0, |
| 1717 | /* 6232*/ OPC_EmitInteger, MVT::i32, 0, |
| 1718 | /* 6235*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1719 | /* 6247*/ OPC_EmitInteger, MVT::i32, 0, |
| 1720 | /* 6250*/ OPC_EmitInteger, MVT::i32, 0, |
| 1721 | /* 6253*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1722 | /* 6265*/ OPC_EmitInteger, MVT::i32, 0, |
| 1723 | /* 6268*/ OPC_EmitInteger, MVT::i32, 0, |
| 1724 | /* 6271*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1725 | /* 6283*/ OPC_EmitInteger, MVT::i32, 1, |
| 1726 | /* 6286*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1727 | /* 6289*/ OPC_EmitInteger, MVT::i32, 0, |
| 1728 | /* 6292*/ OPC_EmitInteger, MVT::i32, 0, |
| 1729 | /* 6295*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1730 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 1, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 1731 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z), (and:{ *:[i32] } i32:{ *:[i32] }:$y, (or:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x))) - Complexity = 12 |
| 1732 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 1733 | /* 6319*/ 0, /*End of Scope*/ |
| 1734 | /* 6320*/ /*Scope*/ 36|128,3/*420*/, /*->6742*/ |
| 1735 | /* 6322*/ OPC_MoveChild0, |
| 1736 | /* 6323*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 1737 | /* 6326*/ OPC_Scope, 77|128,1/*205*/, /*->6534*/ // 2 children in Scope |
| 1738 | /* 6329*/ OPC_CheckChild0Same, 0, |
| 1739 | /* 6331*/ OPC_CheckChild1Same, 1, |
| 1740 | /* 6333*/ OPC_MoveParent, |
| 1741 | /* 6334*/ OPC_RecordChild1, // #2 = $y |
| 1742 | /* 6335*/ OPC_MoveParent, |
| 1743 | /* 6336*/ OPC_CheckType, MVT::i32, |
| 1744 | /* 6338*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1745 | /* 6340*/ OPC_EmitInteger, MVT::i32, 0, |
| 1746 | /* 6343*/ OPC_EmitInteger, MVT::i32, 0, |
| 1747 | /* 6346*/ OPC_EmitInteger, MVT::i32, 0, |
| 1748 | /* 6349*/ OPC_EmitInteger, MVT::i32, 0, |
| 1749 | /* 6352*/ OPC_EmitInteger, MVT::i32, 1, |
| 1750 | /* 6355*/ OPC_EmitInteger, MVT::i32, 0, |
| 1751 | /* 6358*/ OPC_EmitInteger, MVT::i32, 0, |
| 1752 | /* 6361*/ OPC_EmitInteger, MVT::i32, 0, |
| 1753 | /* 6364*/ OPC_EmitInteger, MVT::i32, 0, |
| 1754 | /* 6367*/ OPC_EmitInteger, MVT::i32, 0, |
| 1755 | /* 6370*/ OPC_EmitInteger, MVT::i32, 0, |
| 1756 | /* 6373*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1757 | /* 6385*/ OPC_EmitInteger, MVT::i32, 0, |
| 1758 | /* 6388*/ OPC_EmitInteger, MVT::i32, 0, |
| 1759 | /* 6391*/ OPC_EmitInteger, MVT::i32, 0, |
| 1760 | /* 6394*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1761 | /* 6406*/ OPC_EmitInteger, MVT::i32, 1, |
| 1762 | /* 6409*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1763 | /* 6412*/ OPC_EmitInteger, MVT::i32, 0, |
| 1764 | /* 6415*/ OPC_EmitInteger, MVT::i32, 0, |
| 1765 | /* 6418*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 1766 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 0, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 1767 | /* 6444*/ OPC_EmitInteger, MVT::i32, 0, |
| 1768 | /* 6447*/ OPC_EmitInteger, MVT::i32, 0, |
| 1769 | /* 6450*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1770 | /* 6462*/ OPC_EmitInteger, MVT::i32, 0, |
| 1771 | /* 6465*/ OPC_EmitInteger, MVT::i32, 0, |
| 1772 | /* 6468*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1773 | /* 6480*/ OPC_EmitInteger, MVT::i32, 0, |
| 1774 | /* 6483*/ OPC_EmitInteger, MVT::i32, 0, |
| 1775 | /* 6486*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1776 | /* 6498*/ OPC_EmitInteger, MVT::i32, 1, |
| 1777 | /* 6501*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1778 | /* 6504*/ OPC_EmitInteger, MVT::i32, 0, |
| 1779 | /* 6507*/ OPC_EmitInteger, MVT::i32, 0, |
| 1780 | /* 6510*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1781 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 1, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 1782 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z), (and:{ *:[i32] } (or:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z), i32:{ *:[i32] }:$y)) - Complexity = 12 |
| 1783 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 1784 | /* 6534*/ /*Scope*/ 77|128,1/*205*/, /*->6741*/ |
| 1785 | /* 6536*/ OPC_CheckChild0Same, 1, |
| 1786 | /* 6538*/ OPC_CheckChild1Same, 0, |
| 1787 | /* 6540*/ OPC_MoveParent, |
| 1788 | /* 6541*/ OPC_RecordChild1, // #2 = $y |
| 1789 | /* 6542*/ OPC_MoveParent, |
| 1790 | /* 6543*/ OPC_CheckType, MVT::i32, |
| 1791 | /* 6545*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1792 | /* 6547*/ OPC_EmitInteger, MVT::i32, 0, |
| 1793 | /* 6550*/ OPC_EmitInteger, MVT::i32, 0, |
| 1794 | /* 6553*/ OPC_EmitInteger, MVT::i32, 0, |
| 1795 | /* 6556*/ OPC_EmitInteger, MVT::i32, 0, |
| 1796 | /* 6559*/ OPC_EmitInteger, MVT::i32, 1, |
| 1797 | /* 6562*/ OPC_EmitInteger, MVT::i32, 0, |
| 1798 | /* 6565*/ OPC_EmitInteger, MVT::i32, 0, |
| 1799 | /* 6568*/ OPC_EmitInteger, MVT::i32, 0, |
| 1800 | /* 6571*/ OPC_EmitInteger, MVT::i32, 0, |
| 1801 | /* 6574*/ OPC_EmitInteger, MVT::i32, 0, |
| 1802 | /* 6577*/ OPC_EmitInteger, MVT::i32, 0, |
| 1803 | /* 6580*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1804 | /* 6592*/ OPC_EmitInteger, MVT::i32, 0, |
| 1805 | /* 6595*/ OPC_EmitInteger, MVT::i32, 0, |
| 1806 | /* 6598*/ OPC_EmitInteger, MVT::i32, 0, |
| 1807 | /* 6601*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1808 | /* 6613*/ OPC_EmitInteger, MVT::i32, 1, |
| 1809 | /* 6616*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1810 | /* 6619*/ OPC_EmitInteger, MVT::i32, 0, |
| 1811 | /* 6622*/ OPC_EmitInteger, MVT::i32, 0, |
| 1812 | /* 6625*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 1813 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 0, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 1814 | /* 6651*/ OPC_EmitInteger, MVT::i32, 0, |
| 1815 | /* 6654*/ OPC_EmitInteger, MVT::i32, 0, |
| 1816 | /* 6657*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1817 | /* 6669*/ OPC_EmitInteger, MVT::i32, 0, |
| 1818 | /* 6672*/ OPC_EmitInteger, MVT::i32, 0, |
| 1819 | /* 6675*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1820 | /* 6687*/ OPC_EmitInteger, MVT::i32, 0, |
| 1821 | /* 6690*/ OPC_EmitInteger, MVT::i32, 0, |
| 1822 | /* 6693*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1823 | /* 6705*/ OPC_EmitInteger, MVT::i32, 1, |
| 1824 | /* 6708*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1825 | /* 6711*/ OPC_EmitInteger, MVT::i32, 0, |
| 1826 | /* 6714*/ OPC_EmitInteger, MVT::i32, 0, |
| 1827 | /* 6717*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1828 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 1, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 1829 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z), (and:{ *:[i32] } (or:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x), i32:{ *:[i32] }:$y)) - Complexity = 12 |
| 1830 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 1831 | /* 6741*/ 0, /*End of Scope*/ |
| 1832 | /* 6742*/ /*Scope*/ 35|128,3/*419*/, /*->7163*/ |
| 1833 | /* 6744*/ OPC_RecordChild0, // #2 = $y |
| 1834 | /* 6745*/ OPC_MoveChild1, |
| 1835 | /* 6746*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 1836 | /* 6749*/ OPC_Scope, 76|128,1/*204*/, /*->6956*/ // 2 children in Scope |
| 1837 | /* 6752*/ OPC_CheckChild0Same, 1, |
| 1838 | /* 6754*/ OPC_CheckChild1Same, 0, |
| 1839 | /* 6756*/ OPC_MoveParent, |
| 1840 | /* 6757*/ OPC_MoveParent, |
| 1841 | /* 6758*/ OPC_CheckType, MVT::i32, |
| 1842 | /* 6760*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1843 | /* 6762*/ OPC_EmitInteger, MVT::i32, 0, |
| 1844 | /* 6765*/ OPC_EmitInteger, MVT::i32, 0, |
| 1845 | /* 6768*/ OPC_EmitInteger, MVT::i32, 0, |
| 1846 | /* 6771*/ OPC_EmitInteger, MVT::i32, 0, |
| 1847 | /* 6774*/ OPC_EmitInteger, MVT::i32, 1, |
| 1848 | /* 6777*/ OPC_EmitInteger, MVT::i32, 0, |
| 1849 | /* 6780*/ OPC_EmitInteger, MVT::i32, 0, |
| 1850 | /* 6783*/ OPC_EmitInteger, MVT::i32, 0, |
| 1851 | /* 6786*/ OPC_EmitInteger, MVT::i32, 0, |
| 1852 | /* 6789*/ OPC_EmitInteger, MVT::i32, 0, |
| 1853 | /* 6792*/ OPC_EmitInteger, MVT::i32, 0, |
| 1854 | /* 6795*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1855 | /* 6807*/ OPC_EmitInteger, MVT::i32, 0, |
| 1856 | /* 6810*/ OPC_EmitInteger, MVT::i32, 0, |
| 1857 | /* 6813*/ OPC_EmitInteger, MVT::i32, 0, |
| 1858 | /* 6816*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1859 | /* 6828*/ OPC_EmitInteger, MVT::i32, 1, |
| 1860 | /* 6831*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1861 | /* 6834*/ OPC_EmitInteger, MVT::i32, 0, |
| 1862 | /* 6837*/ OPC_EmitInteger, MVT::i32, 0, |
| 1863 | /* 6840*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 1864 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 1, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 1865 | /* 6866*/ OPC_EmitInteger, MVT::i32, 0, |
| 1866 | /* 6869*/ OPC_EmitInteger, MVT::i32, 0, |
| 1867 | /* 6872*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1868 | /* 6884*/ OPC_EmitInteger, MVT::i32, 0, |
| 1869 | /* 6887*/ OPC_EmitInteger, MVT::i32, 0, |
| 1870 | /* 6890*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1871 | /* 6902*/ OPC_EmitInteger, MVT::i32, 0, |
| 1872 | /* 6905*/ OPC_EmitInteger, MVT::i32, 0, |
| 1873 | /* 6908*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1874 | /* 6920*/ OPC_EmitInteger, MVT::i32, 1, |
| 1875 | /* 6923*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1876 | /* 6926*/ OPC_EmitInteger, MVT::i32, 0, |
| 1877 | /* 6929*/ OPC_EmitInteger, MVT::i32, 0, |
| 1878 | /* 6932*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1879 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 0, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 1880 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x), (and:{ *:[i32] } i32:{ *:[i32] }:$y, (or:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z))) - Complexity = 12 |
| 1881 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 1882 | /* 6956*/ /*Scope*/ 76|128,1/*204*/, /*->7162*/ |
| 1883 | /* 6958*/ OPC_CheckChild0Same, 0, |
| 1884 | /* 6960*/ OPC_CheckChild1Same, 1, |
| 1885 | /* 6962*/ OPC_MoveParent, |
| 1886 | /* 6963*/ OPC_MoveParent, |
| 1887 | /* 6964*/ OPC_CheckType, MVT::i32, |
| 1888 | /* 6966*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1889 | /* 6968*/ OPC_EmitInteger, MVT::i32, 0, |
| 1890 | /* 6971*/ OPC_EmitInteger, MVT::i32, 0, |
| 1891 | /* 6974*/ OPC_EmitInteger, MVT::i32, 0, |
| 1892 | /* 6977*/ OPC_EmitInteger, MVT::i32, 0, |
| 1893 | /* 6980*/ OPC_EmitInteger, MVT::i32, 1, |
| 1894 | /* 6983*/ OPC_EmitInteger, MVT::i32, 0, |
| 1895 | /* 6986*/ OPC_EmitInteger, MVT::i32, 0, |
| 1896 | /* 6989*/ OPC_EmitInteger, MVT::i32, 0, |
| 1897 | /* 6992*/ OPC_EmitInteger, MVT::i32, 0, |
| 1898 | /* 6995*/ OPC_EmitInteger, MVT::i32, 0, |
| 1899 | /* 6998*/ OPC_EmitInteger, MVT::i32, 0, |
| 1900 | /* 7001*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1901 | /* 7013*/ OPC_EmitInteger, MVT::i32, 0, |
| 1902 | /* 7016*/ OPC_EmitInteger, MVT::i32, 0, |
| 1903 | /* 7019*/ OPC_EmitInteger, MVT::i32, 0, |
| 1904 | /* 7022*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1905 | /* 7034*/ OPC_EmitInteger, MVT::i32, 1, |
| 1906 | /* 7037*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1907 | /* 7040*/ OPC_EmitInteger, MVT::i32, 0, |
| 1908 | /* 7043*/ OPC_EmitInteger, MVT::i32, 0, |
| 1909 | /* 7046*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 1910 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 1, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 1911 | /* 7072*/ OPC_EmitInteger, MVT::i32, 0, |
| 1912 | /* 7075*/ OPC_EmitInteger, MVT::i32, 0, |
| 1913 | /* 7078*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1914 | /* 7090*/ OPC_EmitInteger, MVT::i32, 0, |
| 1915 | /* 7093*/ OPC_EmitInteger, MVT::i32, 0, |
| 1916 | /* 7096*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1917 | /* 7108*/ OPC_EmitInteger, MVT::i32, 0, |
| 1918 | /* 7111*/ OPC_EmitInteger, MVT::i32, 0, |
| 1919 | /* 7114*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1920 | /* 7126*/ OPC_EmitInteger, MVT::i32, 1, |
| 1921 | /* 7129*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1922 | /* 7132*/ OPC_EmitInteger, MVT::i32, 0, |
| 1923 | /* 7135*/ OPC_EmitInteger, MVT::i32, 0, |
| 1924 | /* 7138*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1925 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 0, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 1926 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x), (and:{ *:[i32] } i32:{ *:[i32] }:$y, (or:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x))) - Complexity = 12 |
| 1927 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 1928 | /* 7162*/ 0, /*End of Scope*/ |
| 1929 | /* 7163*/ /*Scope*/ 36|128,3/*420*/, /*->7585*/ |
| 1930 | /* 7165*/ OPC_MoveChild0, |
| 1931 | /* 7166*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 1932 | /* 7169*/ OPC_Scope, 77|128,1/*205*/, /*->7377*/ // 2 children in Scope |
| 1933 | /* 7172*/ OPC_CheckChild0Same, 1, |
| 1934 | /* 7174*/ OPC_CheckChild1Same, 0, |
| 1935 | /* 7176*/ OPC_MoveParent, |
| 1936 | /* 7177*/ OPC_RecordChild1, // #2 = $y |
| 1937 | /* 7178*/ OPC_MoveParent, |
| 1938 | /* 7179*/ OPC_CheckType, MVT::i32, |
| 1939 | /* 7181*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1940 | /* 7183*/ OPC_EmitInteger, MVT::i32, 0, |
| 1941 | /* 7186*/ OPC_EmitInteger, MVT::i32, 0, |
| 1942 | /* 7189*/ OPC_EmitInteger, MVT::i32, 0, |
| 1943 | /* 7192*/ OPC_EmitInteger, MVT::i32, 0, |
| 1944 | /* 7195*/ OPC_EmitInteger, MVT::i32, 1, |
| 1945 | /* 7198*/ OPC_EmitInteger, MVT::i32, 0, |
| 1946 | /* 7201*/ OPC_EmitInteger, MVT::i32, 0, |
| 1947 | /* 7204*/ OPC_EmitInteger, MVT::i32, 0, |
| 1948 | /* 7207*/ OPC_EmitInteger, MVT::i32, 0, |
| 1949 | /* 7210*/ OPC_EmitInteger, MVT::i32, 0, |
| 1950 | /* 7213*/ OPC_EmitInteger, MVT::i32, 0, |
| 1951 | /* 7216*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1952 | /* 7228*/ OPC_EmitInteger, MVT::i32, 0, |
| 1953 | /* 7231*/ OPC_EmitInteger, MVT::i32, 0, |
| 1954 | /* 7234*/ OPC_EmitInteger, MVT::i32, 0, |
| 1955 | /* 7237*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1956 | /* 7249*/ OPC_EmitInteger, MVT::i32, 1, |
| 1957 | /* 7252*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1958 | /* 7255*/ OPC_EmitInteger, MVT::i32, 0, |
| 1959 | /* 7258*/ OPC_EmitInteger, MVT::i32, 0, |
| 1960 | /* 7261*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 1961 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 1, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 1962 | /* 7287*/ OPC_EmitInteger, MVT::i32, 0, |
| 1963 | /* 7290*/ OPC_EmitInteger, MVT::i32, 0, |
| 1964 | /* 7293*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1965 | /* 7305*/ OPC_EmitInteger, MVT::i32, 0, |
| 1966 | /* 7308*/ OPC_EmitInteger, MVT::i32, 0, |
| 1967 | /* 7311*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1968 | /* 7323*/ OPC_EmitInteger, MVT::i32, 0, |
| 1969 | /* 7326*/ OPC_EmitInteger, MVT::i32, 0, |
| 1970 | /* 7329*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1971 | /* 7341*/ OPC_EmitInteger, MVT::i32, 1, |
| 1972 | /* 7344*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 1973 | /* 7347*/ OPC_EmitInteger, MVT::i32, 0, |
| 1974 | /* 7350*/ OPC_EmitInteger, MVT::i32, 0, |
| 1975 | /* 7353*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 1976 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 0, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 1977 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x), (and:{ *:[i32] } (or:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z), i32:{ *:[i32] }:$y)) - Complexity = 12 |
| 1978 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 1979 | /* 7377*/ /*Scope*/ 77|128,1/*205*/, /*->7584*/ |
| 1980 | /* 7379*/ OPC_CheckChild0Same, 0, |
| 1981 | /* 7381*/ OPC_CheckChild1Same, 1, |
| 1982 | /* 7383*/ OPC_MoveParent, |
| 1983 | /* 7384*/ OPC_RecordChild1, // #2 = $y |
| 1984 | /* 7385*/ OPC_MoveParent, |
| 1985 | /* 7386*/ OPC_CheckType, MVT::i32, |
| 1986 | /* 7388*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 1987 | /* 7390*/ OPC_EmitInteger, MVT::i32, 0, |
| 1988 | /* 7393*/ OPC_EmitInteger, MVT::i32, 0, |
| 1989 | /* 7396*/ OPC_EmitInteger, MVT::i32, 0, |
| 1990 | /* 7399*/ OPC_EmitInteger, MVT::i32, 0, |
| 1991 | /* 7402*/ OPC_EmitInteger, MVT::i32, 1, |
| 1992 | /* 7405*/ OPC_EmitInteger, MVT::i32, 0, |
| 1993 | /* 7408*/ OPC_EmitInteger, MVT::i32, 0, |
| 1994 | /* 7411*/ OPC_EmitInteger, MVT::i32, 0, |
| 1995 | /* 7414*/ OPC_EmitInteger, MVT::i32, 0, |
| 1996 | /* 7417*/ OPC_EmitInteger, MVT::i32, 0, |
| 1997 | /* 7420*/ OPC_EmitInteger, MVT::i32, 0, |
| 1998 | /* 7423*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 1999 | /* 7435*/ OPC_EmitInteger, MVT::i32, 0, |
| 2000 | /* 7438*/ OPC_EmitInteger, MVT::i32, 0, |
| 2001 | /* 7441*/ OPC_EmitInteger, MVT::i32, 0, |
| 2002 | /* 7444*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2003 | /* 7456*/ OPC_EmitInteger, MVT::i32, 1, |
| 2004 | /* 7459*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2005 | /* 7462*/ OPC_EmitInteger, MVT::i32, 0, |
| 2006 | /* 7465*/ OPC_EmitInteger, MVT::i32, 0, |
| 2007 | /* 7468*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2008 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 1, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 2009 | /* 7494*/ OPC_EmitInteger, MVT::i32, 0, |
| 2010 | /* 7497*/ OPC_EmitInteger, MVT::i32, 0, |
| 2011 | /* 7500*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2012 | /* 7512*/ OPC_EmitInteger, MVT::i32, 0, |
| 2013 | /* 7515*/ OPC_EmitInteger, MVT::i32, 0, |
| 2014 | /* 7518*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2015 | /* 7530*/ OPC_EmitInteger, MVT::i32, 0, |
| 2016 | /* 7533*/ OPC_EmitInteger, MVT::i32, 0, |
| 2017 | /* 7536*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2018 | /* 7548*/ OPC_EmitInteger, MVT::i32, 1, |
| 2019 | /* 7551*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2020 | /* 7554*/ OPC_EmitInteger, MVT::i32, 0, |
| 2021 | /* 7557*/ OPC_EmitInteger, MVT::i32, 0, |
| 2022 | /* 7560*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2023 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 0, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 2024 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x), (and:{ *:[i32] } (or:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x), i32:{ *:[i32] }:$y)) - Complexity = 12 |
| 2025 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 2026 | /* 7584*/ 0, /*End of Scope*/ |
| 2027 | /* 7585*/ 0, /*End of Scope*/ |
| 2028 | /* 7586*/ /*Scope*/ 109|128,5/*749*/, /*->8337*/ |
| 2029 | /* 7588*/ OPC_MoveChild1, |
| 2030 | /* 7589*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 2031 | /* 7592*/ OPC_RecordChild0, // #1 = $x |
| 2032 | /* 7593*/ OPC_RecordChild1, // #2 = $z |
| 2033 | /* 7594*/ OPC_MoveParent, |
| 2034 | /* 7595*/ OPC_MoveParent, |
| 2035 | /* 7596*/ OPC_MoveChild1, |
| 2036 | /* 7597*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 2037 | /* 7600*/ OPC_Scope, 75|128,1/*203*/, /*->7806*/ // 3 children in Scope |
| 2038 | /* 7603*/ OPC_CheckChild0Same, 1, |
| 2039 | /* 7605*/ OPC_CheckChild1Same, 2, |
| 2040 | /* 7607*/ OPC_MoveParent, |
| 2041 | /* 7608*/ OPC_CheckType, MVT::i32, |
| 2042 | /* 7610*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2043 | /* 7612*/ OPC_EmitInteger, MVT::i32, 0, |
| 2044 | /* 7615*/ OPC_EmitInteger, MVT::i32, 0, |
| 2045 | /* 7618*/ OPC_EmitInteger, MVT::i32, 0, |
| 2046 | /* 7621*/ OPC_EmitInteger, MVT::i32, 0, |
| 2047 | /* 7624*/ OPC_EmitInteger, MVT::i32, 1, |
| 2048 | /* 7627*/ OPC_EmitInteger, MVT::i32, 0, |
| 2049 | /* 7630*/ OPC_EmitInteger, MVT::i32, 0, |
| 2050 | /* 7633*/ OPC_EmitInteger, MVT::i32, 0, |
| 2051 | /* 7636*/ OPC_EmitInteger, MVT::i32, 0, |
| 2052 | /* 7639*/ OPC_EmitInteger, MVT::i32, 0, |
| 2053 | /* 7642*/ OPC_EmitInteger, MVT::i32, 0, |
| 2054 | /* 7645*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2055 | /* 7657*/ OPC_EmitInteger, MVT::i32, 0, |
| 2056 | /* 7660*/ OPC_EmitInteger, MVT::i32, 0, |
| 2057 | /* 7663*/ OPC_EmitInteger, MVT::i32, 0, |
| 2058 | /* 7666*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2059 | /* 7678*/ OPC_EmitInteger, MVT::i32, 1, |
| 2060 | /* 7681*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2061 | /* 7684*/ OPC_EmitInteger, MVT::i32, 0, |
| 2062 | /* 7687*/ OPC_EmitInteger, MVT::i32, 0, |
| 2063 | /* 7690*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2064 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 1, 11, 12, 13, 14, 0, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 2065 | /* 7716*/ OPC_EmitInteger, MVT::i32, 0, |
| 2066 | /* 7719*/ OPC_EmitInteger, MVT::i32, 0, |
| 2067 | /* 7722*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2068 | /* 7734*/ OPC_EmitInteger, MVT::i32, 0, |
| 2069 | /* 7737*/ OPC_EmitInteger, MVT::i32, 0, |
| 2070 | /* 7740*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2071 | /* 7752*/ OPC_EmitInteger, MVT::i32, 0, |
| 2072 | /* 7755*/ OPC_EmitInteger, MVT::i32, 0, |
| 2073 | /* 7758*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2074 | /* 7770*/ OPC_EmitInteger, MVT::i32, 1, |
| 2075 | /* 7773*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2076 | /* 7776*/ OPC_EmitInteger, MVT::i32, 0, |
| 2077 | /* 7779*/ OPC_EmitInteger, MVT::i32, 0, |
| 2078 | /* 7782*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2079 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 2, 27, 28, 29, 0, 30, 31, 32, 33, 34, 35, 36, |
| 2080 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$y, (or:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z)), (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z)) - Complexity = 12 |
| 2081 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 2082 | /* 7806*/ /*Scope*/ 67|128,2/*323*/, /*->8131*/ |
| 2083 | /* 7808*/ OPC_CheckChild0Same, 2, |
| 2084 | /* 7810*/ OPC_CheckChild1Same, 1, |
| 2085 | /* 7812*/ OPC_MoveParent, |
| 2086 | /* 7813*/ OPC_CheckType, MVT::i32, |
| 2087 | /* 7815*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2088 | /* 7817*/ OPC_EmitInteger, MVT::i32, 0, |
| 2089 | /* 7820*/ OPC_EmitInteger, MVT::i32, 0, |
| 2090 | /* 7823*/ OPC_EmitInteger, MVT::i32, 0, |
| 2091 | /* 7826*/ OPC_EmitInteger, MVT::i32, 0, |
| 2092 | /* 7829*/ OPC_EmitInteger, MVT::i32, 1, |
| 2093 | /* 7832*/ OPC_EmitInteger, MVT::i32, 0, |
| 2094 | /* 7835*/ OPC_EmitInteger, MVT::i32, 0, |
| 2095 | /* 7838*/ OPC_EmitInteger, MVT::i32, 0, |
| 2096 | /* 7841*/ OPC_EmitInteger, MVT::i32, 0, |
| 2097 | /* 7844*/ OPC_EmitInteger, MVT::i32, 0, |
| 2098 | /* 7847*/ OPC_EmitInteger, MVT::i32, 0, |
| 2099 | /* 7850*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2100 | /* 7862*/ OPC_EmitInteger, MVT::i32, 0, |
| 2101 | /* 7865*/ OPC_EmitInteger, MVT::i32, 0, |
| 2102 | /* 7868*/ OPC_EmitInteger, MVT::i32, 0, |
| 2103 | /* 7871*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2104 | /* 7883*/ OPC_EmitInteger, MVT::i32, 1, |
| 2105 | /* 7886*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2106 | /* 7889*/ OPC_EmitInteger, MVT::i32, 0, |
| 2107 | /* 7892*/ OPC_EmitInteger, MVT::i32, 0, |
| 2108 | /* 7895*/ OPC_Scope, 116, /*->8013*/ // 2 children in Scope |
| 2109 | /* 7897*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2110 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 1, 11, 12, 13, 14, 0, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 2111 | /* 7923*/ OPC_EmitInteger, MVT::i32, 0, |
| 2112 | /* 7926*/ OPC_EmitInteger, MVT::i32, 0, |
| 2113 | /* 7929*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2114 | /* 7941*/ OPC_EmitInteger, MVT::i32, 0, |
| 2115 | /* 7944*/ OPC_EmitInteger, MVT::i32, 0, |
| 2116 | /* 7947*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2117 | /* 7959*/ OPC_EmitInteger, MVT::i32, 0, |
| 2118 | /* 7962*/ OPC_EmitInteger, MVT::i32, 0, |
| 2119 | /* 7965*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2120 | /* 7977*/ OPC_EmitInteger, MVT::i32, 1, |
| 2121 | /* 7980*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2122 | /* 7983*/ OPC_EmitInteger, MVT::i32, 0, |
| 2123 | /* 7986*/ OPC_EmitInteger, MVT::i32, 0, |
| 2124 | /* 7989*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2125 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 2, 27, 28, 29, 0, 30, 31, 32, 33, 34, 35, 36, |
| 2126 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$y, (or:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z)), (and:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x)) - Complexity = 12 |
| 2127 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 2128 | /* 8013*/ /*Scope*/ 116, /*->8130*/ |
| 2129 | /* 8014*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2130 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 2, 11, 12, 13, 14, 0, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 2131 | /* 8040*/ OPC_EmitInteger, MVT::i32, 0, |
| 2132 | /* 8043*/ OPC_EmitInteger, MVT::i32, 0, |
| 2133 | /* 8046*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2134 | /* 8058*/ OPC_EmitInteger, MVT::i32, 0, |
| 2135 | /* 8061*/ OPC_EmitInteger, MVT::i32, 0, |
| 2136 | /* 8064*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2137 | /* 8076*/ OPC_EmitInteger, MVT::i32, 0, |
| 2138 | /* 8079*/ OPC_EmitInteger, MVT::i32, 0, |
| 2139 | /* 8082*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2140 | /* 8094*/ OPC_EmitInteger, MVT::i32, 1, |
| 2141 | /* 8097*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2142 | /* 8100*/ OPC_EmitInteger, MVT::i32, 0, |
| 2143 | /* 8103*/ OPC_EmitInteger, MVT::i32, 0, |
| 2144 | /* 8106*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2145 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 1, 27, 28, 29, 0, 30, 31, 32, 33, 34, 35, 36, |
| 2146 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$y, (or:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x)), (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z)) - Complexity = 12 |
| 2147 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 2148 | /* 8130*/ 0, /*End of Scope*/ |
| 2149 | /* 8131*/ /*Scope*/ 75|128,1/*203*/, /*->8336*/ |
| 2150 | /* 8133*/ OPC_CheckChild0Same, 1, |
| 2151 | /* 8135*/ OPC_CheckChild1Same, 2, |
| 2152 | /* 8137*/ OPC_MoveParent, |
| 2153 | /* 8138*/ OPC_CheckType, MVT::i32, |
| 2154 | /* 8140*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2155 | /* 8142*/ OPC_EmitInteger, MVT::i32, 0, |
| 2156 | /* 8145*/ OPC_EmitInteger, MVT::i32, 0, |
| 2157 | /* 8148*/ OPC_EmitInteger, MVT::i32, 0, |
| 2158 | /* 8151*/ OPC_EmitInteger, MVT::i32, 0, |
| 2159 | /* 8154*/ OPC_EmitInteger, MVT::i32, 1, |
| 2160 | /* 8157*/ OPC_EmitInteger, MVT::i32, 0, |
| 2161 | /* 8160*/ OPC_EmitInteger, MVT::i32, 0, |
| 2162 | /* 8163*/ OPC_EmitInteger, MVT::i32, 0, |
| 2163 | /* 8166*/ OPC_EmitInteger, MVT::i32, 0, |
| 2164 | /* 8169*/ OPC_EmitInteger, MVT::i32, 0, |
| 2165 | /* 8172*/ OPC_EmitInteger, MVT::i32, 0, |
| 2166 | /* 8175*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2167 | /* 8187*/ OPC_EmitInteger, MVT::i32, 0, |
| 2168 | /* 8190*/ OPC_EmitInteger, MVT::i32, 0, |
| 2169 | /* 8193*/ OPC_EmitInteger, MVT::i32, 0, |
| 2170 | /* 8196*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2171 | /* 8208*/ OPC_EmitInteger, MVT::i32, 1, |
| 2172 | /* 8211*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2173 | /* 8214*/ OPC_EmitInteger, MVT::i32, 0, |
| 2174 | /* 8217*/ OPC_EmitInteger, MVT::i32, 0, |
| 2175 | /* 8220*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2176 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 2, 11, 12, 13, 14, 0, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 2177 | /* 8246*/ OPC_EmitInteger, MVT::i32, 0, |
| 2178 | /* 8249*/ OPC_EmitInteger, MVT::i32, 0, |
| 2179 | /* 8252*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2180 | /* 8264*/ OPC_EmitInteger, MVT::i32, 0, |
| 2181 | /* 8267*/ OPC_EmitInteger, MVT::i32, 0, |
| 2182 | /* 8270*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2183 | /* 8282*/ OPC_EmitInteger, MVT::i32, 0, |
| 2184 | /* 8285*/ OPC_EmitInteger, MVT::i32, 0, |
| 2185 | /* 8288*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2186 | /* 8300*/ OPC_EmitInteger, MVT::i32, 1, |
| 2187 | /* 8303*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2188 | /* 8306*/ OPC_EmitInteger, MVT::i32, 0, |
| 2189 | /* 8309*/ OPC_EmitInteger, MVT::i32, 0, |
| 2190 | /* 8312*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2191 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 1, 27, 28, 29, 0, 30, 31, 32, 33, 34, 35, 36, |
| 2192 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$y, (or:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x)), (and:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x)) - Complexity = 12 |
| 2193 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 2194 | /* 8336*/ 0, /*End of Scope*/ |
| 2195 | /* 8337*/ 0, /*End of Scope*/ |
| 2196 | /* 8338*/ /*Scope*/ 110|128,5/*750*/, /*->9090*/ |
| 2197 | /* 8340*/ OPC_MoveChild0, |
| 2198 | /* 8341*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 2199 | /* 8344*/ OPC_RecordChild0, // #0 = $x |
| 2200 | /* 8345*/ OPC_RecordChild1, // #1 = $z |
| 2201 | /* 8346*/ OPC_MoveParent, |
| 2202 | /* 8347*/ OPC_RecordChild1, // #2 = $y |
| 2203 | /* 8348*/ OPC_MoveParent, |
| 2204 | /* 8349*/ OPC_MoveChild1, |
| 2205 | /* 8350*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 2206 | /* 8353*/ OPC_Scope, 75|128,1/*203*/, /*->8559*/ // 3 children in Scope |
| 2207 | /* 8356*/ OPC_CheckChild0Same, 0, |
| 2208 | /* 8358*/ OPC_CheckChild1Same, 1, |
| 2209 | /* 8360*/ OPC_MoveParent, |
| 2210 | /* 8361*/ OPC_CheckType, MVT::i32, |
| 2211 | /* 8363*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2212 | /* 8365*/ OPC_EmitInteger, MVT::i32, 0, |
| 2213 | /* 8368*/ OPC_EmitInteger, MVT::i32, 0, |
| 2214 | /* 8371*/ OPC_EmitInteger, MVT::i32, 0, |
| 2215 | /* 8374*/ OPC_EmitInteger, MVT::i32, 0, |
| 2216 | /* 8377*/ OPC_EmitInteger, MVT::i32, 1, |
| 2217 | /* 8380*/ OPC_EmitInteger, MVT::i32, 0, |
| 2218 | /* 8383*/ OPC_EmitInteger, MVT::i32, 0, |
| 2219 | /* 8386*/ OPC_EmitInteger, MVT::i32, 0, |
| 2220 | /* 8389*/ OPC_EmitInteger, MVT::i32, 0, |
| 2221 | /* 8392*/ OPC_EmitInteger, MVT::i32, 0, |
| 2222 | /* 8395*/ OPC_EmitInteger, MVT::i32, 0, |
| 2223 | /* 8398*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2224 | /* 8410*/ OPC_EmitInteger, MVT::i32, 0, |
| 2225 | /* 8413*/ OPC_EmitInteger, MVT::i32, 0, |
| 2226 | /* 8416*/ OPC_EmitInteger, MVT::i32, 0, |
| 2227 | /* 8419*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2228 | /* 8431*/ OPC_EmitInteger, MVT::i32, 1, |
| 2229 | /* 8434*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2230 | /* 8437*/ OPC_EmitInteger, MVT::i32, 0, |
| 2231 | /* 8440*/ OPC_EmitInteger, MVT::i32, 0, |
| 2232 | /* 8443*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2233 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 0, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 2234 | /* 8469*/ OPC_EmitInteger, MVT::i32, 0, |
| 2235 | /* 8472*/ OPC_EmitInteger, MVT::i32, 0, |
| 2236 | /* 8475*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2237 | /* 8487*/ OPC_EmitInteger, MVT::i32, 0, |
| 2238 | /* 8490*/ OPC_EmitInteger, MVT::i32, 0, |
| 2239 | /* 8493*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2240 | /* 8505*/ OPC_EmitInteger, MVT::i32, 0, |
| 2241 | /* 8508*/ OPC_EmitInteger, MVT::i32, 0, |
| 2242 | /* 8511*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2243 | /* 8523*/ OPC_EmitInteger, MVT::i32, 1, |
| 2244 | /* 8526*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2245 | /* 8529*/ OPC_EmitInteger, MVT::i32, 0, |
| 2246 | /* 8532*/ OPC_EmitInteger, MVT::i32, 0, |
| 2247 | /* 8535*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2248 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 1, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 2249 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } (or:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z), i32:{ *:[i32] }:$y), (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z)) - Complexity = 12 |
| 2250 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 2251 | /* 8559*/ /*Scope*/ 67|128,2/*323*/, /*->8884*/ |
| 2252 | /* 8561*/ OPC_CheckChild0Same, 1, |
| 2253 | /* 8563*/ OPC_CheckChild1Same, 0, |
| 2254 | /* 8565*/ OPC_MoveParent, |
| 2255 | /* 8566*/ OPC_CheckType, MVT::i32, |
| 2256 | /* 8568*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2257 | /* 8570*/ OPC_EmitInteger, MVT::i32, 0, |
| 2258 | /* 8573*/ OPC_EmitInteger, MVT::i32, 0, |
| 2259 | /* 8576*/ OPC_EmitInteger, MVT::i32, 0, |
| 2260 | /* 8579*/ OPC_EmitInteger, MVT::i32, 0, |
| 2261 | /* 8582*/ OPC_EmitInteger, MVT::i32, 1, |
| 2262 | /* 8585*/ OPC_EmitInteger, MVT::i32, 0, |
| 2263 | /* 8588*/ OPC_EmitInteger, MVT::i32, 0, |
| 2264 | /* 8591*/ OPC_EmitInteger, MVT::i32, 0, |
| 2265 | /* 8594*/ OPC_EmitInteger, MVT::i32, 0, |
| 2266 | /* 8597*/ OPC_EmitInteger, MVT::i32, 0, |
| 2267 | /* 8600*/ OPC_EmitInteger, MVT::i32, 0, |
| 2268 | /* 8603*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2269 | /* 8615*/ OPC_EmitInteger, MVT::i32, 0, |
| 2270 | /* 8618*/ OPC_EmitInteger, MVT::i32, 0, |
| 2271 | /* 8621*/ OPC_EmitInteger, MVT::i32, 0, |
| 2272 | /* 8624*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2273 | /* 8636*/ OPC_EmitInteger, MVT::i32, 1, |
| 2274 | /* 8639*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2275 | /* 8642*/ OPC_EmitInteger, MVT::i32, 0, |
| 2276 | /* 8645*/ OPC_EmitInteger, MVT::i32, 0, |
| 2277 | /* 8648*/ OPC_Scope, 116, /*->8766*/ // 2 children in Scope |
| 2278 | /* 8650*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2279 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 0, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 2280 | /* 8676*/ OPC_EmitInteger, MVT::i32, 0, |
| 2281 | /* 8679*/ OPC_EmitInteger, MVT::i32, 0, |
| 2282 | /* 8682*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2283 | /* 8694*/ OPC_EmitInteger, MVT::i32, 0, |
| 2284 | /* 8697*/ OPC_EmitInteger, MVT::i32, 0, |
| 2285 | /* 8700*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2286 | /* 8712*/ OPC_EmitInteger, MVT::i32, 0, |
| 2287 | /* 8715*/ OPC_EmitInteger, MVT::i32, 0, |
| 2288 | /* 8718*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2289 | /* 8730*/ OPC_EmitInteger, MVT::i32, 1, |
| 2290 | /* 8733*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2291 | /* 8736*/ OPC_EmitInteger, MVT::i32, 0, |
| 2292 | /* 8739*/ OPC_EmitInteger, MVT::i32, 0, |
| 2293 | /* 8742*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2294 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 1, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 2295 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } (or:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z), i32:{ *:[i32] }:$y), (and:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x)) - Complexity = 12 |
| 2296 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 2297 | /* 8766*/ /*Scope*/ 116, /*->8883*/ |
| 2298 | /* 8767*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2299 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 1, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 2300 | /* 8793*/ OPC_EmitInteger, MVT::i32, 0, |
| 2301 | /* 8796*/ OPC_EmitInteger, MVT::i32, 0, |
| 2302 | /* 8799*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2303 | /* 8811*/ OPC_EmitInteger, MVT::i32, 0, |
| 2304 | /* 8814*/ OPC_EmitInteger, MVT::i32, 0, |
| 2305 | /* 8817*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2306 | /* 8829*/ OPC_EmitInteger, MVT::i32, 0, |
| 2307 | /* 8832*/ OPC_EmitInteger, MVT::i32, 0, |
| 2308 | /* 8835*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2309 | /* 8847*/ OPC_EmitInteger, MVT::i32, 1, |
| 2310 | /* 8850*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2311 | /* 8853*/ OPC_EmitInteger, MVT::i32, 0, |
| 2312 | /* 8856*/ OPC_EmitInteger, MVT::i32, 0, |
| 2313 | /* 8859*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2314 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 0, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 2315 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } (or:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x), i32:{ *:[i32] }:$y), (and:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$z)) - Complexity = 12 |
| 2316 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 2317 | /* 8883*/ 0, /*End of Scope*/ |
| 2318 | /* 8884*/ /*Scope*/ 75|128,1/*203*/, /*->9089*/ |
| 2319 | /* 8886*/ OPC_CheckChild0Same, 0, |
| 2320 | /* 8888*/ OPC_CheckChild1Same, 1, |
| 2321 | /* 8890*/ OPC_MoveParent, |
| 2322 | /* 8891*/ OPC_CheckType, MVT::i32, |
| 2323 | /* 8893*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2324 | /* 8895*/ OPC_EmitInteger, MVT::i32, 0, |
| 2325 | /* 8898*/ OPC_EmitInteger, MVT::i32, 0, |
| 2326 | /* 8901*/ OPC_EmitInteger, MVT::i32, 0, |
| 2327 | /* 8904*/ OPC_EmitInteger, MVT::i32, 0, |
| 2328 | /* 8907*/ OPC_EmitInteger, MVT::i32, 1, |
| 2329 | /* 8910*/ OPC_EmitInteger, MVT::i32, 0, |
| 2330 | /* 8913*/ OPC_EmitInteger, MVT::i32, 0, |
| 2331 | /* 8916*/ OPC_EmitInteger, MVT::i32, 0, |
| 2332 | /* 8919*/ OPC_EmitInteger, MVT::i32, 0, |
| 2333 | /* 8922*/ OPC_EmitInteger, MVT::i32, 0, |
| 2334 | /* 8925*/ OPC_EmitInteger, MVT::i32, 0, |
| 2335 | /* 8928*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2336 | /* 8940*/ OPC_EmitInteger, MVT::i32, 0, |
| 2337 | /* 8943*/ OPC_EmitInteger, MVT::i32, 0, |
| 2338 | /* 8946*/ OPC_EmitInteger, MVT::i32, 0, |
| 2339 | /* 8949*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2340 | /* 8961*/ OPC_EmitInteger, MVT::i32, 1, |
| 2341 | /* 8964*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2342 | /* 8967*/ OPC_EmitInteger, MVT::i32, 0, |
| 2343 | /* 8970*/ OPC_EmitInteger, MVT::i32, 0, |
| 2344 | /* 8973*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2345 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 1, 11, 12, 13, 14, 2, 15, 16, 17, 18, 19, 20, 21, 22, // Results = #23 |
| 2346 | /* 8999*/ OPC_EmitInteger, MVT::i32, 0, |
| 2347 | /* 9002*/ OPC_EmitInteger, MVT::i32, 0, |
| 2348 | /* 9005*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2349 | /* 9017*/ OPC_EmitInteger, MVT::i32, 0, |
| 2350 | /* 9020*/ OPC_EmitInteger, MVT::i32, 0, |
| 2351 | /* 9023*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2352 | /* 9035*/ OPC_EmitInteger, MVT::i32, 0, |
| 2353 | /* 9038*/ OPC_EmitInteger, MVT::i32, 0, |
| 2354 | /* 9041*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2355 | /* 9053*/ OPC_EmitInteger, MVT::i32, 1, |
| 2356 | /* 9056*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2357 | /* 9059*/ OPC_EmitInteger, MVT::i32, 0, |
| 2358 | /* 9062*/ OPC_EmitInteger, MVT::i32, 0, |
| 2359 | /* 9065*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2360 | MVT::i32, 18/*#Ops*/, 3, 4, 23, 24, 25, 26, 0, 27, 28, 29, 2, 30, 31, 32, 33, 34, 35, 36, |
| 2361 | // Src: (or:{ *:[i32] } (and:{ *:[i32] } (or:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x), i32:{ *:[i32] }:$y), (and:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$x)) - Complexity = 12 |
| 2362 | // Dst: (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } i32:{ *:[i32] }:$x, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y) |
| 2363 | /* 9089*/ 0, /*End of Scope*/ |
| 2364 | /* 9090*/ /*Scope*/ 108|128,47/*6124*/, /*->15216*/ |
| 2365 | /* 9092*/ OPC_RecordChild0, // #0 = $x |
| 2366 | /* 9093*/ OPC_Scope, 14|128,32/*4110*/, /*->13206*/ // 2 children in Scope |
| 2367 | /* 9096*/ OPC_RecordChild1, // #1 = $z |
| 2368 | /* 9097*/ OPC_MoveParent, |
| 2369 | /* 9098*/ OPC_MoveChild1, |
| 2370 | /* 9099*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 2371 | /* 9102*/ OPC_Scope, 127|128,7/*1023*/, /*->10128*/ // 4 children in Scope |
| 2372 | /* 9105*/ OPC_RecordChild0, // #2 = $y |
| 2373 | /* 9106*/ OPC_MoveChild1, |
| 2374 | /* 9107*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 2375 | /* 9110*/ OPC_Scope, 122|128,3/*506*/, /*->9619*/ // 2 children in Scope |
| 2376 | /* 9113*/ OPC_CheckChild0Same, 0, |
| 2377 | /* 9115*/ OPC_CheckChild1Same, 1, |
| 2378 | /* 9117*/ OPC_MoveParent, |
| 2379 | /* 9118*/ OPC_MoveParent, |
| 2380 | /* 9119*/ OPC_CheckType, MVT::i64, |
| 2381 | /* 9121*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2382 | /* 9123*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 2383 | /* 9126*/ OPC_EmitInteger, MVT::i32, 0, |
| 2384 | /* 9129*/ OPC_EmitInteger, MVT::i32, 0, |
| 2385 | /* 9132*/ OPC_EmitInteger, MVT::i32, 0, |
| 2386 | /* 9135*/ OPC_EmitInteger, MVT::i32, 0, |
| 2387 | /* 9138*/ OPC_EmitInteger, MVT::i32, 1, |
| 2388 | /* 9141*/ OPC_EmitInteger, MVT::i32, 0, |
| 2389 | /* 9144*/ OPC_EmitInteger, MVT::i32, 0, |
| 2390 | /* 9147*/ OPC_EmitInteger, MVT::i32, 0, |
| 2391 | /* 9150*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2392 | /* 9153*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2393 | MVT::i32, 2/*#Ops*/, 0, 12, // Results = #13 |
| 2394 | /* 9161*/ OPC_EmitInteger, MVT::i32, 0, |
| 2395 | /* 9164*/ OPC_EmitInteger, MVT::i32, 0, |
| 2396 | /* 9167*/ OPC_EmitInteger, MVT::i32, 0, |
| 2397 | /* 9170*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2398 | /* 9182*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2399 | /* 9185*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2400 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 2401 | /* 9193*/ OPC_EmitInteger, MVT::i32, 0, |
| 2402 | /* 9196*/ OPC_EmitInteger, MVT::i32, 0, |
| 2403 | /* 9199*/ OPC_EmitInteger, MVT::i32, 0, |
| 2404 | /* 9202*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2405 | /* 9214*/ OPC_EmitInteger, MVT::i32, 1, |
| 2406 | /* 9217*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2407 | /* 9220*/ OPC_EmitInteger, MVT::i32, 0, |
| 2408 | /* 9223*/ OPC_EmitInteger, MVT::i32, 0, |
| 2409 | /* 9226*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2410 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 2411 | /* 9252*/ OPC_EmitInteger, MVT::i32, 0, |
| 2412 | /* 9255*/ OPC_EmitInteger, MVT::i32, 0, |
| 2413 | /* 9258*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2414 | /* 9270*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2415 | /* 9273*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2416 | MVT::i32, 2/*#Ops*/, 1, 32, // Results = #33 |
| 2417 | /* 9281*/ OPC_EmitInteger, MVT::i32, 0, |
| 2418 | /* 9284*/ OPC_EmitInteger, MVT::i32, 0, |
| 2419 | /* 9287*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2420 | /* 9299*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2421 | /* 9302*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2422 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 2423 | /* 9310*/ OPC_EmitInteger, MVT::i32, 0, |
| 2424 | /* 9313*/ OPC_EmitInteger, MVT::i32, 0, |
| 2425 | /* 9316*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2426 | /* 9328*/ OPC_EmitInteger, MVT::i32, 1, |
| 2427 | /* 9331*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2428 | /* 9334*/ OPC_EmitInteger, MVT::i32, 0, |
| 2429 | /* 9337*/ OPC_EmitInteger, MVT::i32, 0, |
| 2430 | /* 9340*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2431 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 2432 | /* 9364*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2433 | /* 9367*/ OPC_EmitInteger, MVT::i32, 0, |
| 2434 | /* 9370*/ OPC_EmitInteger, MVT::i32, 0, |
| 2435 | /* 9373*/ OPC_EmitInteger, MVT::i32, 0, |
| 2436 | /* 9376*/ OPC_EmitInteger, MVT::i32, 0, |
| 2437 | /* 9379*/ OPC_EmitInteger, MVT::i32, 1, |
| 2438 | /* 9382*/ OPC_EmitInteger, MVT::i32, 0, |
| 2439 | /* 9385*/ OPC_EmitInteger, MVT::i32, 0, |
| 2440 | /* 9388*/ OPC_EmitInteger, MVT::i32, 0, |
| 2441 | /* 9391*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2442 | /* 9394*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2443 | MVT::i32, 2/*#Ops*/, 0, 56, // Results = #57 |
| 2444 | /* 9402*/ OPC_EmitInteger, MVT::i32, 0, |
| 2445 | /* 9405*/ OPC_EmitInteger, MVT::i32, 0, |
| 2446 | /* 9408*/ OPC_EmitInteger, MVT::i32, 0, |
| 2447 | /* 9411*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2448 | /* 9423*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2449 | /* 9426*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2450 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 2451 | /* 9434*/ OPC_EmitInteger, MVT::i32, 0, |
| 2452 | /* 9437*/ OPC_EmitInteger, MVT::i32, 0, |
| 2453 | /* 9440*/ OPC_EmitInteger, MVT::i32, 0, |
| 2454 | /* 9443*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2455 | /* 9455*/ OPC_EmitInteger, MVT::i32, 1, |
| 2456 | /* 9458*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2457 | /* 9461*/ OPC_EmitInteger, MVT::i32, 0, |
| 2458 | /* 9464*/ OPC_EmitInteger, MVT::i32, 0, |
| 2459 | /* 9467*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2460 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 2461 | /* 9493*/ OPC_EmitInteger, MVT::i32, 0, |
| 2462 | /* 9496*/ OPC_EmitInteger, MVT::i32, 0, |
| 2463 | /* 9499*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2464 | /* 9511*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2465 | /* 9514*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2466 | MVT::i32, 2/*#Ops*/, 1, 76, // Results = #77 |
| 2467 | /* 9522*/ OPC_EmitInteger, MVT::i32, 0, |
| 2468 | /* 9525*/ OPC_EmitInteger, MVT::i32, 0, |
| 2469 | /* 9528*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2470 | /* 9540*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2471 | /* 9543*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2472 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 2473 | /* 9551*/ OPC_EmitInteger, MVT::i32, 0, |
| 2474 | /* 9554*/ OPC_EmitInteger, MVT::i32, 0, |
| 2475 | /* 9557*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2476 | /* 9569*/ OPC_EmitInteger, MVT::i32, 1, |
| 2477 | /* 9572*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2478 | /* 9575*/ OPC_EmitInteger, MVT::i32, 0, |
| 2479 | /* 9578*/ OPC_EmitInteger, MVT::i32, 0, |
| 2480 | /* 9581*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2481 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 2482 | /* 9605*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2483 | /* 9608*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 2484 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 2485 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z), (and:{ *:[i64] } i64:{ *:[i64] }:$y, (or:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z))) - Complexity = 12 |
| 2486 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 2487 | /* 9619*/ /*Scope*/ 122|128,3/*506*/, /*->10127*/ |
| 2488 | /* 9621*/ OPC_CheckChild0Same, 1, |
| 2489 | /* 9623*/ OPC_CheckChild1Same, 0, |
| 2490 | /* 9625*/ OPC_MoveParent, |
| 2491 | /* 9626*/ OPC_MoveParent, |
| 2492 | /* 9627*/ OPC_CheckType, MVT::i64, |
| 2493 | /* 9629*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2494 | /* 9631*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 2495 | /* 9634*/ OPC_EmitInteger, MVT::i32, 0, |
| 2496 | /* 9637*/ OPC_EmitInteger, MVT::i32, 0, |
| 2497 | /* 9640*/ OPC_EmitInteger, MVT::i32, 0, |
| 2498 | /* 9643*/ OPC_EmitInteger, MVT::i32, 0, |
| 2499 | /* 9646*/ OPC_EmitInteger, MVT::i32, 1, |
| 2500 | /* 9649*/ OPC_EmitInteger, MVT::i32, 0, |
| 2501 | /* 9652*/ OPC_EmitInteger, MVT::i32, 0, |
| 2502 | /* 9655*/ OPC_EmitInteger, MVT::i32, 0, |
| 2503 | /* 9658*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2504 | /* 9661*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2505 | MVT::i32, 2/*#Ops*/, 0, 12, // Results = #13 |
| 2506 | /* 9669*/ OPC_EmitInteger, MVT::i32, 0, |
| 2507 | /* 9672*/ OPC_EmitInteger, MVT::i32, 0, |
| 2508 | /* 9675*/ OPC_EmitInteger, MVT::i32, 0, |
| 2509 | /* 9678*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2510 | /* 9690*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2511 | /* 9693*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2512 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 2513 | /* 9701*/ OPC_EmitInteger, MVT::i32, 0, |
| 2514 | /* 9704*/ OPC_EmitInteger, MVT::i32, 0, |
| 2515 | /* 9707*/ OPC_EmitInteger, MVT::i32, 0, |
| 2516 | /* 9710*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2517 | /* 9722*/ OPC_EmitInteger, MVT::i32, 1, |
| 2518 | /* 9725*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2519 | /* 9728*/ OPC_EmitInteger, MVT::i32, 0, |
| 2520 | /* 9731*/ OPC_EmitInteger, MVT::i32, 0, |
| 2521 | /* 9734*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2522 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 2523 | /* 9760*/ OPC_EmitInteger, MVT::i32, 0, |
| 2524 | /* 9763*/ OPC_EmitInteger, MVT::i32, 0, |
| 2525 | /* 9766*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2526 | /* 9778*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2527 | /* 9781*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2528 | MVT::i32, 2/*#Ops*/, 1, 32, // Results = #33 |
| 2529 | /* 9789*/ OPC_EmitInteger, MVT::i32, 0, |
| 2530 | /* 9792*/ OPC_EmitInteger, MVT::i32, 0, |
| 2531 | /* 9795*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2532 | /* 9807*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2533 | /* 9810*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2534 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 2535 | /* 9818*/ OPC_EmitInteger, MVT::i32, 0, |
| 2536 | /* 9821*/ OPC_EmitInteger, MVT::i32, 0, |
| 2537 | /* 9824*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2538 | /* 9836*/ OPC_EmitInteger, MVT::i32, 1, |
| 2539 | /* 9839*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2540 | /* 9842*/ OPC_EmitInteger, MVT::i32, 0, |
| 2541 | /* 9845*/ OPC_EmitInteger, MVT::i32, 0, |
| 2542 | /* 9848*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2543 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 2544 | /* 9872*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2545 | /* 9875*/ OPC_EmitInteger, MVT::i32, 0, |
| 2546 | /* 9878*/ OPC_EmitInteger, MVT::i32, 0, |
| 2547 | /* 9881*/ OPC_EmitInteger, MVT::i32, 0, |
| 2548 | /* 9884*/ OPC_EmitInteger, MVT::i32, 0, |
| 2549 | /* 9887*/ OPC_EmitInteger, MVT::i32, 1, |
| 2550 | /* 9890*/ OPC_EmitInteger, MVT::i32, 0, |
| 2551 | /* 9893*/ OPC_EmitInteger, MVT::i32, 0, |
| 2552 | /* 9896*/ OPC_EmitInteger, MVT::i32, 0, |
| 2553 | /* 9899*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2554 | /* 9902*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2555 | MVT::i32, 2/*#Ops*/, 0, 56, // Results = #57 |
| 2556 | /* 9910*/ OPC_EmitInteger, MVT::i32, 0, |
| 2557 | /* 9913*/ OPC_EmitInteger, MVT::i32, 0, |
| 2558 | /* 9916*/ OPC_EmitInteger, MVT::i32, 0, |
| 2559 | /* 9919*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2560 | /* 9931*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2561 | /* 9934*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2562 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 2563 | /* 9942*/ OPC_EmitInteger, MVT::i32, 0, |
| 2564 | /* 9945*/ OPC_EmitInteger, MVT::i32, 0, |
| 2565 | /* 9948*/ OPC_EmitInteger, MVT::i32, 0, |
| 2566 | /* 9951*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2567 | /* 9963*/ OPC_EmitInteger, MVT::i32, 1, |
| 2568 | /* 9966*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2569 | /* 9969*/ OPC_EmitInteger, MVT::i32, 0, |
| 2570 | /* 9972*/ OPC_EmitInteger, MVT::i32, 0, |
| 2571 | /* 9975*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2572 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 2573 | /* 10001*/ OPC_EmitInteger, MVT::i32, 0, |
| 2574 | /* 10004*/ OPC_EmitInteger, MVT::i32, 0, |
| 2575 | /* 10007*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2576 | /* 10019*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2577 | /* 10022*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2578 | MVT::i32, 2/*#Ops*/, 1, 76, // Results = #77 |
| 2579 | /* 10030*/ OPC_EmitInteger, MVT::i32, 0, |
| 2580 | /* 10033*/ OPC_EmitInteger, MVT::i32, 0, |
| 2581 | /* 10036*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2582 | /* 10048*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2583 | /* 10051*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2584 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 2585 | /* 10059*/ OPC_EmitInteger, MVT::i32, 0, |
| 2586 | /* 10062*/ OPC_EmitInteger, MVT::i32, 0, |
| 2587 | /* 10065*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2588 | /* 10077*/ OPC_EmitInteger, MVT::i32, 1, |
| 2589 | /* 10080*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2590 | /* 10083*/ OPC_EmitInteger, MVT::i32, 0, |
| 2591 | /* 10086*/ OPC_EmitInteger, MVT::i32, 0, |
| 2592 | /* 10089*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2593 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 2594 | /* 10113*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2595 | /* 10116*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 2596 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 2597 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z), (and:{ *:[i64] } i64:{ *:[i64] }:$y, (or:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x))) - Complexity = 12 |
| 2598 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 2599 | /* 10127*/ 0, /*End of Scope*/ |
| 2600 | /* 10128*/ /*Scope*/ 0|128,8/*1024*/, /*->11154*/ |
| 2601 | /* 10130*/ OPC_MoveChild0, |
| 2602 | /* 10131*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 2603 | /* 10134*/ OPC_Scope, 123|128,3/*507*/, /*->10644*/ // 2 children in Scope |
| 2604 | /* 10137*/ OPC_CheckChild0Same, 0, |
| 2605 | /* 10139*/ OPC_CheckChild1Same, 1, |
| 2606 | /* 10141*/ OPC_MoveParent, |
| 2607 | /* 10142*/ OPC_RecordChild1, // #2 = $y |
| 2608 | /* 10143*/ OPC_MoveParent, |
| 2609 | /* 10144*/ OPC_CheckType, MVT::i64, |
| 2610 | /* 10146*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2611 | /* 10148*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 2612 | /* 10151*/ OPC_EmitInteger, MVT::i32, 0, |
| 2613 | /* 10154*/ OPC_EmitInteger, MVT::i32, 0, |
| 2614 | /* 10157*/ OPC_EmitInteger, MVT::i32, 0, |
| 2615 | /* 10160*/ OPC_EmitInteger, MVT::i32, 0, |
| 2616 | /* 10163*/ OPC_EmitInteger, MVT::i32, 1, |
| 2617 | /* 10166*/ OPC_EmitInteger, MVT::i32, 0, |
| 2618 | /* 10169*/ OPC_EmitInteger, MVT::i32, 0, |
| 2619 | /* 10172*/ OPC_EmitInteger, MVT::i32, 0, |
| 2620 | /* 10175*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2621 | /* 10178*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2622 | MVT::i32, 2/*#Ops*/, 0, 12, // Results = #13 |
| 2623 | /* 10186*/ OPC_EmitInteger, MVT::i32, 0, |
| 2624 | /* 10189*/ OPC_EmitInteger, MVT::i32, 0, |
| 2625 | /* 10192*/ OPC_EmitInteger, MVT::i32, 0, |
| 2626 | /* 10195*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2627 | /* 10207*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2628 | /* 10210*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2629 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 2630 | /* 10218*/ OPC_EmitInteger, MVT::i32, 0, |
| 2631 | /* 10221*/ OPC_EmitInteger, MVT::i32, 0, |
| 2632 | /* 10224*/ OPC_EmitInteger, MVT::i32, 0, |
| 2633 | /* 10227*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2634 | /* 10239*/ OPC_EmitInteger, MVT::i32, 1, |
| 2635 | /* 10242*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2636 | /* 10245*/ OPC_EmitInteger, MVT::i32, 0, |
| 2637 | /* 10248*/ OPC_EmitInteger, MVT::i32, 0, |
| 2638 | /* 10251*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2639 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 2640 | /* 10277*/ OPC_EmitInteger, MVT::i32, 0, |
| 2641 | /* 10280*/ OPC_EmitInteger, MVT::i32, 0, |
| 2642 | /* 10283*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2643 | /* 10295*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2644 | /* 10298*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2645 | MVT::i32, 2/*#Ops*/, 1, 32, // Results = #33 |
| 2646 | /* 10306*/ OPC_EmitInteger, MVT::i32, 0, |
| 2647 | /* 10309*/ OPC_EmitInteger, MVT::i32, 0, |
| 2648 | /* 10312*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2649 | /* 10324*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2650 | /* 10327*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2651 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 2652 | /* 10335*/ OPC_EmitInteger, MVT::i32, 0, |
| 2653 | /* 10338*/ OPC_EmitInteger, MVT::i32, 0, |
| 2654 | /* 10341*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2655 | /* 10353*/ OPC_EmitInteger, MVT::i32, 1, |
| 2656 | /* 10356*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2657 | /* 10359*/ OPC_EmitInteger, MVT::i32, 0, |
| 2658 | /* 10362*/ OPC_EmitInteger, MVT::i32, 0, |
| 2659 | /* 10365*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2660 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 2661 | /* 10389*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2662 | /* 10392*/ OPC_EmitInteger, MVT::i32, 0, |
| 2663 | /* 10395*/ OPC_EmitInteger, MVT::i32, 0, |
| 2664 | /* 10398*/ OPC_EmitInteger, MVT::i32, 0, |
| 2665 | /* 10401*/ OPC_EmitInteger, MVT::i32, 0, |
| 2666 | /* 10404*/ OPC_EmitInteger, MVT::i32, 1, |
| 2667 | /* 10407*/ OPC_EmitInteger, MVT::i32, 0, |
| 2668 | /* 10410*/ OPC_EmitInteger, MVT::i32, 0, |
| 2669 | /* 10413*/ OPC_EmitInteger, MVT::i32, 0, |
| 2670 | /* 10416*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2671 | /* 10419*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2672 | MVT::i32, 2/*#Ops*/, 0, 56, // Results = #57 |
| 2673 | /* 10427*/ OPC_EmitInteger, MVT::i32, 0, |
| 2674 | /* 10430*/ OPC_EmitInteger, MVT::i32, 0, |
| 2675 | /* 10433*/ OPC_EmitInteger, MVT::i32, 0, |
| 2676 | /* 10436*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2677 | /* 10448*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2678 | /* 10451*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2679 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 2680 | /* 10459*/ OPC_EmitInteger, MVT::i32, 0, |
| 2681 | /* 10462*/ OPC_EmitInteger, MVT::i32, 0, |
| 2682 | /* 10465*/ OPC_EmitInteger, MVT::i32, 0, |
| 2683 | /* 10468*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2684 | /* 10480*/ OPC_EmitInteger, MVT::i32, 1, |
| 2685 | /* 10483*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2686 | /* 10486*/ OPC_EmitInteger, MVT::i32, 0, |
| 2687 | /* 10489*/ OPC_EmitInteger, MVT::i32, 0, |
| 2688 | /* 10492*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2689 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 2690 | /* 10518*/ OPC_EmitInteger, MVT::i32, 0, |
| 2691 | /* 10521*/ OPC_EmitInteger, MVT::i32, 0, |
| 2692 | /* 10524*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2693 | /* 10536*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2694 | /* 10539*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2695 | MVT::i32, 2/*#Ops*/, 1, 76, // Results = #77 |
| 2696 | /* 10547*/ OPC_EmitInteger, MVT::i32, 0, |
| 2697 | /* 10550*/ OPC_EmitInteger, MVT::i32, 0, |
| 2698 | /* 10553*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2699 | /* 10565*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2700 | /* 10568*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2701 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 2702 | /* 10576*/ OPC_EmitInteger, MVT::i32, 0, |
| 2703 | /* 10579*/ OPC_EmitInteger, MVT::i32, 0, |
| 2704 | /* 10582*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2705 | /* 10594*/ OPC_EmitInteger, MVT::i32, 1, |
| 2706 | /* 10597*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2707 | /* 10600*/ OPC_EmitInteger, MVT::i32, 0, |
| 2708 | /* 10603*/ OPC_EmitInteger, MVT::i32, 0, |
| 2709 | /* 10606*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2710 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 2711 | /* 10630*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2712 | /* 10633*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 2713 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 2714 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z), (and:{ *:[i64] } (or:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z), i64:{ *:[i64] }:$y)) - Complexity = 12 |
| 2715 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 2716 | /* 10644*/ /*Scope*/ 123|128,3/*507*/, /*->11153*/ |
| 2717 | /* 10646*/ OPC_CheckChild0Same, 1, |
| 2718 | /* 10648*/ OPC_CheckChild1Same, 0, |
| 2719 | /* 10650*/ OPC_MoveParent, |
| 2720 | /* 10651*/ OPC_RecordChild1, // #2 = $y |
| 2721 | /* 10652*/ OPC_MoveParent, |
| 2722 | /* 10653*/ OPC_CheckType, MVT::i64, |
| 2723 | /* 10655*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2724 | /* 10657*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 2725 | /* 10660*/ OPC_EmitInteger, MVT::i32, 0, |
| 2726 | /* 10663*/ OPC_EmitInteger, MVT::i32, 0, |
| 2727 | /* 10666*/ OPC_EmitInteger, MVT::i32, 0, |
| 2728 | /* 10669*/ OPC_EmitInteger, MVT::i32, 0, |
| 2729 | /* 10672*/ OPC_EmitInteger, MVT::i32, 1, |
| 2730 | /* 10675*/ OPC_EmitInteger, MVT::i32, 0, |
| 2731 | /* 10678*/ OPC_EmitInteger, MVT::i32, 0, |
| 2732 | /* 10681*/ OPC_EmitInteger, MVT::i32, 0, |
| 2733 | /* 10684*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2734 | /* 10687*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2735 | MVT::i32, 2/*#Ops*/, 0, 12, // Results = #13 |
| 2736 | /* 10695*/ OPC_EmitInteger, MVT::i32, 0, |
| 2737 | /* 10698*/ OPC_EmitInteger, MVT::i32, 0, |
| 2738 | /* 10701*/ OPC_EmitInteger, MVT::i32, 0, |
| 2739 | /* 10704*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2740 | /* 10716*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2741 | /* 10719*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2742 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 2743 | /* 10727*/ OPC_EmitInteger, MVT::i32, 0, |
| 2744 | /* 10730*/ OPC_EmitInteger, MVT::i32, 0, |
| 2745 | /* 10733*/ OPC_EmitInteger, MVT::i32, 0, |
| 2746 | /* 10736*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2747 | /* 10748*/ OPC_EmitInteger, MVT::i32, 1, |
| 2748 | /* 10751*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2749 | /* 10754*/ OPC_EmitInteger, MVT::i32, 0, |
| 2750 | /* 10757*/ OPC_EmitInteger, MVT::i32, 0, |
| 2751 | /* 10760*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2752 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 2753 | /* 10786*/ OPC_EmitInteger, MVT::i32, 0, |
| 2754 | /* 10789*/ OPC_EmitInteger, MVT::i32, 0, |
| 2755 | /* 10792*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2756 | /* 10804*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2757 | /* 10807*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2758 | MVT::i32, 2/*#Ops*/, 1, 32, // Results = #33 |
| 2759 | /* 10815*/ OPC_EmitInteger, MVT::i32, 0, |
| 2760 | /* 10818*/ OPC_EmitInteger, MVT::i32, 0, |
| 2761 | /* 10821*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2762 | /* 10833*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2763 | /* 10836*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2764 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 2765 | /* 10844*/ OPC_EmitInteger, MVT::i32, 0, |
| 2766 | /* 10847*/ OPC_EmitInteger, MVT::i32, 0, |
| 2767 | /* 10850*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2768 | /* 10862*/ OPC_EmitInteger, MVT::i32, 1, |
| 2769 | /* 10865*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2770 | /* 10868*/ OPC_EmitInteger, MVT::i32, 0, |
| 2771 | /* 10871*/ OPC_EmitInteger, MVT::i32, 0, |
| 2772 | /* 10874*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2773 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 2774 | /* 10898*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2775 | /* 10901*/ OPC_EmitInteger, MVT::i32, 0, |
| 2776 | /* 10904*/ OPC_EmitInteger, MVT::i32, 0, |
| 2777 | /* 10907*/ OPC_EmitInteger, MVT::i32, 0, |
| 2778 | /* 10910*/ OPC_EmitInteger, MVT::i32, 0, |
| 2779 | /* 10913*/ OPC_EmitInteger, MVT::i32, 1, |
| 2780 | /* 10916*/ OPC_EmitInteger, MVT::i32, 0, |
| 2781 | /* 10919*/ OPC_EmitInteger, MVT::i32, 0, |
| 2782 | /* 10922*/ OPC_EmitInteger, MVT::i32, 0, |
| 2783 | /* 10925*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2784 | /* 10928*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2785 | MVT::i32, 2/*#Ops*/, 0, 56, // Results = #57 |
| 2786 | /* 10936*/ OPC_EmitInteger, MVT::i32, 0, |
| 2787 | /* 10939*/ OPC_EmitInteger, MVT::i32, 0, |
| 2788 | /* 10942*/ OPC_EmitInteger, MVT::i32, 0, |
| 2789 | /* 10945*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2790 | /* 10957*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2791 | /* 10960*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2792 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 2793 | /* 10968*/ OPC_EmitInteger, MVT::i32, 0, |
| 2794 | /* 10971*/ OPC_EmitInteger, MVT::i32, 0, |
| 2795 | /* 10974*/ OPC_EmitInteger, MVT::i32, 0, |
| 2796 | /* 10977*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2797 | /* 10989*/ OPC_EmitInteger, MVT::i32, 1, |
| 2798 | /* 10992*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2799 | /* 10995*/ OPC_EmitInteger, MVT::i32, 0, |
| 2800 | /* 10998*/ OPC_EmitInteger, MVT::i32, 0, |
| 2801 | /* 11001*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2802 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 2803 | /* 11027*/ OPC_EmitInteger, MVT::i32, 0, |
| 2804 | /* 11030*/ OPC_EmitInteger, MVT::i32, 0, |
| 2805 | /* 11033*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2806 | /* 11045*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2807 | /* 11048*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2808 | MVT::i32, 2/*#Ops*/, 1, 76, // Results = #77 |
| 2809 | /* 11056*/ OPC_EmitInteger, MVT::i32, 0, |
| 2810 | /* 11059*/ OPC_EmitInteger, MVT::i32, 0, |
| 2811 | /* 11062*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2812 | /* 11074*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2813 | /* 11077*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2814 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 2815 | /* 11085*/ OPC_EmitInteger, MVT::i32, 0, |
| 2816 | /* 11088*/ OPC_EmitInteger, MVT::i32, 0, |
| 2817 | /* 11091*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2818 | /* 11103*/ OPC_EmitInteger, MVT::i32, 1, |
| 2819 | /* 11106*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2820 | /* 11109*/ OPC_EmitInteger, MVT::i32, 0, |
| 2821 | /* 11112*/ OPC_EmitInteger, MVT::i32, 0, |
| 2822 | /* 11115*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2823 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 2824 | /* 11139*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2825 | /* 11142*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 2826 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 2827 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z), (and:{ *:[i64] } (or:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x), i64:{ *:[i64] }:$y)) - Complexity = 12 |
| 2828 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 2829 | /* 11153*/ 0, /*End of Scope*/ |
| 2830 | /* 11154*/ /*Scope*/ 127|128,7/*1023*/, /*->12179*/ |
| 2831 | /* 11156*/ OPC_RecordChild0, // #2 = $y |
| 2832 | /* 11157*/ OPC_MoveChild1, |
| 2833 | /* 11158*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 2834 | /* 11161*/ OPC_Scope, 122|128,3/*506*/, /*->11670*/ // 2 children in Scope |
| 2835 | /* 11164*/ OPC_CheckChild0Same, 1, |
| 2836 | /* 11166*/ OPC_CheckChild1Same, 0, |
| 2837 | /* 11168*/ OPC_MoveParent, |
| 2838 | /* 11169*/ OPC_MoveParent, |
| 2839 | /* 11170*/ OPC_CheckType, MVT::i64, |
| 2840 | /* 11172*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2841 | /* 11174*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 2842 | /* 11177*/ OPC_EmitInteger, MVT::i32, 0, |
| 2843 | /* 11180*/ OPC_EmitInteger, MVT::i32, 0, |
| 2844 | /* 11183*/ OPC_EmitInteger, MVT::i32, 0, |
| 2845 | /* 11186*/ OPC_EmitInteger, MVT::i32, 0, |
| 2846 | /* 11189*/ OPC_EmitInteger, MVT::i32, 1, |
| 2847 | /* 11192*/ OPC_EmitInteger, MVT::i32, 0, |
| 2848 | /* 11195*/ OPC_EmitInteger, MVT::i32, 0, |
| 2849 | /* 11198*/ OPC_EmitInteger, MVT::i32, 0, |
| 2850 | /* 11201*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2851 | /* 11204*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2852 | MVT::i32, 2/*#Ops*/, 1, 12, // Results = #13 |
| 2853 | /* 11212*/ OPC_EmitInteger, MVT::i32, 0, |
| 2854 | /* 11215*/ OPC_EmitInteger, MVT::i32, 0, |
| 2855 | /* 11218*/ OPC_EmitInteger, MVT::i32, 0, |
| 2856 | /* 11221*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2857 | /* 11233*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2858 | /* 11236*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2859 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 2860 | /* 11244*/ OPC_EmitInteger, MVT::i32, 0, |
| 2861 | /* 11247*/ OPC_EmitInteger, MVT::i32, 0, |
| 2862 | /* 11250*/ OPC_EmitInteger, MVT::i32, 0, |
| 2863 | /* 11253*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2864 | /* 11265*/ OPC_EmitInteger, MVT::i32, 1, |
| 2865 | /* 11268*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2866 | /* 11271*/ OPC_EmitInteger, MVT::i32, 0, |
| 2867 | /* 11274*/ OPC_EmitInteger, MVT::i32, 0, |
| 2868 | /* 11277*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2869 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 2870 | /* 11303*/ OPC_EmitInteger, MVT::i32, 0, |
| 2871 | /* 11306*/ OPC_EmitInteger, MVT::i32, 0, |
| 2872 | /* 11309*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2873 | /* 11321*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2874 | /* 11324*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2875 | MVT::i32, 2/*#Ops*/, 0, 32, // Results = #33 |
| 2876 | /* 11332*/ OPC_EmitInteger, MVT::i32, 0, |
| 2877 | /* 11335*/ OPC_EmitInteger, MVT::i32, 0, |
| 2878 | /* 11338*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2879 | /* 11350*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2880 | /* 11353*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2881 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 2882 | /* 11361*/ OPC_EmitInteger, MVT::i32, 0, |
| 2883 | /* 11364*/ OPC_EmitInteger, MVT::i32, 0, |
| 2884 | /* 11367*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2885 | /* 11379*/ OPC_EmitInteger, MVT::i32, 1, |
| 2886 | /* 11382*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2887 | /* 11385*/ OPC_EmitInteger, MVT::i32, 0, |
| 2888 | /* 11388*/ OPC_EmitInteger, MVT::i32, 0, |
| 2889 | /* 11391*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2890 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 2891 | /* 11415*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2892 | /* 11418*/ OPC_EmitInteger, MVT::i32, 0, |
| 2893 | /* 11421*/ OPC_EmitInteger, MVT::i32, 0, |
| 2894 | /* 11424*/ OPC_EmitInteger, MVT::i32, 0, |
| 2895 | /* 11427*/ OPC_EmitInteger, MVT::i32, 0, |
| 2896 | /* 11430*/ OPC_EmitInteger, MVT::i32, 1, |
| 2897 | /* 11433*/ OPC_EmitInteger, MVT::i32, 0, |
| 2898 | /* 11436*/ OPC_EmitInteger, MVT::i32, 0, |
| 2899 | /* 11439*/ OPC_EmitInteger, MVT::i32, 0, |
| 2900 | /* 11442*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2901 | /* 11445*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2902 | MVT::i32, 2/*#Ops*/, 1, 56, // Results = #57 |
| 2903 | /* 11453*/ OPC_EmitInteger, MVT::i32, 0, |
| 2904 | /* 11456*/ OPC_EmitInteger, MVT::i32, 0, |
| 2905 | /* 11459*/ OPC_EmitInteger, MVT::i32, 0, |
| 2906 | /* 11462*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2907 | /* 11474*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2908 | /* 11477*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2909 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 2910 | /* 11485*/ OPC_EmitInteger, MVT::i32, 0, |
| 2911 | /* 11488*/ OPC_EmitInteger, MVT::i32, 0, |
| 2912 | /* 11491*/ OPC_EmitInteger, MVT::i32, 0, |
| 2913 | /* 11494*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2914 | /* 11506*/ OPC_EmitInteger, MVT::i32, 1, |
| 2915 | /* 11509*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2916 | /* 11512*/ OPC_EmitInteger, MVT::i32, 0, |
| 2917 | /* 11515*/ OPC_EmitInteger, MVT::i32, 0, |
| 2918 | /* 11518*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2919 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 2920 | /* 11544*/ OPC_EmitInteger, MVT::i32, 0, |
| 2921 | /* 11547*/ OPC_EmitInteger, MVT::i32, 0, |
| 2922 | /* 11550*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2923 | /* 11562*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2924 | /* 11565*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2925 | MVT::i32, 2/*#Ops*/, 0, 76, // Results = #77 |
| 2926 | /* 11573*/ OPC_EmitInteger, MVT::i32, 0, |
| 2927 | /* 11576*/ OPC_EmitInteger, MVT::i32, 0, |
| 2928 | /* 11579*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2929 | /* 11591*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2930 | /* 11594*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2931 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 2932 | /* 11602*/ OPC_EmitInteger, MVT::i32, 0, |
| 2933 | /* 11605*/ OPC_EmitInteger, MVT::i32, 0, |
| 2934 | /* 11608*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2935 | /* 11620*/ OPC_EmitInteger, MVT::i32, 1, |
| 2936 | /* 11623*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2937 | /* 11626*/ OPC_EmitInteger, MVT::i32, 0, |
| 2938 | /* 11629*/ OPC_EmitInteger, MVT::i32, 0, |
| 2939 | /* 11632*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 2940 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 2941 | /* 11656*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 2942 | /* 11659*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 2943 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 2944 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x), (and:{ *:[i64] } i64:{ *:[i64] }:$y, (or:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z))) - Complexity = 12 |
| 2945 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 2946 | /* 11670*/ /*Scope*/ 122|128,3/*506*/, /*->12178*/ |
| 2947 | /* 11672*/ OPC_CheckChild0Same, 0, |
| 2948 | /* 11674*/ OPC_CheckChild1Same, 1, |
| 2949 | /* 11676*/ OPC_MoveParent, |
| 2950 | /* 11677*/ OPC_MoveParent, |
| 2951 | /* 11678*/ OPC_CheckType, MVT::i64, |
| 2952 | /* 11680*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 2953 | /* 11682*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 2954 | /* 11685*/ OPC_EmitInteger, MVT::i32, 0, |
| 2955 | /* 11688*/ OPC_EmitInteger, MVT::i32, 0, |
| 2956 | /* 11691*/ OPC_EmitInteger, MVT::i32, 0, |
| 2957 | /* 11694*/ OPC_EmitInteger, MVT::i32, 0, |
| 2958 | /* 11697*/ OPC_EmitInteger, MVT::i32, 1, |
| 2959 | /* 11700*/ OPC_EmitInteger, MVT::i32, 0, |
| 2960 | /* 11703*/ OPC_EmitInteger, MVT::i32, 0, |
| 2961 | /* 11706*/ OPC_EmitInteger, MVT::i32, 0, |
| 2962 | /* 11709*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2963 | /* 11712*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2964 | MVT::i32, 2/*#Ops*/, 1, 12, // Results = #13 |
| 2965 | /* 11720*/ OPC_EmitInteger, MVT::i32, 0, |
| 2966 | /* 11723*/ OPC_EmitInteger, MVT::i32, 0, |
| 2967 | /* 11726*/ OPC_EmitInteger, MVT::i32, 0, |
| 2968 | /* 11729*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2969 | /* 11741*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2970 | /* 11744*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2971 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 2972 | /* 11752*/ OPC_EmitInteger, MVT::i32, 0, |
| 2973 | /* 11755*/ OPC_EmitInteger, MVT::i32, 0, |
| 2974 | /* 11758*/ OPC_EmitInteger, MVT::i32, 0, |
| 2975 | /* 11761*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2976 | /* 11773*/ OPC_EmitInteger, MVT::i32, 1, |
| 2977 | /* 11776*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2978 | /* 11779*/ OPC_EmitInteger, MVT::i32, 0, |
| 2979 | /* 11782*/ OPC_EmitInteger, MVT::i32, 0, |
| 2980 | /* 11785*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 2981 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 2982 | /* 11811*/ OPC_EmitInteger, MVT::i32, 0, |
| 2983 | /* 11814*/ OPC_EmitInteger, MVT::i32, 0, |
| 2984 | /* 11817*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2985 | /* 11829*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2986 | /* 11832*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2987 | MVT::i32, 2/*#Ops*/, 0, 32, // Results = #33 |
| 2988 | /* 11840*/ OPC_EmitInteger, MVT::i32, 0, |
| 2989 | /* 11843*/ OPC_EmitInteger, MVT::i32, 0, |
| 2990 | /* 11846*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2991 | /* 11858*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 2992 | /* 11861*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 2993 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 2994 | /* 11869*/ OPC_EmitInteger, MVT::i32, 0, |
| 2995 | /* 11872*/ OPC_EmitInteger, MVT::i32, 0, |
| 2996 | /* 11875*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 2997 | /* 11887*/ OPC_EmitInteger, MVT::i32, 1, |
| 2998 | /* 11890*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 2999 | /* 11893*/ OPC_EmitInteger, MVT::i32, 0, |
| 3000 | /* 11896*/ OPC_EmitInteger, MVT::i32, 0, |
| 3001 | /* 11899*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3002 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 3003 | /* 11923*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3004 | /* 11926*/ OPC_EmitInteger, MVT::i32, 0, |
| 3005 | /* 11929*/ OPC_EmitInteger, MVT::i32, 0, |
| 3006 | /* 11932*/ OPC_EmitInteger, MVT::i32, 0, |
| 3007 | /* 11935*/ OPC_EmitInteger, MVT::i32, 0, |
| 3008 | /* 11938*/ OPC_EmitInteger, MVT::i32, 1, |
| 3009 | /* 11941*/ OPC_EmitInteger, MVT::i32, 0, |
| 3010 | /* 11944*/ OPC_EmitInteger, MVT::i32, 0, |
| 3011 | /* 11947*/ OPC_EmitInteger, MVT::i32, 0, |
| 3012 | /* 11950*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3013 | /* 11953*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3014 | MVT::i32, 2/*#Ops*/, 1, 56, // Results = #57 |
| 3015 | /* 11961*/ OPC_EmitInteger, MVT::i32, 0, |
| 3016 | /* 11964*/ OPC_EmitInteger, MVT::i32, 0, |
| 3017 | /* 11967*/ OPC_EmitInteger, MVT::i32, 0, |
| 3018 | /* 11970*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3019 | /* 11982*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3020 | /* 11985*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3021 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 3022 | /* 11993*/ OPC_EmitInteger, MVT::i32, 0, |
| 3023 | /* 11996*/ OPC_EmitInteger, MVT::i32, 0, |
| 3024 | /* 11999*/ OPC_EmitInteger, MVT::i32, 0, |
| 3025 | /* 12002*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3026 | /* 12014*/ OPC_EmitInteger, MVT::i32, 1, |
| 3027 | /* 12017*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3028 | /* 12020*/ OPC_EmitInteger, MVT::i32, 0, |
| 3029 | /* 12023*/ OPC_EmitInteger, MVT::i32, 0, |
| 3030 | /* 12026*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3031 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 3032 | /* 12052*/ OPC_EmitInteger, MVT::i32, 0, |
| 3033 | /* 12055*/ OPC_EmitInteger, MVT::i32, 0, |
| 3034 | /* 12058*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3035 | /* 12070*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3036 | /* 12073*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3037 | MVT::i32, 2/*#Ops*/, 0, 76, // Results = #77 |
| 3038 | /* 12081*/ OPC_EmitInteger, MVT::i32, 0, |
| 3039 | /* 12084*/ OPC_EmitInteger, MVT::i32, 0, |
| 3040 | /* 12087*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3041 | /* 12099*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3042 | /* 12102*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3043 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 3044 | /* 12110*/ OPC_EmitInteger, MVT::i32, 0, |
| 3045 | /* 12113*/ OPC_EmitInteger, MVT::i32, 0, |
| 3046 | /* 12116*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3047 | /* 12128*/ OPC_EmitInteger, MVT::i32, 1, |
| 3048 | /* 12131*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3049 | /* 12134*/ OPC_EmitInteger, MVT::i32, 0, |
| 3050 | /* 12137*/ OPC_EmitInteger, MVT::i32, 0, |
| 3051 | /* 12140*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3052 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 3053 | /* 12164*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3054 | /* 12167*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 3055 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 3056 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x), (and:{ *:[i64] } i64:{ *:[i64] }:$y, (or:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x))) - Complexity = 12 |
| 3057 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 3058 | /* 12178*/ 0, /*End of Scope*/ |
| 3059 | /* 12179*/ /*Scope*/ 0|128,8/*1024*/, /*->13205*/ |
| 3060 | /* 12181*/ OPC_MoveChild0, |
| 3061 | /* 12182*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 3062 | /* 12185*/ OPC_Scope, 123|128,3/*507*/, /*->12695*/ // 2 children in Scope |
| 3063 | /* 12188*/ OPC_CheckChild0Same, 1, |
| 3064 | /* 12190*/ OPC_CheckChild1Same, 0, |
| 3065 | /* 12192*/ OPC_MoveParent, |
| 3066 | /* 12193*/ OPC_RecordChild1, // #2 = $y |
| 3067 | /* 12194*/ OPC_MoveParent, |
| 3068 | /* 12195*/ OPC_CheckType, MVT::i64, |
| 3069 | /* 12197*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 3070 | /* 12199*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 3071 | /* 12202*/ OPC_EmitInteger, MVT::i32, 0, |
| 3072 | /* 12205*/ OPC_EmitInteger, MVT::i32, 0, |
| 3073 | /* 12208*/ OPC_EmitInteger, MVT::i32, 0, |
| 3074 | /* 12211*/ OPC_EmitInteger, MVT::i32, 0, |
| 3075 | /* 12214*/ OPC_EmitInteger, MVT::i32, 1, |
| 3076 | /* 12217*/ OPC_EmitInteger, MVT::i32, 0, |
| 3077 | /* 12220*/ OPC_EmitInteger, MVT::i32, 0, |
| 3078 | /* 12223*/ OPC_EmitInteger, MVT::i32, 0, |
| 3079 | /* 12226*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3080 | /* 12229*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3081 | MVT::i32, 2/*#Ops*/, 1, 12, // Results = #13 |
| 3082 | /* 12237*/ OPC_EmitInteger, MVT::i32, 0, |
| 3083 | /* 12240*/ OPC_EmitInteger, MVT::i32, 0, |
| 3084 | /* 12243*/ OPC_EmitInteger, MVT::i32, 0, |
| 3085 | /* 12246*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3086 | /* 12258*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3087 | /* 12261*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3088 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 3089 | /* 12269*/ OPC_EmitInteger, MVT::i32, 0, |
| 3090 | /* 12272*/ OPC_EmitInteger, MVT::i32, 0, |
| 3091 | /* 12275*/ OPC_EmitInteger, MVT::i32, 0, |
| 3092 | /* 12278*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3093 | /* 12290*/ OPC_EmitInteger, MVT::i32, 1, |
| 3094 | /* 12293*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3095 | /* 12296*/ OPC_EmitInteger, MVT::i32, 0, |
| 3096 | /* 12299*/ OPC_EmitInteger, MVT::i32, 0, |
| 3097 | /* 12302*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3098 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 3099 | /* 12328*/ OPC_EmitInteger, MVT::i32, 0, |
| 3100 | /* 12331*/ OPC_EmitInteger, MVT::i32, 0, |
| 3101 | /* 12334*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3102 | /* 12346*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3103 | /* 12349*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3104 | MVT::i32, 2/*#Ops*/, 0, 32, // Results = #33 |
| 3105 | /* 12357*/ OPC_EmitInteger, MVT::i32, 0, |
| 3106 | /* 12360*/ OPC_EmitInteger, MVT::i32, 0, |
| 3107 | /* 12363*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3108 | /* 12375*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3109 | /* 12378*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3110 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 3111 | /* 12386*/ OPC_EmitInteger, MVT::i32, 0, |
| 3112 | /* 12389*/ OPC_EmitInteger, MVT::i32, 0, |
| 3113 | /* 12392*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3114 | /* 12404*/ OPC_EmitInteger, MVT::i32, 1, |
| 3115 | /* 12407*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3116 | /* 12410*/ OPC_EmitInteger, MVT::i32, 0, |
| 3117 | /* 12413*/ OPC_EmitInteger, MVT::i32, 0, |
| 3118 | /* 12416*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3119 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 3120 | /* 12440*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3121 | /* 12443*/ OPC_EmitInteger, MVT::i32, 0, |
| 3122 | /* 12446*/ OPC_EmitInteger, MVT::i32, 0, |
| 3123 | /* 12449*/ OPC_EmitInteger, MVT::i32, 0, |
| 3124 | /* 12452*/ OPC_EmitInteger, MVT::i32, 0, |
| 3125 | /* 12455*/ OPC_EmitInteger, MVT::i32, 1, |
| 3126 | /* 12458*/ OPC_EmitInteger, MVT::i32, 0, |
| 3127 | /* 12461*/ OPC_EmitInteger, MVT::i32, 0, |
| 3128 | /* 12464*/ OPC_EmitInteger, MVT::i32, 0, |
| 3129 | /* 12467*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3130 | /* 12470*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3131 | MVT::i32, 2/*#Ops*/, 1, 56, // Results = #57 |
| 3132 | /* 12478*/ OPC_EmitInteger, MVT::i32, 0, |
| 3133 | /* 12481*/ OPC_EmitInteger, MVT::i32, 0, |
| 3134 | /* 12484*/ OPC_EmitInteger, MVT::i32, 0, |
| 3135 | /* 12487*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3136 | /* 12499*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3137 | /* 12502*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3138 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 3139 | /* 12510*/ OPC_EmitInteger, MVT::i32, 0, |
| 3140 | /* 12513*/ OPC_EmitInteger, MVT::i32, 0, |
| 3141 | /* 12516*/ OPC_EmitInteger, MVT::i32, 0, |
| 3142 | /* 12519*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3143 | /* 12531*/ OPC_EmitInteger, MVT::i32, 1, |
| 3144 | /* 12534*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3145 | /* 12537*/ OPC_EmitInteger, MVT::i32, 0, |
| 3146 | /* 12540*/ OPC_EmitInteger, MVT::i32, 0, |
| 3147 | /* 12543*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3148 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 3149 | /* 12569*/ OPC_EmitInteger, MVT::i32, 0, |
| 3150 | /* 12572*/ OPC_EmitInteger, MVT::i32, 0, |
| 3151 | /* 12575*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3152 | /* 12587*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3153 | /* 12590*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3154 | MVT::i32, 2/*#Ops*/, 0, 76, // Results = #77 |
| 3155 | /* 12598*/ OPC_EmitInteger, MVT::i32, 0, |
| 3156 | /* 12601*/ OPC_EmitInteger, MVT::i32, 0, |
| 3157 | /* 12604*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3158 | /* 12616*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3159 | /* 12619*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3160 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 3161 | /* 12627*/ OPC_EmitInteger, MVT::i32, 0, |
| 3162 | /* 12630*/ OPC_EmitInteger, MVT::i32, 0, |
| 3163 | /* 12633*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3164 | /* 12645*/ OPC_EmitInteger, MVT::i32, 1, |
| 3165 | /* 12648*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3166 | /* 12651*/ OPC_EmitInteger, MVT::i32, 0, |
| 3167 | /* 12654*/ OPC_EmitInteger, MVT::i32, 0, |
| 3168 | /* 12657*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3169 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 3170 | /* 12681*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3171 | /* 12684*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 3172 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 3173 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x), (and:{ *:[i64] } (or:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z), i64:{ *:[i64] }:$y)) - Complexity = 12 |
| 3174 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 3175 | /* 12695*/ /*Scope*/ 123|128,3/*507*/, /*->13204*/ |
| 3176 | /* 12697*/ OPC_CheckChild0Same, 0, |
| 3177 | /* 12699*/ OPC_CheckChild1Same, 1, |
| 3178 | /* 12701*/ OPC_MoveParent, |
| 3179 | /* 12702*/ OPC_RecordChild1, // #2 = $y |
| 3180 | /* 12703*/ OPC_MoveParent, |
| 3181 | /* 12704*/ OPC_CheckType, MVT::i64, |
| 3182 | /* 12706*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 3183 | /* 12708*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 3184 | /* 12711*/ OPC_EmitInteger, MVT::i32, 0, |
| 3185 | /* 12714*/ OPC_EmitInteger, MVT::i32, 0, |
| 3186 | /* 12717*/ OPC_EmitInteger, MVT::i32, 0, |
| 3187 | /* 12720*/ OPC_EmitInteger, MVT::i32, 0, |
| 3188 | /* 12723*/ OPC_EmitInteger, MVT::i32, 1, |
| 3189 | /* 12726*/ OPC_EmitInteger, MVT::i32, 0, |
| 3190 | /* 12729*/ OPC_EmitInteger, MVT::i32, 0, |
| 3191 | /* 12732*/ OPC_EmitInteger, MVT::i32, 0, |
| 3192 | /* 12735*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3193 | /* 12738*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3194 | MVT::i32, 2/*#Ops*/, 1, 12, // Results = #13 |
| 3195 | /* 12746*/ OPC_EmitInteger, MVT::i32, 0, |
| 3196 | /* 12749*/ OPC_EmitInteger, MVT::i32, 0, |
| 3197 | /* 12752*/ OPC_EmitInteger, MVT::i32, 0, |
| 3198 | /* 12755*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3199 | /* 12767*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3200 | /* 12770*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3201 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 3202 | /* 12778*/ OPC_EmitInteger, MVT::i32, 0, |
| 3203 | /* 12781*/ OPC_EmitInteger, MVT::i32, 0, |
| 3204 | /* 12784*/ OPC_EmitInteger, MVT::i32, 0, |
| 3205 | /* 12787*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3206 | /* 12799*/ OPC_EmitInteger, MVT::i32, 1, |
| 3207 | /* 12802*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3208 | /* 12805*/ OPC_EmitInteger, MVT::i32, 0, |
| 3209 | /* 12808*/ OPC_EmitInteger, MVT::i32, 0, |
| 3210 | /* 12811*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3211 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 3212 | /* 12837*/ OPC_EmitInteger, MVT::i32, 0, |
| 3213 | /* 12840*/ OPC_EmitInteger, MVT::i32, 0, |
| 3214 | /* 12843*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3215 | /* 12855*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3216 | /* 12858*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3217 | MVT::i32, 2/*#Ops*/, 0, 32, // Results = #33 |
| 3218 | /* 12866*/ OPC_EmitInteger, MVT::i32, 0, |
| 3219 | /* 12869*/ OPC_EmitInteger, MVT::i32, 0, |
| 3220 | /* 12872*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3221 | /* 12884*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3222 | /* 12887*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3223 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 3224 | /* 12895*/ OPC_EmitInteger, MVT::i32, 0, |
| 3225 | /* 12898*/ OPC_EmitInteger, MVT::i32, 0, |
| 3226 | /* 12901*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3227 | /* 12913*/ OPC_EmitInteger, MVT::i32, 1, |
| 3228 | /* 12916*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3229 | /* 12919*/ OPC_EmitInteger, MVT::i32, 0, |
| 3230 | /* 12922*/ OPC_EmitInteger, MVT::i32, 0, |
| 3231 | /* 12925*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3232 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 3233 | /* 12949*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3234 | /* 12952*/ OPC_EmitInteger, MVT::i32, 0, |
| 3235 | /* 12955*/ OPC_EmitInteger, MVT::i32, 0, |
| 3236 | /* 12958*/ OPC_EmitInteger, MVT::i32, 0, |
| 3237 | /* 12961*/ OPC_EmitInteger, MVT::i32, 0, |
| 3238 | /* 12964*/ OPC_EmitInteger, MVT::i32, 1, |
| 3239 | /* 12967*/ OPC_EmitInteger, MVT::i32, 0, |
| 3240 | /* 12970*/ OPC_EmitInteger, MVT::i32, 0, |
| 3241 | /* 12973*/ OPC_EmitInteger, MVT::i32, 0, |
| 3242 | /* 12976*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3243 | /* 12979*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3244 | MVT::i32, 2/*#Ops*/, 1, 56, // Results = #57 |
| 3245 | /* 12987*/ OPC_EmitInteger, MVT::i32, 0, |
| 3246 | /* 12990*/ OPC_EmitInteger, MVT::i32, 0, |
| 3247 | /* 12993*/ OPC_EmitInteger, MVT::i32, 0, |
| 3248 | /* 12996*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3249 | /* 13008*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3250 | /* 13011*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3251 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 3252 | /* 13019*/ OPC_EmitInteger, MVT::i32, 0, |
| 3253 | /* 13022*/ OPC_EmitInteger, MVT::i32, 0, |
| 3254 | /* 13025*/ OPC_EmitInteger, MVT::i32, 0, |
| 3255 | /* 13028*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3256 | /* 13040*/ OPC_EmitInteger, MVT::i32, 1, |
| 3257 | /* 13043*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3258 | /* 13046*/ OPC_EmitInteger, MVT::i32, 0, |
| 3259 | /* 13049*/ OPC_EmitInteger, MVT::i32, 0, |
| 3260 | /* 13052*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3261 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 3262 | /* 13078*/ OPC_EmitInteger, MVT::i32, 0, |
| 3263 | /* 13081*/ OPC_EmitInteger, MVT::i32, 0, |
| 3264 | /* 13084*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3265 | /* 13096*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3266 | /* 13099*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3267 | MVT::i32, 2/*#Ops*/, 0, 76, // Results = #77 |
| 3268 | /* 13107*/ OPC_EmitInteger, MVT::i32, 0, |
| 3269 | /* 13110*/ OPC_EmitInteger, MVT::i32, 0, |
| 3270 | /* 13113*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3271 | /* 13125*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3272 | /* 13128*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3273 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 3274 | /* 13136*/ OPC_EmitInteger, MVT::i32, 0, |
| 3275 | /* 13139*/ OPC_EmitInteger, MVT::i32, 0, |
| 3276 | /* 13142*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3277 | /* 13154*/ OPC_EmitInteger, MVT::i32, 1, |
| 3278 | /* 13157*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3279 | /* 13160*/ OPC_EmitInteger, MVT::i32, 0, |
| 3280 | /* 13163*/ OPC_EmitInteger, MVT::i32, 0, |
| 3281 | /* 13166*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3282 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 3283 | /* 13190*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3284 | /* 13193*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 3285 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 3286 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x), (and:{ *:[i64] } (or:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x), i64:{ *:[i64] }:$y)) - Complexity = 12 |
| 3287 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 3288 | /* 13204*/ 0, /*End of Scope*/ |
| 3289 | /* 13205*/ 0, /*End of Scope*/ |
| 3290 | /* 13206*/ /*Scope*/ 87|128,15/*2007*/, /*->15215*/ |
| 3291 | /* 13208*/ OPC_MoveChild1, |
| 3292 | /* 13209*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 3293 | /* 13212*/ OPC_RecordChild0, // #1 = $x |
| 3294 | /* 13213*/ OPC_RecordChild1, // #2 = $z |
| 3295 | /* 13214*/ OPC_MoveParent, |
| 3296 | /* 13215*/ OPC_MoveParent, |
| 3297 | /* 13216*/ OPC_MoveChild1, |
| 3298 | /* 13217*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 3299 | /* 13220*/ OPC_Scope, 121|128,3/*505*/, /*->13728*/ // 3 children in Scope |
| 3300 | /* 13223*/ OPC_CheckChild0Same, 1, |
| 3301 | /* 13225*/ OPC_CheckChild1Same, 2, |
| 3302 | /* 13227*/ OPC_MoveParent, |
| 3303 | /* 13228*/ OPC_CheckType, MVT::i64, |
| 3304 | /* 13230*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 3305 | /* 13232*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 3306 | /* 13235*/ OPC_EmitInteger, MVT::i32, 0, |
| 3307 | /* 13238*/ OPC_EmitInteger, MVT::i32, 0, |
| 3308 | /* 13241*/ OPC_EmitInteger, MVT::i32, 0, |
| 3309 | /* 13244*/ OPC_EmitInteger, MVT::i32, 0, |
| 3310 | /* 13247*/ OPC_EmitInteger, MVT::i32, 1, |
| 3311 | /* 13250*/ OPC_EmitInteger, MVT::i32, 0, |
| 3312 | /* 13253*/ OPC_EmitInteger, MVT::i32, 0, |
| 3313 | /* 13256*/ OPC_EmitInteger, MVT::i32, 0, |
| 3314 | /* 13259*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3315 | /* 13262*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3316 | MVT::i32, 2/*#Ops*/, 1, 12, // Results = #13 |
| 3317 | /* 13270*/ OPC_EmitInteger, MVT::i32, 0, |
| 3318 | /* 13273*/ OPC_EmitInteger, MVT::i32, 0, |
| 3319 | /* 13276*/ OPC_EmitInteger, MVT::i32, 0, |
| 3320 | /* 13279*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3321 | /* 13291*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3322 | /* 13294*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3323 | MVT::i32, 2/*#Ops*/, 0, 18, // Results = #19 |
| 3324 | /* 13302*/ OPC_EmitInteger, MVT::i32, 0, |
| 3325 | /* 13305*/ OPC_EmitInteger, MVT::i32, 0, |
| 3326 | /* 13308*/ OPC_EmitInteger, MVT::i32, 0, |
| 3327 | /* 13311*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3328 | /* 13323*/ OPC_EmitInteger, MVT::i32, 1, |
| 3329 | /* 13326*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3330 | /* 13329*/ OPC_EmitInteger, MVT::i32, 0, |
| 3331 | /* 13332*/ OPC_EmitInteger, MVT::i32, 0, |
| 3332 | /* 13335*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3333 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 3334 | /* 13361*/ OPC_EmitInteger, MVT::i32, 0, |
| 3335 | /* 13364*/ OPC_EmitInteger, MVT::i32, 0, |
| 3336 | /* 13367*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3337 | /* 13379*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3338 | /* 13382*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3339 | MVT::i32, 2/*#Ops*/, 2, 32, // Results = #33 |
| 3340 | /* 13390*/ OPC_EmitInteger, MVT::i32, 0, |
| 3341 | /* 13393*/ OPC_EmitInteger, MVT::i32, 0, |
| 3342 | /* 13396*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3343 | /* 13408*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3344 | /* 13411*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3345 | MVT::i32, 2/*#Ops*/, 0, 37, // Results = #38 |
| 3346 | /* 13419*/ OPC_EmitInteger, MVT::i32, 0, |
| 3347 | /* 13422*/ OPC_EmitInteger, MVT::i32, 0, |
| 3348 | /* 13425*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3349 | /* 13437*/ OPC_EmitInteger, MVT::i32, 1, |
| 3350 | /* 13440*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3351 | /* 13443*/ OPC_EmitInteger, MVT::i32, 0, |
| 3352 | /* 13446*/ OPC_EmitInteger, MVT::i32, 0, |
| 3353 | /* 13449*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3354 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 3355 | /* 13473*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3356 | /* 13476*/ OPC_EmitInteger, MVT::i32, 0, |
| 3357 | /* 13479*/ OPC_EmitInteger, MVT::i32, 0, |
| 3358 | /* 13482*/ OPC_EmitInteger, MVT::i32, 0, |
| 3359 | /* 13485*/ OPC_EmitInteger, MVT::i32, 0, |
| 3360 | /* 13488*/ OPC_EmitInteger, MVT::i32, 1, |
| 3361 | /* 13491*/ OPC_EmitInteger, MVT::i32, 0, |
| 3362 | /* 13494*/ OPC_EmitInteger, MVT::i32, 0, |
| 3363 | /* 13497*/ OPC_EmitInteger, MVT::i32, 0, |
| 3364 | /* 13500*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3365 | /* 13503*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3366 | MVT::i32, 2/*#Ops*/, 1, 56, // Results = #57 |
| 3367 | /* 13511*/ OPC_EmitInteger, MVT::i32, 0, |
| 3368 | /* 13514*/ OPC_EmitInteger, MVT::i32, 0, |
| 3369 | /* 13517*/ OPC_EmitInteger, MVT::i32, 0, |
| 3370 | /* 13520*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3371 | /* 13532*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3372 | /* 13535*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3373 | MVT::i32, 2/*#Ops*/, 0, 62, // Results = #63 |
| 3374 | /* 13543*/ OPC_EmitInteger, MVT::i32, 0, |
| 3375 | /* 13546*/ OPC_EmitInteger, MVT::i32, 0, |
| 3376 | /* 13549*/ OPC_EmitInteger, MVT::i32, 0, |
| 3377 | /* 13552*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3378 | /* 13564*/ OPC_EmitInteger, MVT::i32, 1, |
| 3379 | /* 13567*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3380 | /* 13570*/ OPC_EmitInteger, MVT::i32, 0, |
| 3381 | /* 13573*/ OPC_EmitInteger, MVT::i32, 0, |
| 3382 | /* 13576*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3383 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 3384 | /* 13602*/ OPC_EmitInteger, MVT::i32, 0, |
| 3385 | /* 13605*/ OPC_EmitInteger, MVT::i32, 0, |
| 3386 | /* 13608*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3387 | /* 13620*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3388 | /* 13623*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3389 | MVT::i32, 2/*#Ops*/, 2, 76, // Results = #77 |
| 3390 | /* 13631*/ OPC_EmitInteger, MVT::i32, 0, |
| 3391 | /* 13634*/ OPC_EmitInteger, MVT::i32, 0, |
| 3392 | /* 13637*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3393 | /* 13649*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3394 | /* 13652*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3395 | MVT::i32, 2/*#Ops*/, 0, 81, // Results = #82 |
| 3396 | /* 13660*/ OPC_EmitInteger, MVT::i32, 0, |
| 3397 | /* 13663*/ OPC_EmitInteger, MVT::i32, 0, |
| 3398 | /* 13666*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3399 | /* 13678*/ OPC_EmitInteger, MVT::i32, 1, |
| 3400 | /* 13681*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3401 | /* 13684*/ OPC_EmitInteger, MVT::i32, 0, |
| 3402 | /* 13687*/ OPC_EmitInteger, MVT::i32, 0, |
| 3403 | /* 13690*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3404 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 3405 | /* 13714*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3406 | /* 13717*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 3407 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 3408 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$y, (or:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z)), (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z)) - Complexity = 12 |
| 3409 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 3410 | /* 13728*/ /*Scope*/ 81|128,7/*977*/, /*->14707*/ |
| 3411 | /* 13730*/ OPC_CheckChild0Same, 2, |
| 3412 | /* 13732*/ OPC_CheckChild1Same, 1, |
| 3413 | /* 13734*/ OPC_MoveParent, |
| 3414 | /* 13735*/ OPC_CheckType, MVT::i64, |
| 3415 | /* 13737*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 3416 | /* 13739*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 3417 | /* 13742*/ OPC_EmitInteger, MVT::i32, 0, |
| 3418 | /* 13745*/ OPC_EmitInteger, MVT::i32, 0, |
| 3419 | /* 13748*/ OPC_EmitInteger, MVT::i32, 0, |
| 3420 | /* 13751*/ OPC_EmitInteger, MVT::i32, 0, |
| 3421 | /* 13754*/ OPC_EmitInteger, MVT::i32, 1, |
| 3422 | /* 13757*/ OPC_EmitInteger, MVT::i32, 0, |
| 3423 | /* 13760*/ OPC_EmitInteger, MVT::i32, 0, |
| 3424 | /* 13763*/ OPC_EmitInteger, MVT::i32, 0, |
| 3425 | /* 13766*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3426 | /* 13769*/ OPC_Scope, 82|128,3/*466*/, /*->14238*/ // 2 children in Scope |
| 3427 | /* 13772*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3428 | MVT::i32, 2/*#Ops*/, 1, 12, // Results = #13 |
| 3429 | /* 13780*/ OPC_EmitInteger, MVT::i32, 0, |
| 3430 | /* 13783*/ OPC_EmitInteger, MVT::i32, 0, |
| 3431 | /* 13786*/ OPC_EmitInteger, MVT::i32, 0, |
| 3432 | /* 13789*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3433 | /* 13801*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3434 | /* 13804*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3435 | MVT::i32, 2/*#Ops*/, 0, 18, // Results = #19 |
| 3436 | /* 13812*/ OPC_EmitInteger, MVT::i32, 0, |
| 3437 | /* 13815*/ OPC_EmitInteger, MVT::i32, 0, |
| 3438 | /* 13818*/ OPC_EmitInteger, MVT::i32, 0, |
| 3439 | /* 13821*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3440 | /* 13833*/ OPC_EmitInteger, MVT::i32, 1, |
| 3441 | /* 13836*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3442 | /* 13839*/ OPC_EmitInteger, MVT::i32, 0, |
| 3443 | /* 13842*/ OPC_EmitInteger, MVT::i32, 0, |
| 3444 | /* 13845*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3445 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 3446 | /* 13871*/ OPC_EmitInteger, MVT::i32, 0, |
| 3447 | /* 13874*/ OPC_EmitInteger, MVT::i32, 0, |
| 3448 | /* 13877*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3449 | /* 13889*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3450 | /* 13892*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3451 | MVT::i32, 2/*#Ops*/, 2, 32, // Results = #33 |
| 3452 | /* 13900*/ OPC_EmitInteger, MVT::i32, 0, |
| 3453 | /* 13903*/ OPC_EmitInteger, MVT::i32, 0, |
| 3454 | /* 13906*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3455 | /* 13918*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3456 | /* 13921*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3457 | MVT::i32, 2/*#Ops*/, 0, 37, // Results = #38 |
| 3458 | /* 13929*/ OPC_EmitInteger, MVT::i32, 0, |
| 3459 | /* 13932*/ OPC_EmitInteger, MVT::i32, 0, |
| 3460 | /* 13935*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3461 | /* 13947*/ OPC_EmitInteger, MVT::i32, 1, |
| 3462 | /* 13950*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3463 | /* 13953*/ OPC_EmitInteger, MVT::i32, 0, |
| 3464 | /* 13956*/ OPC_EmitInteger, MVT::i32, 0, |
| 3465 | /* 13959*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3466 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 3467 | /* 13983*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3468 | /* 13986*/ OPC_EmitInteger, MVT::i32, 0, |
| 3469 | /* 13989*/ OPC_EmitInteger, MVT::i32, 0, |
| 3470 | /* 13992*/ OPC_EmitInteger, MVT::i32, 0, |
| 3471 | /* 13995*/ OPC_EmitInteger, MVT::i32, 0, |
| 3472 | /* 13998*/ OPC_EmitInteger, MVT::i32, 1, |
| 3473 | /* 14001*/ OPC_EmitInteger, MVT::i32, 0, |
| 3474 | /* 14004*/ OPC_EmitInteger, MVT::i32, 0, |
| 3475 | /* 14007*/ OPC_EmitInteger, MVT::i32, 0, |
| 3476 | /* 14010*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3477 | /* 14013*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3478 | MVT::i32, 2/*#Ops*/, 1, 56, // Results = #57 |
| 3479 | /* 14021*/ OPC_EmitInteger, MVT::i32, 0, |
| 3480 | /* 14024*/ OPC_EmitInteger, MVT::i32, 0, |
| 3481 | /* 14027*/ OPC_EmitInteger, MVT::i32, 0, |
| 3482 | /* 14030*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3483 | /* 14042*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3484 | /* 14045*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3485 | MVT::i32, 2/*#Ops*/, 0, 62, // Results = #63 |
| 3486 | /* 14053*/ OPC_EmitInteger, MVT::i32, 0, |
| 3487 | /* 14056*/ OPC_EmitInteger, MVT::i32, 0, |
| 3488 | /* 14059*/ OPC_EmitInteger, MVT::i32, 0, |
| 3489 | /* 14062*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3490 | /* 14074*/ OPC_EmitInteger, MVT::i32, 1, |
| 3491 | /* 14077*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3492 | /* 14080*/ OPC_EmitInteger, MVT::i32, 0, |
| 3493 | /* 14083*/ OPC_EmitInteger, MVT::i32, 0, |
| 3494 | /* 14086*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3495 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 3496 | /* 14112*/ OPC_EmitInteger, MVT::i32, 0, |
| 3497 | /* 14115*/ OPC_EmitInteger, MVT::i32, 0, |
| 3498 | /* 14118*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3499 | /* 14130*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3500 | /* 14133*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3501 | MVT::i32, 2/*#Ops*/, 2, 76, // Results = #77 |
| 3502 | /* 14141*/ OPC_EmitInteger, MVT::i32, 0, |
| 3503 | /* 14144*/ OPC_EmitInteger, MVT::i32, 0, |
| 3504 | /* 14147*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3505 | /* 14159*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3506 | /* 14162*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3507 | MVT::i32, 2/*#Ops*/, 0, 81, // Results = #82 |
| 3508 | /* 14170*/ OPC_EmitInteger, MVT::i32, 0, |
| 3509 | /* 14173*/ OPC_EmitInteger, MVT::i32, 0, |
| 3510 | /* 14176*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3511 | /* 14188*/ OPC_EmitInteger, MVT::i32, 1, |
| 3512 | /* 14191*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3513 | /* 14194*/ OPC_EmitInteger, MVT::i32, 0, |
| 3514 | /* 14197*/ OPC_EmitInteger, MVT::i32, 0, |
| 3515 | /* 14200*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3516 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 3517 | /* 14224*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3518 | /* 14227*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 3519 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 3520 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$y, (or:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z)), (and:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x)) - Complexity = 12 |
| 3521 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 3522 | /* 14238*/ /*Scope*/ 82|128,3/*466*/, /*->14706*/ |
| 3523 | /* 14240*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3524 | MVT::i32, 2/*#Ops*/, 2, 12, // Results = #13 |
| 3525 | /* 14248*/ OPC_EmitInteger, MVT::i32, 0, |
| 3526 | /* 14251*/ OPC_EmitInteger, MVT::i32, 0, |
| 3527 | /* 14254*/ OPC_EmitInteger, MVT::i32, 0, |
| 3528 | /* 14257*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3529 | /* 14269*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3530 | /* 14272*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3531 | MVT::i32, 2/*#Ops*/, 0, 18, // Results = #19 |
| 3532 | /* 14280*/ OPC_EmitInteger, MVT::i32, 0, |
| 3533 | /* 14283*/ OPC_EmitInteger, MVT::i32, 0, |
| 3534 | /* 14286*/ OPC_EmitInteger, MVT::i32, 0, |
| 3535 | /* 14289*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3536 | /* 14301*/ OPC_EmitInteger, MVT::i32, 1, |
| 3537 | /* 14304*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3538 | /* 14307*/ OPC_EmitInteger, MVT::i32, 0, |
| 3539 | /* 14310*/ OPC_EmitInteger, MVT::i32, 0, |
| 3540 | /* 14313*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3541 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 3542 | /* 14339*/ OPC_EmitInteger, MVT::i32, 0, |
| 3543 | /* 14342*/ OPC_EmitInteger, MVT::i32, 0, |
| 3544 | /* 14345*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3545 | /* 14357*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3546 | /* 14360*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3547 | MVT::i32, 2/*#Ops*/, 1, 32, // Results = #33 |
| 3548 | /* 14368*/ OPC_EmitInteger, MVT::i32, 0, |
| 3549 | /* 14371*/ OPC_EmitInteger, MVT::i32, 0, |
| 3550 | /* 14374*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3551 | /* 14386*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3552 | /* 14389*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3553 | MVT::i32, 2/*#Ops*/, 0, 37, // Results = #38 |
| 3554 | /* 14397*/ OPC_EmitInteger, MVT::i32, 0, |
| 3555 | /* 14400*/ OPC_EmitInteger, MVT::i32, 0, |
| 3556 | /* 14403*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3557 | /* 14415*/ OPC_EmitInteger, MVT::i32, 1, |
| 3558 | /* 14418*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3559 | /* 14421*/ OPC_EmitInteger, MVT::i32, 0, |
| 3560 | /* 14424*/ OPC_EmitInteger, MVT::i32, 0, |
| 3561 | /* 14427*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3562 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 3563 | /* 14451*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3564 | /* 14454*/ OPC_EmitInteger, MVT::i32, 0, |
| 3565 | /* 14457*/ OPC_EmitInteger, MVT::i32, 0, |
| 3566 | /* 14460*/ OPC_EmitInteger, MVT::i32, 0, |
| 3567 | /* 14463*/ OPC_EmitInteger, MVT::i32, 0, |
| 3568 | /* 14466*/ OPC_EmitInteger, MVT::i32, 1, |
| 3569 | /* 14469*/ OPC_EmitInteger, MVT::i32, 0, |
| 3570 | /* 14472*/ OPC_EmitInteger, MVT::i32, 0, |
| 3571 | /* 14475*/ OPC_EmitInteger, MVT::i32, 0, |
| 3572 | /* 14478*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3573 | /* 14481*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3574 | MVT::i32, 2/*#Ops*/, 2, 56, // Results = #57 |
| 3575 | /* 14489*/ OPC_EmitInteger, MVT::i32, 0, |
| 3576 | /* 14492*/ OPC_EmitInteger, MVT::i32, 0, |
| 3577 | /* 14495*/ OPC_EmitInteger, MVT::i32, 0, |
| 3578 | /* 14498*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3579 | /* 14510*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3580 | /* 14513*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3581 | MVT::i32, 2/*#Ops*/, 0, 62, // Results = #63 |
| 3582 | /* 14521*/ OPC_EmitInteger, MVT::i32, 0, |
| 3583 | /* 14524*/ OPC_EmitInteger, MVT::i32, 0, |
| 3584 | /* 14527*/ OPC_EmitInteger, MVT::i32, 0, |
| 3585 | /* 14530*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3586 | /* 14542*/ OPC_EmitInteger, MVT::i32, 1, |
| 3587 | /* 14545*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3588 | /* 14548*/ OPC_EmitInteger, MVT::i32, 0, |
| 3589 | /* 14551*/ OPC_EmitInteger, MVT::i32, 0, |
| 3590 | /* 14554*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3591 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 3592 | /* 14580*/ OPC_EmitInteger, MVT::i32, 0, |
| 3593 | /* 14583*/ OPC_EmitInteger, MVT::i32, 0, |
| 3594 | /* 14586*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3595 | /* 14598*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3596 | /* 14601*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3597 | MVT::i32, 2/*#Ops*/, 1, 76, // Results = #77 |
| 3598 | /* 14609*/ OPC_EmitInteger, MVT::i32, 0, |
| 3599 | /* 14612*/ OPC_EmitInteger, MVT::i32, 0, |
| 3600 | /* 14615*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3601 | /* 14627*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3602 | /* 14630*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3603 | MVT::i32, 2/*#Ops*/, 0, 81, // Results = #82 |
| 3604 | /* 14638*/ OPC_EmitInteger, MVT::i32, 0, |
| 3605 | /* 14641*/ OPC_EmitInteger, MVT::i32, 0, |
| 3606 | /* 14644*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3607 | /* 14656*/ OPC_EmitInteger, MVT::i32, 1, |
| 3608 | /* 14659*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3609 | /* 14662*/ OPC_EmitInteger, MVT::i32, 0, |
| 3610 | /* 14665*/ OPC_EmitInteger, MVT::i32, 0, |
| 3611 | /* 14668*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3612 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 3613 | /* 14692*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3614 | /* 14695*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 3615 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 3616 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$y, (or:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x)), (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z)) - Complexity = 12 |
| 3617 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 3618 | /* 14706*/ 0, /*End of Scope*/ |
| 3619 | /* 14707*/ /*Scope*/ 121|128,3/*505*/, /*->15214*/ |
| 3620 | /* 14709*/ OPC_CheckChild0Same, 1, |
| 3621 | /* 14711*/ OPC_CheckChild1Same, 2, |
| 3622 | /* 14713*/ OPC_MoveParent, |
| 3623 | /* 14714*/ OPC_CheckType, MVT::i64, |
| 3624 | /* 14716*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 3625 | /* 14718*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 3626 | /* 14721*/ OPC_EmitInteger, MVT::i32, 0, |
| 3627 | /* 14724*/ OPC_EmitInteger, MVT::i32, 0, |
| 3628 | /* 14727*/ OPC_EmitInteger, MVT::i32, 0, |
| 3629 | /* 14730*/ OPC_EmitInteger, MVT::i32, 0, |
| 3630 | /* 14733*/ OPC_EmitInteger, MVT::i32, 1, |
| 3631 | /* 14736*/ OPC_EmitInteger, MVT::i32, 0, |
| 3632 | /* 14739*/ OPC_EmitInteger, MVT::i32, 0, |
| 3633 | /* 14742*/ OPC_EmitInteger, MVT::i32, 0, |
| 3634 | /* 14745*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3635 | /* 14748*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3636 | MVT::i32, 2/*#Ops*/, 2, 12, // Results = #13 |
| 3637 | /* 14756*/ OPC_EmitInteger, MVT::i32, 0, |
| 3638 | /* 14759*/ OPC_EmitInteger, MVT::i32, 0, |
| 3639 | /* 14762*/ OPC_EmitInteger, MVT::i32, 0, |
| 3640 | /* 14765*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3641 | /* 14777*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3642 | /* 14780*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3643 | MVT::i32, 2/*#Ops*/, 0, 18, // Results = #19 |
| 3644 | /* 14788*/ OPC_EmitInteger, MVT::i32, 0, |
| 3645 | /* 14791*/ OPC_EmitInteger, MVT::i32, 0, |
| 3646 | /* 14794*/ OPC_EmitInteger, MVT::i32, 0, |
| 3647 | /* 14797*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3648 | /* 14809*/ OPC_EmitInteger, MVT::i32, 1, |
| 3649 | /* 14812*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3650 | /* 14815*/ OPC_EmitInteger, MVT::i32, 0, |
| 3651 | /* 14818*/ OPC_EmitInteger, MVT::i32, 0, |
| 3652 | /* 14821*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3653 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 3654 | /* 14847*/ OPC_EmitInteger, MVT::i32, 0, |
| 3655 | /* 14850*/ OPC_EmitInteger, MVT::i32, 0, |
| 3656 | /* 14853*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3657 | /* 14865*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3658 | /* 14868*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3659 | MVT::i32, 2/*#Ops*/, 1, 32, // Results = #33 |
| 3660 | /* 14876*/ OPC_EmitInteger, MVT::i32, 0, |
| 3661 | /* 14879*/ OPC_EmitInteger, MVT::i32, 0, |
| 3662 | /* 14882*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3663 | /* 14894*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3664 | /* 14897*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3665 | MVT::i32, 2/*#Ops*/, 0, 37, // Results = #38 |
| 3666 | /* 14905*/ OPC_EmitInteger, MVT::i32, 0, |
| 3667 | /* 14908*/ OPC_EmitInteger, MVT::i32, 0, |
| 3668 | /* 14911*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3669 | /* 14923*/ OPC_EmitInteger, MVT::i32, 1, |
| 3670 | /* 14926*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3671 | /* 14929*/ OPC_EmitInteger, MVT::i32, 0, |
| 3672 | /* 14932*/ OPC_EmitInteger, MVT::i32, 0, |
| 3673 | /* 14935*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3674 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 3675 | /* 14959*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3676 | /* 14962*/ OPC_EmitInteger, MVT::i32, 0, |
| 3677 | /* 14965*/ OPC_EmitInteger, MVT::i32, 0, |
| 3678 | /* 14968*/ OPC_EmitInteger, MVT::i32, 0, |
| 3679 | /* 14971*/ OPC_EmitInteger, MVT::i32, 0, |
| 3680 | /* 14974*/ OPC_EmitInteger, MVT::i32, 1, |
| 3681 | /* 14977*/ OPC_EmitInteger, MVT::i32, 0, |
| 3682 | /* 14980*/ OPC_EmitInteger, MVT::i32, 0, |
| 3683 | /* 14983*/ OPC_EmitInteger, MVT::i32, 0, |
| 3684 | /* 14986*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3685 | /* 14989*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3686 | MVT::i32, 2/*#Ops*/, 2, 56, // Results = #57 |
| 3687 | /* 14997*/ OPC_EmitInteger, MVT::i32, 0, |
| 3688 | /* 15000*/ OPC_EmitInteger, MVT::i32, 0, |
| 3689 | /* 15003*/ OPC_EmitInteger, MVT::i32, 0, |
| 3690 | /* 15006*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3691 | /* 15018*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3692 | /* 15021*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3693 | MVT::i32, 2/*#Ops*/, 0, 62, // Results = #63 |
| 3694 | /* 15029*/ OPC_EmitInteger, MVT::i32, 0, |
| 3695 | /* 15032*/ OPC_EmitInteger, MVT::i32, 0, |
| 3696 | /* 15035*/ OPC_EmitInteger, MVT::i32, 0, |
| 3697 | /* 15038*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3698 | /* 15050*/ OPC_EmitInteger, MVT::i32, 1, |
| 3699 | /* 15053*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3700 | /* 15056*/ OPC_EmitInteger, MVT::i32, 0, |
| 3701 | /* 15059*/ OPC_EmitInteger, MVT::i32, 0, |
| 3702 | /* 15062*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3703 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 3704 | /* 15088*/ OPC_EmitInteger, MVT::i32, 0, |
| 3705 | /* 15091*/ OPC_EmitInteger, MVT::i32, 0, |
| 3706 | /* 15094*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3707 | /* 15106*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3708 | /* 15109*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3709 | MVT::i32, 2/*#Ops*/, 1, 76, // Results = #77 |
| 3710 | /* 15117*/ OPC_EmitInteger, MVT::i32, 0, |
| 3711 | /* 15120*/ OPC_EmitInteger, MVT::i32, 0, |
| 3712 | /* 15123*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3713 | /* 15135*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3714 | /* 15138*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3715 | MVT::i32, 2/*#Ops*/, 0, 81, // Results = #82 |
| 3716 | /* 15146*/ OPC_EmitInteger, MVT::i32, 0, |
| 3717 | /* 15149*/ OPC_EmitInteger, MVT::i32, 0, |
| 3718 | /* 15152*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3719 | /* 15164*/ OPC_EmitInteger, MVT::i32, 1, |
| 3720 | /* 15167*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3721 | /* 15170*/ OPC_EmitInteger, MVT::i32, 0, |
| 3722 | /* 15173*/ OPC_EmitInteger, MVT::i32, 0, |
| 3723 | /* 15176*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3724 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 3725 | /* 15200*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3726 | /* 15203*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 3727 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 3728 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$y, (or:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x)), (and:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x)) - Complexity = 12 |
| 3729 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 3730 | /* 15214*/ 0, /*End of Scope*/ |
| 3731 | /* 15215*/ 0, /*End of Scope*/ |
| 3732 | /* 15216*/ /*Scope*/ 88|128,15/*2008*/, /*->17226*/ |
| 3733 | /* 15218*/ OPC_MoveChild0, |
| 3734 | /* 15219*/ OPC_CheckOpcode, TARGET_VAL(ISD::OR), |
| 3735 | /* 15222*/ OPC_RecordChild0, // #0 = $x |
| 3736 | /* 15223*/ OPC_RecordChild1, // #1 = $z |
| 3737 | /* 15224*/ OPC_MoveParent, |
| 3738 | /* 15225*/ OPC_RecordChild1, // #2 = $y |
| 3739 | /* 15226*/ OPC_MoveParent, |
| 3740 | /* 15227*/ OPC_MoveChild1, |
| 3741 | /* 15228*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 3742 | /* 15231*/ OPC_Scope, 121|128,3/*505*/, /*->15739*/ // 3 children in Scope |
| 3743 | /* 15234*/ OPC_CheckChild0Same, 0, |
| 3744 | /* 15236*/ OPC_CheckChild1Same, 1, |
| 3745 | /* 15238*/ OPC_MoveParent, |
| 3746 | /* 15239*/ OPC_CheckType, MVT::i64, |
| 3747 | /* 15241*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 3748 | /* 15243*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 3749 | /* 15246*/ OPC_EmitInteger, MVT::i32, 0, |
| 3750 | /* 15249*/ OPC_EmitInteger, MVT::i32, 0, |
| 3751 | /* 15252*/ OPC_EmitInteger, MVT::i32, 0, |
| 3752 | /* 15255*/ OPC_EmitInteger, MVT::i32, 0, |
| 3753 | /* 15258*/ OPC_EmitInteger, MVT::i32, 1, |
| 3754 | /* 15261*/ OPC_EmitInteger, MVT::i32, 0, |
| 3755 | /* 15264*/ OPC_EmitInteger, MVT::i32, 0, |
| 3756 | /* 15267*/ OPC_EmitInteger, MVT::i32, 0, |
| 3757 | /* 15270*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3758 | /* 15273*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3759 | MVT::i32, 2/*#Ops*/, 0, 12, // Results = #13 |
| 3760 | /* 15281*/ OPC_EmitInteger, MVT::i32, 0, |
| 3761 | /* 15284*/ OPC_EmitInteger, MVT::i32, 0, |
| 3762 | /* 15287*/ OPC_EmitInteger, MVT::i32, 0, |
| 3763 | /* 15290*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3764 | /* 15302*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3765 | /* 15305*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3766 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 3767 | /* 15313*/ OPC_EmitInteger, MVT::i32, 0, |
| 3768 | /* 15316*/ OPC_EmitInteger, MVT::i32, 0, |
| 3769 | /* 15319*/ OPC_EmitInteger, MVT::i32, 0, |
| 3770 | /* 15322*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3771 | /* 15334*/ OPC_EmitInteger, MVT::i32, 1, |
| 3772 | /* 15337*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3773 | /* 15340*/ OPC_EmitInteger, MVT::i32, 0, |
| 3774 | /* 15343*/ OPC_EmitInteger, MVT::i32, 0, |
| 3775 | /* 15346*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3776 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 3777 | /* 15372*/ OPC_EmitInteger, MVT::i32, 0, |
| 3778 | /* 15375*/ OPC_EmitInteger, MVT::i32, 0, |
| 3779 | /* 15378*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3780 | /* 15390*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3781 | /* 15393*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3782 | MVT::i32, 2/*#Ops*/, 1, 32, // Results = #33 |
| 3783 | /* 15401*/ OPC_EmitInteger, MVT::i32, 0, |
| 3784 | /* 15404*/ OPC_EmitInteger, MVT::i32, 0, |
| 3785 | /* 15407*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3786 | /* 15419*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3787 | /* 15422*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3788 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 3789 | /* 15430*/ OPC_EmitInteger, MVT::i32, 0, |
| 3790 | /* 15433*/ OPC_EmitInteger, MVT::i32, 0, |
| 3791 | /* 15436*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3792 | /* 15448*/ OPC_EmitInteger, MVT::i32, 1, |
| 3793 | /* 15451*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3794 | /* 15454*/ OPC_EmitInteger, MVT::i32, 0, |
| 3795 | /* 15457*/ OPC_EmitInteger, MVT::i32, 0, |
| 3796 | /* 15460*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3797 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 3798 | /* 15484*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3799 | /* 15487*/ OPC_EmitInteger, MVT::i32, 0, |
| 3800 | /* 15490*/ OPC_EmitInteger, MVT::i32, 0, |
| 3801 | /* 15493*/ OPC_EmitInteger, MVT::i32, 0, |
| 3802 | /* 15496*/ OPC_EmitInteger, MVT::i32, 0, |
| 3803 | /* 15499*/ OPC_EmitInteger, MVT::i32, 1, |
| 3804 | /* 15502*/ OPC_EmitInteger, MVT::i32, 0, |
| 3805 | /* 15505*/ OPC_EmitInteger, MVT::i32, 0, |
| 3806 | /* 15508*/ OPC_EmitInteger, MVT::i32, 0, |
| 3807 | /* 15511*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3808 | /* 15514*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3809 | MVT::i32, 2/*#Ops*/, 0, 56, // Results = #57 |
| 3810 | /* 15522*/ OPC_EmitInteger, MVT::i32, 0, |
| 3811 | /* 15525*/ OPC_EmitInteger, MVT::i32, 0, |
| 3812 | /* 15528*/ OPC_EmitInteger, MVT::i32, 0, |
| 3813 | /* 15531*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3814 | /* 15543*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3815 | /* 15546*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3816 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 3817 | /* 15554*/ OPC_EmitInteger, MVT::i32, 0, |
| 3818 | /* 15557*/ OPC_EmitInteger, MVT::i32, 0, |
| 3819 | /* 15560*/ OPC_EmitInteger, MVT::i32, 0, |
| 3820 | /* 15563*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3821 | /* 15575*/ OPC_EmitInteger, MVT::i32, 1, |
| 3822 | /* 15578*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3823 | /* 15581*/ OPC_EmitInteger, MVT::i32, 0, |
| 3824 | /* 15584*/ OPC_EmitInteger, MVT::i32, 0, |
| 3825 | /* 15587*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3826 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 3827 | /* 15613*/ OPC_EmitInteger, MVT::i32, 0, |
| 3828 | /* 15616*/ OPC_EmitInteger, MVT::i32, 0, |
| 3829 | /* 15619*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3830 | /* 15631*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3831 | /* 15634*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3832 | MVT::i32, 2/*#Ops*/, 1, 76, // Results = #77 |
| 3833 | /* 15642*/ OPC_EmitInteger, MVT::i32, 0, |
| 3834 | /* 15645*/ OPC_EmitInteger, MVT::i32, 0, |
| 3835 | /* 15648*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3836 | /* 15660*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3837 | /* 15663*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3838 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 3839 | /* 15671*/ OPC_EmitInteger, MVT::i32, 0, |
| 3840 | /* 15674*/ OPC_EmitInteger, MVT::i32, 0, |
| 3841 | /* 15677*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3842 | /* 15689*/ OPC_EmitInteger, MVT::i32, 1, |
| 3843 | /* 15692*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3844 | /* 15695*/ OPC_EmitInteger, MVT::i32, 0, |
| 3845 | /* 15698*/ OPC_EmitInteger, MVT::i32, 0, |
| 3846 | /* 15701*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3847 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 3848 | /* 15725*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3849 | /* 15728*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 3850 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 3851 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } (or:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z), i64:{ *:[i64] }:$y), (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z)) - Complexity = 12 |
| 3852 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 3853 | /* 15739*/ /*Scope*/ 81|128,7/*977*/, /*->16718*/ |
| 3854 | /* 15741*/ OPC_CheckChild0Same, 1, |
| 3855 | /* 15743*/ OPC_CheckChild1Same, 0, |
| 3856 | /* 15745*/ OPC_MoveParent, |
| 3857 | /* 15746*/ OPC_CheckType, MVT::i64, |
| 3858 | /* 15748*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 3859 | /* 15750*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 3860 | /* 15753*/ OPC_EmitInteger, MVT::i32, 0, |
| 3861 | /* 15756*/ OPC_EmitInteger, MVT::i32, 0, |
| 3862 | /* 15759*/ OPC_EmitInteger, MVT::i32, 0, |
| 3863 | /* 15762*/ OPC_EmitInteger, MVT::i32, 0, |
| 3864 | /* 15765*/ OPC_EmitInteger, MVT::i32, 1, |
| 3865 | /* 15768*/ OPC_EmitInteger, MVT::i32, 0, |
| 3866 | /* 15771*/ OPC_EmitInteger, MVT::i32, 0, |
| 3867 | /* 15774*/ OPC_EmitInteger, MVT::i32, 0, |
| 3868 | /* 15777*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3869 | /* 15780*/ OPC_Scope, 82|128,3/*466*/, /*->16249*/ // 2 children in Scope |
| 3870 | /* 15783*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3871 | MVT::i32, 2/*#Ops*/, 0, 12, // Results = #13 |
| 3872 | /* 15791*/ OPC_EmitInteger, MVT::i32, 0, |
| 3873 | /* 15794*/ OPC_EmitInteger, MVT::i32, 0, |
| 3874 | /* 15797*/ OPC_EmitInteger, MVT::i32, 0, |
| 3875 | /* 15800*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3876 | /* 15812*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3877 | /* 15815*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3878 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 3879 | /* 15823*/ OPC_EmitInteger, MVT::i32, 0, |
| 3880 | /* 15826*/ OPC_EmitInteger, MVT::i32, 0, |
| 3881 | /* 15829*/ OPC_EmitInteger, MVT::i32, 0, |
| 3882 | /* 15832*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3883 | /* 15844*/ OPC_EmitInteger, MVT::i32, 1, |
| 3884 | /* 15847*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3885 | /* 15850*/ OPC_EmitInteger, MVT::i32, 0, |
| 3886 | /* 15853*/ OPC_EmitInteger, MVT::i32, 0, |
| 3887 | /* 15856*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3888 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 3889 | /* 15882*/ OPC_EmitInteger, MVT::i32, 0, |
| 3890 | /* 15885*/ OPC_EmitInteger, MVT::i32, 0, |
| 3891 | /* 15888*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3892 | /* 15900*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3893 | /* 15903*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3894 | MVT::i32, 2/*#Ops*/, 1, 32, // Results = #33 |
| 3895 | /* 15911*/ OPC_EmitInteger, MVT::i32, 0, |
| 3896 | /* 15914*/ OPC_EmitInteger, MVT::i32, 0, |
| 3897 | /* 15917*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3898 | /* 15929*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3899 | /* 15932*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3900 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 3901 | /* 15940*/ OPC_EmitInteger, MVT::i32, 0, |
| 3902 | /* 15943*/ OPC_EmitInteger, MVT::i32, 0, |
| 3903 | /* 15946*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3904 | /* 15958*/ OPC_EmitInteger, MVT::i32, 1, |
| 3905 | /* 15961*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3906 | /* 15964*/ OPC_EmitInteger, MVT::i32, 0, |
| 3907 | /* 15967*/ OPC_EmitInteger, MVT::i32, 0, |
| 3908 | /* 15970*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3909 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 3910 | /* 15994*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3911 | /* 15997*/ OPC_EmitInteger, MVT::i32, 0, |
| 3912 | /* 16000*/ OPC_EmitInteger, MVT::i32, 0, |
| 3913 | /* 16003*/ OPC_EmitInteger, MVT::i32, 0, |
| 3914 | /* 16006*/ OPC_EmitInteger, MVT::i32, 0, |
| 3915 | /* 16009*/ OPC_EmitInteger, MVT::i32, 1, |
| 3916 | /* 16012*/ OPC_EmitInteger, MVT::i32, 0, |
| 3917 | /* 16015*/ OPC_EmitInteger, MVT::i32, 0, |
| 3918 | /* 16018*/ OPC_EmitInteger, MVT::i32, 0, |
| 3919 | /* 16021*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3920 | /* 16024*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3921 | MVT::i32, 2/*#Ops*/, 0, 56, // Results = #57 |
| 3922 | /* 16032*/ OPC_EmitInteger, MVT::i32, 0, |
| 3923 | /* 16035*/ OPC_EmitInteger, MVT::i32, 0, |
| 3924 | /* 16038*/ OPC_EmitInteger, MVT::i32, 0, |
| 3925 | /* 16041*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3926 | /* 16053*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3927 | /* 16056*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3928 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 3929 | /* 16064*/ OPC_EmitInteger, MVT::i32, 0, |
| 3930 | /* 16067*/ OPC_EmitInteger, MVT::i32, 0, |
| 3931 | /* 16070*/ OPC_EmitInteger, MVT::i32, 0, |
| 3932 | /* 16073*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3933 | /* 16085*/ OPC_EmitInteger, MVT::i32, 1, |
| 3934 | /* 16088*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3935 | /* 16091*/ OPC_EmitInteger, MVT::i32, 0, |
| 3936 | /* 16094*/ OPC_EmitInteger, MVT::i32, 0, |
| 3937 | /* 16097*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3938 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 3939 | /* 16123*/ OPC_EmitInteger, MVT::i32, 0, |
| 3940 | /* 16126*/ OPC_EmitInteger, MVT::i32, 0, |
| 3941 | /* 16129*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3942 | /* 16141*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3943 | /* 16144*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3944 | MVT::i32, 2/*#Ops*/, 1, 76, // Results = #77 |
| 3945 | /* 16152*/ OPC_EmitInteger, MVT::i32, 0, |
| 3946 | /* 16155*/ OPC_EmitInteger, MVT::i32, 0, |
| 3947 | /* 16158*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3948 | /* 16170*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3949 | /* 16173*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3950 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 3951 | /* 16181*/ OPC_EmitInteger, MVT::i32, 0, |
| 3952 | /* 16184*/ OPC_EmitInteger, MVT::i32, 0, |
| 3953 | /* 16187*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3954 | /* 16199*/ OPC_EmitInteger, MVT::i32, 1, |
| 3955 | /* 16202*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3956 | /* 16205*/ OPC_EmitInteger, MVT::i32, 0, |
| 3957 | /* 16208*/ OPC_EmitInteger, MVT::i32, 0, |
| 3958 | /* 16211*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 3959 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 3960 | /* 16235*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 3961 | /* 16238*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 3962 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 3963 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } (or:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z), i64:{ *:[i64] }:$y), (and:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x)) - Complexity = 12 |
| 3964 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 3965 | /* 16249*/ /*Scope*/ 82|128,3/*466*/, /*->16717*/ |
| 3966 | /* 16251*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3967 | MVT::i32, 2/*#Ops*/, 1, 12, // Results = #13 |
| 3968 | /* 16259*/ OPC_EmitInteger, MVT::i32, 0, |
| 3969 | /* 16262*/ OPC_EmitInteger, MVT::i32, 0, |
| 3970 | /* 16265*/ OPC_EmitInteger, MVT::i32, 0, |
| 3971 | /* 16268*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3972 | /* 16280*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3973 | /* 16283*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3974 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 3975 | /* 16291*/ OPC_EmitInteger, MVT::i32, 0, |
| 3976 | /* 16294*/ OPC_EmitInteger, MVT::i32, 0, |
| 3977 | /* 16297*/ OPC_EmitInteger, MVT::i32, 0, |
| 3978 | /* 16300*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3979 | /* 16312*/ OPC_EmitInteger, MVT::i32, 1, |
| 3980 | /* 16315*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 3981 | /* 16318*/ OPC_EmitInteger, MVT::i32, 0, |
| 3982 | /* 16321*/ OPC_EmitInteger, MVT::i32, 0, |
| 3983 | /* 16324*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 3984 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 3985 | /* 16350*/ OPC_EmitInteger, MVT::i32, 0, |
| 3986 | /* 16353*/ OPC_EmitInteger, MVT::i32, 0, |
| 3987 | /* 16356*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3988 | /* 16368*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3989 | /* 16371*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3990 | MVT::i32, 2/*#Ops*/, 0, 32, // Results = #33 |
| 3991 | /* 16379*/ OPC_EmitInteger, MVT::i32, 0, |
| 3992 | /* 16382*/ OPC_EmitInteger, MVT::i32, 0, |
| 3993 | /* 16385*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 3994 | /* 16397*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 3995 | /* 16400*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 3996 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 3997 | /* 16408*/ OPC_EmitInteger, MVT::i32, 0, |
| 3998 | /* 16411*/ OPC_EmitInteger, MVT::i32, 0, |
| 3999 | /* 16414*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4000 | /* 16426*/ OPC_EmitInteger, MVT::i32, 1, |
| 4001 | /* 16429*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4002 | /* 16432*/ OPC_EmitInteger, MVT::i32, 0, |
| 4003 | /* 16435*/ OPC_EmitInteger, MVT::i32, 0, |
| 4004 | /* 16438*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 4005 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 4006 | /* 16462*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 4007 | /* 16465*/ OPC_EmitInteger, MVT::i32, 0, |
| 4008 | /* 16468*/ OPC_EmitInteger, MVT::i32, 0, |
| 4009 | /* 16471*/ OPC_EmitInteger, MVT::i32, 0, |
| 4010 | /* 16474*/ OPC_EmitInteger, MVT::i32, 0, |
| 4011 | /* 16477*/ OPC_EmitInteger, MVT::i32, 1, |
| 4012 | /* 16480*/ OPC_EmitInteger, MVT::i32, 0, |
| 4013 | /* 16483*/ OPC_EmitInteger, MVT::i32, 0, |
| 4014 | /* 16486*/ OPC_EmitInteger, MVT::i32, 0, |
| 4015 | /* 16489*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 4016 | /* 16492*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4017 | MVT::i32, 2/*#Ops*/, 1, 56, // Results = #57 |
| 4018 | /* 16500*/ OPC_EmitInteger, MVT::i32, 0, |
| 4019 | /* 16503*/ OPC_EmitInteger, MVT::i32, 0, |
| 4020 | /* 16506*/ OPC_EmitInteger, MVT::i32, 0, |
| 4021 | /* 16509*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4022 | /* 16521*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 4023 | /* 16524*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4024 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 4025 | /* 16532*/ OPC_EmitInteger, MVT::i32, 0, |
| 4026 | /* 16535*/ OPC_EmitInteger, MVT::i32, 0, |
| 4027 | /* 16538*/ OPC_EmitInteger, MVT::i32, 0, |
| 4028 | /* 16541*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4029 | /* 16553*/ OPC_EmitInteger, MVT::i32, 1, |
| 4030 | /* 16556*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4031 | /* 16559*/ OPC_EmitInteger, MVT::i32, 0, |
| 4032 | /* 16562*/ OPC_EmitInteger, MVT::i32, 0, |
| 4033 | /* 16565*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 4034 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 4035 | /* 16591*/ OPC_EmitInteger, MVT::i32, 0, |
| 4036 | /* 16594*/ OPC_EmitInteger, MVT::i32, 0, |
| 4037 | /* 16597*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4038 | /* 16609*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 4039 | /* 16612*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4040 | MVT::i32, 2/*#Ops*/, 0, 76, // Results = #77 |
| 4041 | /* 16620*/ OPC_EmitInteger, MVT::i32, 0, |
| 4042 | /* 16623*/ OPC_EmitInteger, MVT::i32, 0, |
| 4043 | /* 16626*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4044 | /* 16638*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 4045 | /* 16641*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4046 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 4047 | /* 16649*/ OPC_EmitInteger, MVT::i32, 0, |
| 4048 | /* 16652*/ OPC_EmitInteger, MVT::i32, 0, |
| 4049 | /* 16655*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4050 | /* 16667*/ OPC_EmitInteger, MVT::i32, 1, |
| 4051 | /* 16670*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4052 | /* 16673*/ OPC_EmitInteger, MVT::i32, 0, |
| 4053 | /* 16676*/ OPC_EmitInteger, MVT::i32, 0, |
| 4054 | /* 16679*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 4055 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 4056 | /* 16703*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 4057 | /* 16706*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 4058 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 4059 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } (or:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x), i64:{ *:[i64] }:$y), (and:{ *:[i64] } i64:{ *:[i64] }:$x, i64:{ *:[i64] }:$z)) - Complexity = 12 |
| 4060 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 4061 | /* 16717*/ 0, /*End of Scope*/ |
| 4062 | /* 16718*/ /*Scope*/ 121|128,3/*505*/, /*->17225*/ |
| 4063 | /* 16720*/ OPC_CheckChild0Same, 0, |
| 4064 | /* 16722*/ OPC_CheckChild1Same, 1, |
| 4065 | /* 16724*/ OPC_MoveParent, |
| 4066 | /* 16725*/ OPC_CheckType, MVT::i64, |
| 4067 | /* 16727*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4068 | /* 16729*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 4069 | /* 16732*/ OPC_EmitInteger, MVT::i32, 0, |
| 4070 | /* 16735*/ OPC_EmitInteger, MVT::i32, 0, |
| 4071 | /* 16738*/ OPC_EmitInteger, MVT::i32, 0, |
| 4072 | /* 16741*/ OPC_EmitInteger, MVT::i32, 0, |
| 4073 | /* 16744*/ OPC_EmitInteger, MVT::i32, 1, |
| 4074 | /* 16747*/ OPC_EmitInteger, MVT::i32, 0, |
| 4075 | /* 16750*/ OPC_EmitInteger, MVT::i32, 0, |
| 4076 | /* 16753*/ OPC_EmitInteger, MVT::i32, 0, |
| 4077 | /* 16756*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 4078 | /* 16759*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4079 | MVT::i32, 2/*#Ops*/, 1, 12, // Results = #13 |
| 4080 | /* 16767*/ OPC_EmitInteger, MVT::i32, 0, |
| 4081 | /* 16770*/ OPC_EmitInteger, MVT::i32, 0, |
| 4082 | /* 16773*/ OPC_EmitInteger, MVT::i32, 0, |
| 4083 | /* 16776*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4084 | /* 16788*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 4085 | /* 16791*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4086 | MVT::i32, 2/*#Ops*/, 2, 18, // Results = #19 |
| 4087 | /* 16799*/ OPC_EmitInteger, MVT::i32, 0, |
| 4088 | /* 16802*/ OPC_EmitInteger, MVT::i32, 0, |
| 4089 | /* 16805*/ OPC_EmitInteger, MVT::i32, 0, |
| 4090 | /* 16808*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4091 | /* 16820*/ OPC_EmitInteger, MVT::i32, 1, |
| 4092 | /* 16823*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4093 | /* 16826*/ OPC_EmitInteger, MVT::i32, 0, |
| 4094 | /* 16829*/ OPC_EmitInteger, MVT::i32, 0, |
| 4095 | /* 16832*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 4096 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 4097 | /* 16858*/ OPC_EmitInteger, MVT::i32, 0, |
| 4098 | /* 16861*/ OPC_EmitInteger, MVT::i32, 0, |
| 4099 | /* 16864*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4100 | /* 16876*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 4101 | /* 16879*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4102 | MVT::i32, 2/*#Ops*/, 0, 32, // Results = #33 |
| 4103 | /* 16887*/ OPC_EmitInteger, MVT::i32, 0, |
| 4104 | /* 16890*/ OPC_EmitInteger, MVT::i32, 0, |
| 4105 | /* 16893*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4106 | /* 16905*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 4107 | /* 16908*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4108 | MVT::i32, 2/*#Ops*/, 2, 37, // Results = #38 |
| 4109 | /* 16916*/ OPC_EmitInteger, MVT::i32, 0, |
| 4110 | /* 16919*/ OPC_EmitInteger, MVT::i32, 0, |
| 4111 | /* 16922*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4112 | /* 16934*/ OPC_EmitInteger, MVT::i32, 1, |
| 4113 | /* 16937*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4114 | /* 16940*/ OPC_EmitInteger, MVT::i32, 0, |
| 4115 | /* 16943*/ OPC_EmitInteger, MVT::i32, 0, |
| 4116 | /* 16946*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 4117 | MVT::i32, 18/*#Ops*/, 4, 5, 28, 29, 30, 31, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, // Results = #46 |
| 4118 | /* 16970*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 4119 | /* 16973*/ OPC_EmitInteger, MVT::i32, 0, |
| 4120 | /* 16976*/ OPC_EmitInteger, MVT::i32, 0, |
| 4121 | /* 16979*/ OPC_EmitInteger, MVT::i32, 0, |
| 4122 | /* 16982*/ OPC_EmitInteger, MVT::i32, 0, |
| 4123 | /* 16985*/ OPC_EmitInteger, MVT::i32, 1, |
| 4124 | /* 16988*/ OPC_EmitInteger, MVT::i32, 0, |
| 4125 | /* 16991*/ OPC_EmitInteger, MVT::i32, 0, |
| 4126 | /* 16994*/ OPC_EmitInteger, MVT::i32, 0, |
| 4127 | /* 16997*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 4128 | /* 17000*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4129 | MVT::i32, 2/*#Ops*/, 1, 56, // Results = #57 |
| 4130 | /* 17008*/ OPC_EmitInteger, MVT::i32, 0, |
| 4131 | /* 17011*/ OPC_EmitInteger, MVT::i32, 0, |
| 4132 | /* 17014*/ OPC_EmitInteger, MVT::i32, 0, |
| 4133 | /* 17017*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4134 | /* 17029*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 4135 | /* 17032*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4136 | MVT::i32, 2/*#Ops*/, 2, 62, // Results = #63 |
| 4137 | /* 17040*/ OPC_EmitInteger, MVT::i32, 0, |
| 4138 | /* 17043*/ OPC_EmitInteger, MVT::i32, 0, |
| 4139 | /* 17046*/ OPC_EmitInteger, MVT::i32, 0, |
| 4140 | /* 17049*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4141 | /* 17061*/ OPC_EmitInteger, MVT::i32, 1, |
| 4142 | /* 17064*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4143 | /* 17067*/ OPC_EmitInteger, MVT::i32, 0, |
| 4144 | /* 17070*/ OPC_EmitInteger, MVT::i32, 0, |
| 4145 | /* 17073*/ OPC_EmitNode1, TARGET_VAL(R600::XOR_INT), 0, |
| 4146 | MVT::i32, 20/*#Ops*/, 50, 51, 52, 53, 54, 55, 57, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, // Results = #72 |
| 4147 | /* 17099*/ OPC_EmitInteger, MVT::i32, 0, |
| 4148 | /* 17102*/ OPC_EmitInteger, MVT::i32, 0, |
| 4149 | /* 17105*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4150 | /* 17117*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 4151 | /* 17120*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4152 | MVT::i32, 2/*#Ops*/, 0, 76, // Results = #77 |
| 4153 | /* 17128*/ OPC_EmitInteger, MVT::i32, 0, |
| 4154 | /* 17131*/ OPC_EmitInteger, MVT::i32, 0, |
| 4155 | /* 17134*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4156 | /* 17146*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 4157 | /* 17149*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 4158 | MVT::i32, 2/*#Ops*/, 2, 81, // Results = #82 |
| 4159 | /* 17157*/ OPC_EmitInteger, MVT::i32, 0, |
| 4160 | /* 17160*/ OPC_EmitInteger, MVT::i32, 0, |
| 4161 | /* 17163*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4162 | /* 17175*/ OPC_EmitInteger, MVT::i32, 1, |
| 4163 | /* 17178*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4164 | /* 17181*/ OPC_EmitInteger, MVT::i32, 0, |
| 4165 | /* 17184*/ OPC_EmitInteger, MVT::i32, 0, |
| 4166 | /* 17187*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 4167 | MVT::i32, 18/*#Ops*/, 48, 49, 72, 73, 74, 75, 77, 78, 79, 80, 82, 83, 84, 85, 86, 87, 88, 89, // Results = #90 |
| 4168 | /* 17211*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 4169 | /* 17214*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 4170 | MVT::i64, 5/*#Ops*/, 3, 46, 47, 90, 91, |
| 4171 | // Src: (or:{ *:[i64] } (and:{ *:[i64] } (or:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x), i64:{ *:[i64] }:$y), (and:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$x)) - Complexity = 12 |
| 4172 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (XOR_INT:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 4173 | /* 17225*/ 0, /*End of Scope*/ |
| 4174 | /* 17226*/ 0, /*End of Scope*/ |
| 4175 | /* 17227*/ /*Scope*/ 104, /*->17332*/ |
| 4176 | /* 17228*/ OPC_RecordChild0, // #0 = $src0 |
| 4177 | /* 17229*/ OPC_RecordChild1, // #1 = $src1 |
| 4178 | /* 17230*/ OPC_CheckType, MVT::i32, |
| 4179 | /* 17232*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4180 | /* 17234*/ OPC_EmitInteger, MVT::i32, 0, |
| 4181 | /* 17237*/ OPC_EmitInteger, MVT::i32, 0, |
| 4182 | /* 17240*/ OPC_EmitInteger, MVT::i32, 1, |
| 4183 | /* 17243*/ OPC_EmitInteger, MVT::i32, 0, |
| 4184 | /* 17246*/ OPC_EmitInteger, MVT::i32, 0, |
| 4185 | /* 17249*/ OPC_EmitInteger, MVT::i32, 0, |
| 4186 | /* 17252*/ OPC_EmitInteger, MVT::i32, 0, |
| 4187 | /* 17255*/ OPC_EmitInteger, MVT::i32, 0, |
| 4188 | /* 17258*/ OPC_EmitInteger, MVT::i32, 0, |
| 4189 | /* 17261*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4190 | /* 17273*/ OPC_EmitInteger, MVT::i32, 0, |
| 4191 | /* 17276*/ OPC_EmitInteger, MVT::i32, 0, |
| 4192 | /* 17279*/ OPC_EmitInteger, MVT::i32, 0, |
| 4193 | /* 17282*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4194 | /* 17294*/ OPC_EmitInteger, MVT::i32, 1, |
| 4195 | /* 17297*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4196 | /* 17300*/ OPC_EmitInteger, MVT::i32, 0, |
| 4197 | /* 17303*/ OPC_EmitInteger, MVT::i32, 0, |
| 4198 | /* 17306*/ OPC_MorphNodeTo1, TARGET_VAL(R600::OR_INT), 0, |
| 4199 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4200 | // Src: (or:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 4201 | // Dst: (OR_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 4202 | /* 17332*/ 0, /*End of Scope*/ |
| 4203 | /* 17333*/ /*SwitchOpcode*/ 25, TARGET_VAL(AMDGPUISD::REGISTER_LOAD),// ->17361 |
| 4204 | /* 17336*/ OPC_RecordNode, // #0 = 'AMDGPUregister_load' chained node |
| 4205 | /* 17337*/ OPC_RecordChild1, // #1 = $addr |
| 4206 | /* 17338*/ OPC_RecordChild2, // #2 = $chan |
| 4207 | /* 17339*/ OPC_MoveChild2, |
| 4208 | /* 17340*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant), |
| 4209 | /* 17343*/ OPC_CheckType, MVT::i32, |
| 4210 | /* 17345*/ OPC_MoveParent, |
| 4211 | /* 17346*/ OPC_CheckType, MVT::i32, |
| 4212 | /* 17348*/ OPC_CheckComplexPat, /*CP*/0, /*#*/1, // SelectADDRIndirect:$addr #3 #4 |
| 4213 | /* 17351*/ OPC_EmitMergeInputChains1_0, |
| 4214 | /* 17352*/ OPC_MorphNodeTo1, TARGET_VAL(R600::R600_RegisterLoad), 0|OPFL_Chain, |
| 4215 | MVT::i32, 3/*#Ops*/, 3, 4, 2, |
| 4216 | // Src: (AMDGPUregister_load:{ *:[i32] } ADDRIndirect:{ *:[iPTR] }:$addr, (timm:{ *:[i32] }):$chan) - Complexity = 15 |
| 4217 | // Dst: (R600_RegisterLoad:{ *:[i32] } ADDRIndirect:{ *:[iPTR] }:$addr, (timm:{ *:[i32] }):$chan) |
| 4218 | /* 17361*/ /*SwitchOpcode*/ 26, TARGET_VAL(AMDGPUISD::REGISTER_STORE),// ->17390 |
| 4219 | /* 17364*/ OPC_RecordNode, // #0 = 'AMDGPUregister_store' chained node |
| 4220 | /* 17365*/ OPC_RecordChild1, // #1 = $val |
| 4221 | /* 17366*/ OPC_CheckChild1Type, MVT::i32, |
| 4222 | /* 17368*/ OPC_RecordChild2, // #2 = $addr |
| 4223 | /* 17369*/ OPC_RecordChild3, // #3 = $chan |
| 4224 | /* 17370*/ OPC_MoveChild3, |
| 4225 | /* 17371*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant), |
| 4226 | /* 17374*/ OPC_CheckType, MVT::i32, |
| 4227 | /* 17376*/ OPC_MoveParent, |
| 4228 | /* 17377*/ OPC_CheckComplexPat, /*CP*/0, /*#*/2, // SelectADDRIndirect:$addr #4 #5 |
| 4229 | /* 17380*/ OPC_EmitMergeInputChains1_0, |
| 4230 | /* 17381*/ OPC_MorphNodeTo0, TARGET_VAL(R600::R600_RegisterStore), 0|OPFL_Chain, |
| 4231 | 4/*#Ops*/, 1, 4, 5, 3, |
| 4232 | // Src: (AMDGPUregister_store i32:{ *:[i32] }:$val, ADDRIndirect:{ *:[iPTR] }:$addr, (timm:{ *:[i32] }):$chan) - Complexity = 15 |
| 4233 | // Dst: (R600_RegisterStore i32:{ *:[i32] }:$val, ADDRIndirect:{ *:[iPTR] }:$addr, (timm:{ *:[i32] }):$chan) |
| 4234 | /* 17390*/ /*SwitchOpcode*/ 45|128,35/*4525*/, TARGET_VAL(ISD::SELECT_CC),// ->21919 |
| 4235 | /* 17394*/ OPC_RecordChild0, // #0 = $src0 |
| 4236 | /* 17395*/ OPC_Scope, 60|128,23/*3004*/, /*->20402*/ // 2 children in Scope |
| 4237 | /* 17398*/ OPC_CheckChild0Type, MVT::f32, |
| 4238 | /* 17400*/ OPC_Scope, 72|128,13/*1736*/, /*->19139*/ // 2 children in Scope |
| 4239 | /* 17403*/ OPC_RecordChild1, // #1 = $src1 |
| 4240 | /* 17404*/ OPC_Scope, 96|128,6/*864*/, /*->18271*/ // 2 children in Scope |
| 4241 | /* 17407*/ OPC_CheckChild2Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4242 | /* 17418*/ OPC_CheckChild3Integer, 0, |
| 4243 | /* 17420*/ OPC_MoveChild4, |
| 4244 | /* 17421*/ OPC_Scope, 105, /*->17528*/ // 8 children in Scope |
| 4245 | /* 17423*/ OPC_CheckCondCode, ISD::SETOEQ, |
| 4246 | /* 17425*/ OPC_MoveParent, |
| 4247 | /* 17426*/ OPC_CheckType, MVT::i32, |
| 4248 | /* 17428*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4249 | /* 17430*/ OPC_EmitInteger, MVT::i32, 0, |
| 4250 | /* 17433*/ OPC_EmitInteger, MVT::i32, 0, |
| 4251 | /* 17436*/ OPC_EmitInteger, MVT::i32, 1, |
| 4252 | /* 17439*/ OPC_EmitInteger, MVT::i32, 0, |
| 4253 | /* 17442*/ OPC_EmitInteger, MVT::i32, 0, |
| 4254 | /* 17445*/ OPC_EmitInteger, MVT::i32, 0, |
| 4255 | /* 17448*/ OPC_EmitInteger, MVT::i32, 0, |
| 4256 | /* 17451*/ OPC_EmitInteger, MVT::i32, 0, |
| 4257 | /* 17454*/ OPC_EmitInteger, MVT::i32, 0, |
| 4258 | /* 17457*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4259 | /* 17469*/ OPC_EmitInteger, MVT::i32, 0, |
| 4260 | /* 17472*/ OPC_EmitInteger, MVT::i32, 0, |
| 4261 | /* 17475*/ OPC_EmitInteger, MVT::i32, 0, |
| 4262 | /* 17478*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4263 | /* 17490*/ OPC_EmitInteger, MVT::i32, 1, |
| 4264 | /* 17493*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4265 | /* 17496*/ OPC_EmitInteger, MVT::i32, 0, |
| 4266 | /* 17499*/ OPC_EmitInteger, MVT::i32, 0, |
| 4267 | /* 17502*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETE_DX10), 0, |
| 4268 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4269 | // Src: (selectcc:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETOEQ:{ *:[Other] }) - Complexity = 13 |
| 4270 | // Dst: (SETE_DX10:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4271 | /* 17528*/ /*Scope*/ 105, /*->17634*/ |
| 4272 | /* 17529*/ OPC_CheckCondCode, ISD::SETEQ, |
| 4273 | /* 17531*/ OPC_MoveParent, |
| 4274 | /* 17532*/ OPC_CheckType, MVT::i32, |
| 4275 | /* 17534*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4276 | /* 17536*/ OPC_EmitInteger, MVT::i32, 0, |
| 4277 | /* 17539*/ OPC_EmitInteger, MVT::i32, 0, |
| 4278 | /* 17542*/ OPC_EmitInteger, MVT::i32, 1, |
| 4279 | /* 17545*/ OPC_EmitInteger, MVT::i32, 0, |
| 4280 | /* 17548*/ OPC_EmitInteger, MVT::i32, 0, |
| 4281 | /* 17551*/ OPC_EmitInteger, MVT::i32, 0, |
| 4282 | /* 17554*/ OPC_EmitInteger, MVT::i32, 0, |
| 4283 | /* 17557*/ OPC_EmitInteger, MVT::i32, 0, |
| 4284 | /* 17560*/ OPC_EmitInteger, MVT::i32, 0, |
| 4285 | /* 17563*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4286 | /* 17575*/ OPC_EmitInteger, MVT::i32, 0, |
| 4287 | /* 17578*/ OPC_EmitInteger, MVT::i32, 0, |
| 4288 | /* 17581*/ OPC_EmitInteger, MVT::i32, 0, |
| 4289 | /* 17584*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4290 | /* 17596*/ OPC_EmitInteger, MVT::i32, 1, |
| 4291 | /* 17599*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4292 | /* 17602*/ OPC_EmitInteger, MVT::i32, 0, |
| 4293 | /* 17605*/ OPC_EmitInteger, MVT::i32, 0, |
| 4294 | /* 17608*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETE_DX10), 0, |
| 4295 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4296 | // Src: (selectcc:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETEQ:{ *:[Other] }) - Complexity = 13 |
| 4297 | // Dst: (SETE_DX10:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4298 | /* 17634*/ /*Scope*/ 105, /*->17740*/ |
| 4299 | /* 17635*/ OPC_CheckCondCode, ISD::SETOGT, |
| 4300 | /* 17637*/ OPC_MoveParent, |
| 4301 | /* 17638*/ OPC_CheckType, MVT::i32, |
| 4302 | /* 17640*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4303 | /* 17642*/ OPC_EmitInteger, MVT::i32, 0, |
| 4304 | /* 17645*/ OPC_EmitInteger, MVT::i32, 0, |
| 4305 | /* 17648*/ OPC_EmitInteger, MVT::i32, 1, |
| 4306 | /* 17651*/ OPC_EmitInteger, MVT::i32, 0, |
| 4307 | /* 17654*/ OPC_EmitInteger, MVT::i32, 0, |
| 4308 | /* 17657*/ OPC_EmitInteger, MVT::i32, 0, |
| 4309 | /* 17660*/ OPC_EmitInteger, MVT::i32, 0, |
| 4310 | /* 17663*/ OPC_EmitInteger, MVT::i32, 0, |
| 4311 | /* 17666*/ OPC_EmitInteger, MVT::i32, 0, |
| 4312 | /* 17669*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4313 | /* 17681*/ OPC_EmitInteger, MVT::i32, 0, |
| 4314 | /* 17684*/ OPC_EmitInteger, MVT::i32, 0, |
| 4315 | /* 17687*/ OPC_EmitInteger, MVT::i32, 0, |
| 4316 | /* 17690*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4317 | /* 17702*/ OPC_EmitInteger, MVT::i32, 1, |
| 4318 | /* 17705*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4319 | /* 17708*/ OPC_EmitInteger, MVT::i32, 0, |
| 4320 | /* 17711*/ OPC_EmitInteger, MVT::i32, 0, |
| 4321 | /* 17714*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETGT_DX10), 0, |
| 4322 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4323 | // Src: (selectcc:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETOGT:{ *:[Other] }) - Complexity = 13 |
| 4324 | // Dst: (SETGT_DX10:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4325 | /* 17740*/ /*Scope*/ 105, /*->17846*/ |
| 4326 | /* 17741*/ OPC_CheckCondCode, ISD::SETGT, |
| 4327 | /* 17743*/ OPC_MoveParent, |
| 4328 | /* 17744*/ OPC_CheckType, MVT::i32, |
| 4329 | /* 17746*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4330 | /* 17748*/ OPC_EmitInteger, MVT::i32, 0, |
| 4331 | /* 17751*/ OPC_EmitInteger, MVT::i32, 0, |
| 4332 | /* 17754*/ OPC_EmitInteger, MVT::i32, 1, |
| 4333 | /* 17757*/ OPC_EmitInteger, MVT::i32, 0, |
| 4334 | /* 17760*/ OPC_EmitInteger, MVT::i32, 0, |
| 4335 | /* 17763*/ OPC_EmitInteger, MVT::i32, 0, |
| 4336 | /* 17766*/ OPC_EmitInteger, MVT::i32, 0, |
| 4337 | /* 17769*/ OPC_EmitInteger, MVT::i32, 0, |
| 4338 | /* 17772*/ OPC_EmitInteger, MVT::i32, 0, |
| 4339 | /* 17775*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4340 | /* 17787*/ OPC_EmitInteger, MVT::i32, 0, |
| 4341 | /* 17790*/ OPC_EmitInteger, MVT::i32, 0, |
| 4342 | /* 17793*/ OPC_EmitInteger, MVT::i32, 0, |
| 4343 | /* 17796*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4344 | /* 17808*/ OPC_EmitInteger, MVT::i32, 1, |
| 4345 | /* 17811*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4346 | /* 17814*/ OPC_EmitInteger, MVT::i32, 0, |
| 4347 | /* 17817*/ OPC_EmitInteger, MVT::i32, 0, |
| 4348 | /* 17820*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETGT_DX10), 0, |
| 4349 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4350 | // Src: (selectcc:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETGT:{ *:[Other] }) - Complexity = 13 |
| 4351 | // Dst: (SETGT_DX10:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4352 | /* 17846*/ /*Scope*/ 105, /*->17952*/ |
| 4353 | /* 17847*/ OPC_CheckCondCode, ISD::SETOGE, |
| 4354 | /* 17849*/ OPC_MoveParent, |
| 4355 | /* 17850*/ OPC_CheckType, MVT::i32, |
| 4356 | /* 17852*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4357 | /* 17854*/ OPC_EmitInteger, MVT::i32, 0, |
| 4358 | /* 17857*/ OPC_EmitInteger, MVT::i32, 0, |
| 4359 | /* 17860*/ OPC_EmitInteger, MVT::i32, 1, |
| 4360 | /* 17863*/ OPC_EmitInteger, MVT::i32, 0, |
| 4361 | /* 17866*/ OPC_EmitInteger, MVT::i32, 0, |
| 4362 | /* 17869*/ OPC_EmitInteger, MVT::i32, 0, |
| 4363 | /* 17872*/ OPC_EmitInteger, MVT::i32, 0, |
| 4364 | /* 17875*/ OPC_EmitInteger, MVT::i32, 0, |
| 4365 | /* 17878*/ OPC_EmitInteger, MVT::i32, 0, |
| 4366 | /* 17881*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4367 | /* 17893*/ OPC_EmitInteger, MVT::i32, 0, |
| 4368 | /* 17896*/ OPC_EmitInteger, MVT::i32, 0, |
| 4369 | /* 17899*/ OPC_EmitInteger, MVT::i32, 0, |
| 4370 | /* 17902*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4371 | /* 17914*/ OPC_EmitInteger, MVT::i32, 1, |
| 4372 | /* 17917*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4373 | /* 17920*/ OPC_EmitInteger, MVT::i32, 0, |
| 4374 | /* 17923*/ OPC_EmitInteger, MVT::i32, 0, |
| 4375 | /* 17926*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETGE_DX10), 0, |
| 4376 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4377 | // Src: (selectcc:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETOGE:{ *:[Other] }) - Complexity = 13 |
| 4378 | // Dst: (SETGE_DX10:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4379 | /* 17952*/ /*Scope*/ 105, /*->18058*/ |
| 4380 | /* 17953*/ OPC_CheckCondCode, ISD::SETGE, |
| 4381 | /* 17955*/ OPC_MoveParent, |
| 4382 | /* 17956*/ OPC_CheckType, MVT::i32, |
| 4383 | /* 17958*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4384 | /* 17960*/ OPC_EmitInteger, MVT::i32, 0, |
| 4385 | /* 17963*/ OPC_EmitInteger, MVT::i32, 0, |
| 4386 | /* 17966*/ OPC_EmitInteger, MVT::i32, 1, |
| 4387 | /* 17969*/ OPC_EmitInteger, MVT::i32, 0, |
| 4388 | /* 17972*/ OPC_EmitInteger, MVT::i32, 0, |
| 4389 | /* 17975*/ OPC_EmitInteger, MVT::i32, 0, |
| 4390 | /* 17978*/ OPC_EmitInteger, MVT::i32, 0, |
| 4391 | /* 17981*/ OPC_EmitInteger, MVT::i32, 0, |
| 4392 | /* 17984*/ OPC_EmitInteger, MVT::i32, 0, |
| 4393 | /* 17987*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4394 | /* 17999*/ OPC_EmitInteger, MVT::i32, 0, |
| 4395 | /* 18002*/ OPC_EmitInteger, MVT::i32, 0, |
| 4396 | /* 18005*/ OPC_EmitInteger, MVT::i32, 0, |
| 4397 | /* 18008*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4398 | /* 18020*/ OPC_EmitInteger, MVT::i32, 1, |
| 4399 | /* 18023*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4400 | /* 18026*/ OPC_EmitInteger, MVT::i32, 0, |
| 4401 | /* 18029*/ OPC_EmitInteger, MVT::i32, 0, |
| 4402 | /* 18032*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETGE_DX10), 0, |
| 4403 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4404 | // Src: (selectcc:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETGE:{ *:[Other] }) - Complexity = 13 |
| 4405 | // Dst: (SETGE_DX10:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4406 | /* 18058*/ /*Scope*/ 105, /*->18164*/ |
| 4407 | /* 18059*/ OPC_CheckCondCode, ISD::SETUNE, |
| 4408 | /* 18061*/ OPC_MoveParent, |
| 4409 | /* 18062*/ OPC_CheckType, MVT::i32, |
| 4410 | /* 18064*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4411 | /* 18066*/ OPC_EmitInteger, MVT::i32, 0, |
| 4412 | /* 18069*/ OPC_EmitInteger, MVT::i32, 0, |
| 4413 | /* 18072*/ OPC_EmitInteger, MVT::i32, 1, |
| 4414 | /* 18075*/ OPC_EmitInteger, MVT::i32, 0, |
| 4415 | /* 18078*/ OPC_EmitInteger, MVT::i32, 0, |
| 4416 | /* 18081*/ OPC_EmitInteger, MVT::i32, 0, |
| 4417 | /* 18084*/ OPC_EmitInteger, MVT::i32, 0, |
| 4418 | /* 18087*/ OPC_EmitInteger, MVT::i32, 0, |
| 4419 | /* 18090*/ OPC_EmitInteger, MVT::i32, 0, |
| 4420 | /* 18093*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4421 | /* 18105*/ OPC_EmitInteger, MVT::i32, 0, |
| 4422 | /* 18108*/ OPC_EmitInteger, MVT::i32, 0, |
| 4423 | /* 18111*/ OPC_EmitInteger, MVT::i32, 0, |
| 4424 | /* 18114*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4425 | /* 18126*/ OPC_EmitInteger, MVT::i32, 1, |
| 4426 | /* 18129*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4427 | /* 18132*/ OPC_EmitInteger, MVT::i32, 0, |
| 4428 | /* 18135*/ OPC_EmitInteger, MVT::i32, 0, |
| 4429 | /* 18138*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETNE_DX10), 0, |
| 4430 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4431 | // Src: (selectcc:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETUNE:{ *:[Other] }) - Complexity = 13 |
| 4432 | // Dst: (SETNE_DX10:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4433 | /* 18164*/ /*Scope*/ 105, /*->18270*/ |
| 4434 | /* 18165*/ OPC_CheckCondCode, ISD::SETNE, |
| 4435 | /* 18167*/ OPC_MoveParent, |
| 4436 | /* 18168*/ OPC_CheckType, MVT::i32, |
| 4437 | /* 18170*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4438 | /* 18172*/ OPC_EmitInteger, MVT::i32, 0, |
| 4439 | /* 18175*/ OPC_EmitInteger, MVT::i32, 0, |
| 4440 | /* 18178*/ OPC_EmitInteger, MVT::i32, 1, |
| 4441 | /* 18181*/ OPC_EmitInteger, MVT::i32, 0, |
| 4442 | /* 18184*/ OPC_EmitInteger, MVT::i32, 0, |
| 4443 | /* 18187*/ OPC_EmitInteger, MVT::i32, 0, |
| 4444 | /* 18190*/ OPC_EmitInteger, MVT::i32, 0, |
| 4445 | /* 18193*/ OPC_EmitInteger, MVT::i32, 0, |
| 4446 | /* 18196*/ OPC_EmitInteger, MVT::i32, 0, |
| 4447 | /* 18199*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4448 | /* 18211*/ OPC_EmitInteger, MVT::i32, 0, |
| 4449 | /* 18214*/ OPC_EmitInteger, MVT::i32, 0, |
| 4450 | /* 18217*/ OPC_EmitInteger, MVT::i32, 0, |
| 4451 | /* 18220*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4452 | /* 18232*/ OPC_EmitInteger, MVT::i32, 1, |
| 4453 | /* 18235*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4454 | /* 18238*/ OPC_EmitInteger, MVT::i32, 0, |
| 4455 | /* 18241*/ OPC_EmitInteger, MVT::i32, 0, |
| 4456 | /* 18244*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETNE_DX10), 0, |
| 4457 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4458 | // Src: (selectcc:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETNE:{ *:[Other] }) - Complexity = 13 |
| 4459 | // Dst: (SETNE_DX10:{ *:[i32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4460 | /* 18270*/ 0, /*End of Scope*/ |
| 4461 | /* 18271*/ /*Scope*/ 97|128,6/*865*/, /*->19138*/ |
| 4462 | /* 18273*/ OPC_MoveChild2, |
| 4463 | /* 18274*/ OPC_CheckOpcode, TARGET_VAL(ISD::ConstantFP), |
| 4464 | /* 18277*/ OPC_CheckPredicate, 2, // Predicate_FP_ONE |
| 4465 | /* 18279*/ OPC_MoveParent, |
| 4466 | /* 18280*/ OPC_MoveChild3, |
| 4467 | /* 18281*/ OPC_CheckOpcode, TARGET_VAL(ISD::ConstantFP), |
| 4468 | /* 18284*/ OPC_CheckPredicate, 3, // Predicate_FP_ZERO |
| 4469 | /* 18286*/ OPC_MoveParent, |
| 4470 | /* 18287*/ OPC_MoveChild4, |
| 4471 | /* 18288*/ OPC_Scope, 105, /*->18395*/ // 8 children in Scope |
| 4472 | /* 18290*/ OPC_CheckCondCode, ISD::SETOEQ, |
| 4473 | /* 18292*/ OPC_MoveParent, |
| 4474 | /* 18293*/ OPC_CheckType, MVT::f32, |
| 4475 | /* 18295*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4476 | /* 18297*/ OPC_EmitInteger, MVT::i32, 0, |
| 4477 | /* 18300*/ OPC_EmitInteger, MVT::i32, 0, |
| 4478 | /* 18303*/ OPC_EmitInteger, MVT::i32, 1, |
| 4479 | /* 18306*/ OPC_EmitInteger, MVT::i32, 0, |
| 4480 | /* 18309*/ OPC_EmitInteger, MVT::i32, 0, |
| 4481 | /* 18312*/ OPC_EmitInteger, MVT::i32, 0, |
| 4482 | /* 18315*/ OPC_EmitInteger, MVT::i32, 0, |
| 4483 | /* 18318*/ OPC_EmitInteger, MVT::i32, 0, |
| 4484 | /* 18321*/ OPC_EmitInteger, MVT::i32, 0, |
| 4485 | /* 18324*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4486 | /* 18336*/ OPC_EmitInteger, MVT::i32, 0, |
| 4487 | /* 18339*/ OPC_EmitInteger, MVT::i32, 0, |
| 4488 | /* 18342*/ OPC_EmitInteger, MVT::i32, 0, |
| 4489 | /* 18345*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4490 | /* 18357*/ OPC_EmitInteger, MVT::i32, 1, |
| 4491 | /* 18360*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4492 | /* 18363*/ OPC_EmitInteger, MVT::i32, 0, |
| 4493 | /* 18366*/ OPC_EmitInteger, MVT::i32, 0, |
| 4494 | /* 18369*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETE), 0, |
| 4495 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4496 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, SETOEQ:{ *:[Other] }) - Complexity = 11 |
| 4497 | // Dst: (SETE:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4498 | /* 18395*/ /*Scope*/ 105, /*->18501*/ |
| 4499 | /* 18396*/ OPC_CheckCondCode, ISD::SETEQ, |
| 4500 | /* 18398*/ OPC_MoveParent, |
| 4501 | /* 18399*/ OPC_CheckType, MVT::f32, |
| 4502 | /* 18401*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4503 | /* 18403*/ OPC_EmitInteger, MVT::i32, 0, |
| 4504 | /* 18406*/ OPC_EmitInteger, MVT::i32, 0, |
| 4505 | /* 18409*/ OPC_EmitInteger, MVT::i32, 1, |
| 4506 | /* 18412*/ OPC_EmitInteger, MVT::i32, 0, |
| 4507 | /* 18415*/ OPC_EmitInteger, MVT::i32, 0, |
| 4508 | /* 18418*/ OPC_EmitInteger, MVT::i32, 0, |
| 4509 | /* 18421*/ OPC_EmitInteger, MVT::i32, 0, |
| 4510 | /* 18424*/ OPC_EmitInteger, MVT::i32, 0, |
| 4511 | /* 18427*/ OPC_EmitInteger, MVT::i32, 0, |
| 4512 | /* 18430*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4513 | /* 18442*/ OPC_EmitInteger, MVT::i32, 0, |
| 4514 | /* 18445*/ OPC_EmitInteger, MVT::i32, 0, |
| 4515 | /* 18448*/ OPC_EmitInteger, MVT::i32, 0, |
| 4516 | /* 18451*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4517 | /* 18463*/ OPC_EmitInteger, MVT::i32, 1, |
| 4518 | /* 18466*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4519 | /* 18469*/ OPC_EmitInteger, MVT::i32, 0, |
| 4520 | /* 18472*/ OPC_EmitInteger, MVT::i32, 0, |
| 4521 | /* 18475*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETE), 0, |
| 4522 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4523 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, SETEQ:{ *:[Other] }) - Complexity = 11 |
| 4524 | // Dst: (SETE:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4525 | /* 18501*/ /*Scope*/ 105, /*->18607*/ |
| 4526 | /* 18502*/ OPC_CheckCondCode, ISD::SETOGT, |
| 4527 | /* 18504*/ OPC_MoveParent, |
| 4528 | /* 18505*/ OPC_CheckType, MVT::f32, |
| 4529 | /* 18507*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4530 | /* 18509*/ OPC_EmitInteger, MVT::i32, 0, |
| 4531 | /* 18512*/ OPC_EmitInteger, MVT::i32, 0, |
| 4532 | /* 18515*/ OPC_EmitInteger, MVT::i32, 1, |
| 4533 | /* 18518*/ OPC_EmitInteger, MVT::i32, 0, |
| 4534 | /* 18521*/ OPC_EmitInteger, MVT::i32, 0, |
| 4535 | /* 18524*/ OPC_EmitInteger, MVT::i32, 0, |
| 4536 | /* 18527*/ OPC_EmitInteger, MVT::i32, 0, |
| 4537 | /* 18530*/ OPC_EmitInteger, MVT::i32, 0, |
| 4538 | /* 18533*/ OPC_EmitInteger, MVT::i32, 0, |
| 4539 | /* 18536*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4540 | /* 18548*/ OPC_EmitInteger, MVT::i32, 0, |
| 4541 | /* 18551*/ OPC_EmitInteger, MVT::i32, 0, |
| 4542 | /* 18554*/ OPC_EmitInteger, MVT::i32, 0, |
| 4543 | /* 18557*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4544 | /* 18569*/ OPC_EmitInteger, MVT::i32, 1, |
| 4545 | /* 18572*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4546 | /* 18575*/ OPC_EmitInteger, MVT::i32, 0, |
| 4547 | /* 18578*/ OPC_EmitInteger, MVT::i32, 0, |
| 4548 | /* 18581*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SGT), 0, |
| 4549 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4550 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, SETOGT:{ *:[Other] }) - Complexity = 11 |
| 4551 | // Dst: (SGT:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4552 | /* 18607*/ /*Scope*/ 105, /*->18713*/ |
| 4553 | /* 18608*/ OPC_CheckCondCode, ISD::SETGT, |
| 4554 | /* 18610*/ OPC_MoveParent, |
| 4555 | /* 18611*/ OPC_CheckType, MVT::f32, |
| 4556 | /* 18613*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4557 | /* 18615*/ OPC_EmitInteger, MVT::i32, 0, |
| 4558 | /* 18618*/ OPC_EmitInteger, MVT::i32, 0, |
| 4559 | /* 18621*/ OPC_EmitInteger, MVT::i32, 1, |
| 4560 | /* 18624*/ OPC_EmitInteger, MVT::i32, 0, |
| 4561 | /* 18627*/ OPC_EmitInteger, MVT::i32, 0, |
| 4562 | /* 18630*/ OPC_EmitInteger, MVT::i32, 0, |
| 4563 | /* 18633*/ OPC_EmitInteger, MVT::i32, 0, |
| 4564 | /* 18636*/ OPC_EmitInteger, MVT::i32, 0, |
| 4565 | /* 18639*/ OPC_EmitInteger, MVT::i32, 0, |
| 4566 | /* 18642*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4567 | /* 18654*/ OPC_EmitInteger, MVT::i32, 0, |
| 4568 | /* 18657*/ OPC_EmitInteger, MVT::i32, 0, |
| 4569 | /* 18660*/ OPC_EmitInteger, MVT::i32, 0, |
| 4570 | /* 18663*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4571 | /* 18675*/ OPC_EmitInteger, MVT::i32, 1, |
| 4572 | /* 18678*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4573 | /* 18681*/ OPC_EmitInteger, MVT::i32, 0, |
| 4574 | /* 18684*/ OPC_EmitInteger, MVT::i32, 0, |
| 4575 | /* 18687*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SGT), 0, |
| 4576 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4577 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, SETGT:{ *:[Other] }) - Complexity = 11 |
| 4578 | // Dst: (SGT:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4579 | /* 18713*/ /*Scope*/ 105, /*->18819*/ |
| 4580 | /* 18714*/ OPC_CheckCondCode, ISD::SETOGE, |
| 4581 | /* 18716*/ OPC_MoveParent, |
| 4582 | /* 18717*/ OPC_CheckType, MVT::f32, |
| 4583 | /* 18719*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4584 | /* 18721*/ OPC_EmitInteger, MVT::i32, 0, |
| 4585 | /* 18724*/ OPC_EmitInteger, MVT::i32, 0, |
| 4586 | /* 18727*/ OPC_EmitInteger, MVT::i32, 1, |
| 4587 | /* 18730*/ OPC_EmitInteger, MVT::i32, 0, |
| 4588 | /* 18733*/ OPC_EmitInteger, MVT::i32, 0, |
| 4589 | /* 18736*/ OPC_EmitInteger, MVT::i32, 0, |
| 4590 | /* 18739*/ OPC_EmitInteger, MVT::i32, 0, |
| 4591 | /* 18742*/ OPC_EmitInteger, MVT::i32, 0, |
| 4592 | /* 18745*/ OPC_EmitInteger, MVT::i32, 0, |
| 4593 | /* 18748*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4594 | /* 18760*/ OPC_EmitInteger, MVT::i32, 0, |
| 4595 | /* 18763*/ OPC_EmitInteger, MVT::i32, 0, |
| 4596 | /* 18766*/ OPC_EmitInteger, MVT::i32, 0, |
| 4597 | /* 18769*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4598 | /* 18781*/ OPC_EmitInteger, MVT::i32, 1, |
| 4599 | /* 18784*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4600 | /* 18787*/ OPC_EmitInteger, MVT::i32, 0, |
| 4601 | /* 18790*/ OPC_EmitInteger, MVT::i32, 0, |
| 4602 | /* 18793*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SGE), 0, |
| 4603 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4604 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, SETOGE:{ *:[Other] }) - Complexity = 11 |
| 4605 | // Dst: (SGE:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4606 | /* 18819*/ /*Scope*/ 105, /*->18925*/ |
| 4607 | /* 18820*/ OPC_CheckCondCode, ISD::SETGE, |
| 4608 | /* 18822*/ OPC_MoveParent, |
| 4609 | /* 18823*/ OPC_CheckType, MVT::f32, |
| 4610 | /* 18825*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4611 | /* 18827*/ OPC_EmitInteger, MVT::i32, 0, |
| 4612 | /* 18830*/ OPC_EmitInteger, MVT::i32, 0, |
| 4613 | /* 18833*/ OPC_EmitInteger, MVT::i32, 1, |
| 4614 | /* 18836*/ OPC_EmitInteger, MVT::i32, 0, |
| 4615 | /* 18839*/ OPC_EmitInteger, MVT::i32, 0, |
| 4616 | /* 18842*/ OPC_EmitInteger, MVT::i32, 0, |
| 4617 | /* 18845*/ OPC_EmitInteger, MVT::i32, 0, |
| 4618 | /* 18848*/ OPC_EmitInteger, MVT::i32, 0, |
| 4619 | /* 18851*/ OPC_EmitInteger, MVT::i32, 0, |
| 4620 | /* 18854*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4621 | /* 18866*/ OPC_EmitInteger, MVT::i32, 0, |
| 4622 | /* 18869*/ OPC_EmitInteger, MVT::i32, 0, |
| 4623 | /* 18872*/ OPC_EmitInteger, MVT::i32, 0, |
| 4624 | /* 18875*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4625 | /* 18887*/ OPC_EmitInteger, MVT::i32, 1, |
| 4626 | /* 18890*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4627 | /* 18893*/ OPC_EmitInteger, MVT::i32, 0, |
| 4628 | /* 18896*/ OPC_EmitInteger, MVT::i32, 0, |
| 4629 | /* 18899*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SGE), 0, |
| 4630 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4631 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, SETGE:{ *:[Other] }) - Complexity = 11 |
| 4632 | // Dst: (SGE:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4633 | /* 18925*/ /*Scope*/ 105, /*->19031*/ |
| 4634 | /* 18926*/ OPC_CheckCondCode, ISD::SETUNE, |
| 4635 | /* 18928*/ OPC_MoveParent, |
| 4636 | /* 18929*/ OPC_CheckType, MVT::f32, |
| 4637 | /* 18931*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4638 | /* 18933*/ OPC_EmitInteger, MVT::i32, 0, |
| 4639 | /* 18936*/ OPC_EmitInteger, MVT::i32, 0, |
| 4640 | /* 18939*/ OPC_EmitInteger, MVT::i32, 1, |
| 4641 | /* 18942*/ OPC_EmitInteger, MVT::i32, 0, |
| 4642 | /* 18945*/ OPC_EmitInteger, MVT::i32, 0, |
| 4643 | /* 18948*/ OPC_EmitInteger, MVT::i32, 0, |
| 4644 | /* 18951*/ OPC_EmitInteger, MVT::i32, 0, |
| 4645 | /* 18954*/ OPC_EmitInteger, MVT::i32, 0, |
| 4646 | /* 18957*/ OPC_EmitInteger, MVT::i32, 0, |
| 4647 | /* 18960*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4648 | /* 18972*/ OPC_EmitInteger, MVT::i32, 0, |
| 4649 | /* 18975*/ OPC_EmitInteger, MVT::i32, 0, |
| 4650 | /* 18978*/ OPC_EmitInteger, MVT::i32, 0, |
| 4651 | /* 18981*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4652 | /* 18993*/ OPC_EmitInteger, MVT::i32, 1, |
| 4653 | /* 18996*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4654 | /* 18999*/ OPC_EmitInteger, MVT::i32, 0, |
| 4655 | /* 19002*/ OPC_EmitInteger, MVT::i32, 0, |
| 4656 | /* 19005*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SNE), 0, |
| 4657 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4658 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, SETUNE:{ *:[Other] }) - Complexity = 11 |
| 4659 | // Dst: (SNE:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4660 | /* 19031*/ /*Scope*/ 105, /*->19137*/ |
| 4661 | /* 19032*/ OPC_CheckCondCode, ISD::SETNE, |
| 4662 | /* 19034*/ OPC_MoveParent, |
| 4663 | /* 19035*/ OPC_CheckType, MVT::f32, |
| 4664 | /* 19037*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4665 | /* 19039*/ OPC_EmitInteger, MVT::i32, 0, |
| 4666 | /* 19042*/ OPC_EmitInteger, MVT::i32, 0, |
| 4667 | /* 19045*/ OPC_EmitInteger, MVT::i32, 1, |
| 4668 | /* 19048*/ OPC_EmitInteger, MVT::i32, 0, |
| 4669 | /* 19051*/ OPC_EmitInteger, MVT::i32, 0, |
| 4670 | /* 19054*/ OPC_EmitInteger, MVT::i32, 0, |
| 4671 | /* 19057*/ OPC_EmitInteger, MVT::i32, 0, |
| 4672 | /* 19060*/ OPC_EmitInteger, MVT::i32, 0, |
| 4673 | /* 19063*/ OPC_EmitInteger, MVT::i32, 0, |
| 4674 | /* 19066*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4675 | /* 19078*/ OPC_EmitInteger, MVT::i32, 0, |
| 4676 | /* 19081*/ OPC_EmitInteger, MVT::i32, 0, |
| 4677 | /* 19084*/ OPC_EmitInteger, MVT::i32, 0, |
| 4678 | /* 19087*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4679 | /* 19099*/ OPC_EmitInteger, MVT::i32, 1, |
| 4680 | /* 19102*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4681 | /* 19105*/ OPC_EmitInteger, MVT::i32, 0, |
| 4682 | /* 19108*/ OPC_EmitInteger, MVT::i32, 0, |
| 4683 | /* 19111*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SNE), 0, |
| 4684 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 4685 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, SETNE:{ *:[Other] }) - Complexity = 11 |
| 4686 | // Dst: (SNE:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) |
| 4687 | /* 19137*/ 0, /*End of Scope*/ |
| 4688 | /* 19138*/ 0, /*End of Scope*/ |
| 4689 | /* 19139*/ /*Scope*/ 108|128,9/*1260*/, /*->20401*/ |
| 4690 | /* 19141*/ OPC_MoveChild1, |
| 4691 | /* 19142*/ OPC_CheckOpcode, TARGET_VAL(ISD::ConstantFP), |
| 4692 | /* 19145*/ OPC_CheckPredicate, 3, // Predicate_FP_ZERO |
| 4693 | /* 19147*/ OPC_MoveParent, |
| 4694 | /* 19148*/ OPC_RecordChild2, // #1 = $src1 |
| 4695 | /* 19149*/ OPC_RecordChild3, // #2 = $src2 |
| 4696 | /* 19150*/ OPC_MoveChild4, |
| 4697 | /* 19151*/ OPC_Scope, 103, /*->19256*/ // 12 children in Scope |
| 4698 | /* 19153*/ OPC_CheckCondCode, ISD::SETOEQ, |
| 4699 | /* 19155*/ OPC_MoveParent, |
| 4700 | /* 19156*/ OPC_CheckType, MVT::f32, |
| 4701 | /* 19158*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 4702 | /* 19160*/ OPC_EmitInteger, MVT::i32, 0, |
| 4703 | /* 19163*/ OPC_EmitInteger, MVT::i32, 0, |
| 4704 | /* 19166*/ OPC_EmitInteger, MVT::i32, 0, |
| 4705 | /* 19169*/ OPC_EmitInteger, MVT::i32, 0, |
| 4706 | /* 19172*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4707 | /* 19184*/ OPC_EmitInteger, MVT::i32, 0, |
| 4708 | /* 19187*/ OPC_EmitInteger, MVT::i32, 0, |
| 4709 | /* 19190*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4710 | /* 19202*/ OPC_EmitInteger, MVT::i32, 0, |
| 4711 | /* 19205*/ OPC_EmitInteger, MVT::i32, 0, |
| 4712 | /* 19208*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4713 | /* 19220*/ OPC_EmitInteger, MVT::i32, 1, |
| 4714 | /* 19223*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4715 | /* 19226*/ OPC_EmitInteger, MVT::i32, 0, |
| 4716 | /* 19229*/ OPC_EmitInteger, MVT::i32, 0, |
| 4717 | /* 19232*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDE_r600), 0, |
| 4718 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4719 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETOEQ:{ *:[Other] }) - Complexity = 7 |
| 4720 | // Dst: (CNDE_r600:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4721 | /* 19256*/ /*Scope*/ 103, /*->19360*/ |
| 4722 | /* 19257*/ OPC_CheckCondCode, ISD::SETEQ, |
| 4723 | /* 19259*/ OPC_MoveParent, |
| 4724 | /* 19260*/ OPC_CheckType, MVT::f32, |
| 4725 | /* 19262*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 4726 | /* 19264*/ OPC_EmitInteger, MVT::i32, 0, |
| 4727 | /* 19267*/ OPC_EmitInteger, MVT::i32, 0, |
| 4728 | /* 19270*/ OPC_EmitInteger, MVT::i32, 0, |
| 4729 | /* 19273*/ OPC_EmitInteger, MVT::i32, 0, |
| 4730 | /* 19276*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4731 | /* 19288*/ OPC_EmitInteger, MVT::i32, 0, |
| 4732 | /* 19291*/ OPC_EmitInteger, MVT::i32, 0, |
| 4733 | /* 19294*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4734 | /* 19306*/ OPC_EmitInteger, MVT::i32, 0, |
| 4735 | /* 19309*/ OPC_EmitInteger, MVT::i32, 0, |
| 4736 | /* 19312*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4737 | /* 19324*/ OPC_EmitInteger, MVT::i32, 1, |
| 4738 | /* 19327*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4739 | /* 19330*/ OPC_EmitInteger, MVT::i32, 0, |
| 4740 | /* 19333*/ OPC_EmitInteger, MVT::i32, 0, |
| 4741 | /* 19336*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDE_r600), 0, |
| 4742 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4743 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETEQ:{ *:[Other] }) - Complexity = 7 |
| 4744 | // Dst: (CNDE_r600:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4745 | /* 19360*/ /*Scope*/ 103, /*->19464*/ |
| 4746 | /* 19361*/ OPC_CheckCondCode, ISD::SETOGT, |
| 4747 | /* 19363*/ OPC_MoveParent, |
| 4748 | /* 19364*/ OPC_CheckType, MVT::f32, |
| 4749 | /* 19366*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 4750 | /* 19368*/ OPC_EmitInteger, MVT::i32, 0, |
| 4751 | /* 19371*/ OPC_EmitInteger, MVT::i32, 0, |
| 4752 | /* 19374*/ OPC_EmitInteger, MVT::i32, 0, |
| 4753 | /* 19377*/ OPC_EmitInteger, MVT::i32, 0, |
| 4754 | /* 19380*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4755 | /* 19392*/ OPC_EmitInteger, MVT::i32, 0, |
| 4756 | /* 19395*/ OPC_EmitInteger, MVT::i32, 0, |
| 4757 | /* 19398*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4758 | /* 19410*/ OPC_EmitInteger, MVT::i32, 0, |
| 4759 | /* 19413*/ OPC_EmitInteger, MVT::i32, 0, |
| 4760 | /* 19416*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4761 | /* 19428*/ OPC_EmitInteger, MVT::i32, 1, |
| 4762 | /* 19431*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4763 | /* 19434*/ OPC_EmitInteger, MVT::i32, 0, |
| 4764 | /* 19437*/ OPC_EmitInteger, MVT::i32, 0, |
| 4765 | /* 19440*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGT_r600), 0, |
| 4766 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4767 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETOGT:{ *:[Other] }) - Complexity = 7 |
| 4768 | // Dst: (CNDGT_r600:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4769 | /* 19464*/ /*Scope*/ 103, /*->19568*/ |
| 4770 | /* 19465*/ OPC_CheckCondCode, ISD::SETGT, |
| 4771 | /* 19467*/ OPC_MoveParent, |
| 4772 | /* 19468*/ OPC_CheckType, MVT::f32, |
| 4773 | /* 19470*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 4774 | /* 19472*/ OPC_EmitInteger, MVT::i32, 0, |
| 4775 | /* 19475*/ OPC_EmitInteger, MVT::i32, 0, |
| 4776 | /* 19478*/ OPC_EmitInteger, MVT::i32, 0, |
| 4777 | /* 19481*/ OPC_EmitInteger, MVT::i32, 0, |
| 4778 | /* 19484*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4779 | /* 19496*/ OPC_EmitInteger, MVT::i32, 0, |
| 4780 | /* 19499*/ OPC_EmitInteger, MVT::i32, 0, |
| 4781 | /* 19502*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4782 | /* 19514*/ OPC_EmitInteger, MVT::i32, 0, |
| 4783 | /* 19517*/ OPC_EmitInteger, MVT::i32, 0, |
| 4784 | /* 19520*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4785 | /* 19532*/ OPC_EmitInteger, MVT::i32, 1, |
| 4786 | /* 19535*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4787 | /* 19538*/ OPC_EmitInteger, MVT::i32, 0, |
| 4788 | /* 19541*/ OPC_EmitInteger, MVT::i32, 0, |
| 4789 | /* 19544*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGT_r600), 0, |
| 4790 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4791 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETGT:{ *:[Other] }) - Complexity = 7 |
| 4792 | // Dst: (CNDGT_r600:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4793 | /* 19568*/ /*Scope*/ 103, /*->19672*/ |
| 4794 | /* 19569*/ OPC_CheckCondCode, ISD::SETOGE, |
| 4795 | /* 19571*/ OPC_MoveParent, |
| 4796 | /* 19572*/ OPC_CheckType, MVT::f32, |
| 4797 | /* 19574*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 4798 | /* 19576*/ OPC_EmitInteger, MVT::i32, 0, |
| 4799 | /* 19579*/ OPC_EmitInteger, MVT::i32, 0, |
| 4800 | /* 19582*/ OPC_EmitInteger, MVT::i32, 0, |
| 4801 | /* 19585*/ OPC_EmitInteger, MVT::i32, 0, |
| 4802 | /* 19588*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4803 | /* 19600*/ OPC_EmitInteger, MVT::i32, 0, |
| 4804 | /* 19603*/ OPC_EmitInteger, MVT::i32, 0, |
| 4805 | /* 19606*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4806 | /* 19618*/ OPC_EmitInteger, MVT::i32, 0, |
| 4807 | /* 19621*/ OPC_EmitInteger, MVT::i32, 0, |
| 4808 | /* 19624*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4809 | /* 19636*/ OPC_EmitInteger, MVT::i32, 1, |
| 4810 | /* 19639*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4811 | /* 19642*/ OPC_EmitInteger, MVT::i32, 0, |
| 4812 | /* 19645*/ OPC_EmitInteger, MVT::i32, 0, |
| 4813 | /* 19648*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGE_r600), 0, |
| 4814 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4815 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETOGE:{ *:[Other] }) - Complexity = 7 |
| 4816 | // Dst: (CNDGE_r600:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4817 | /* 19672*/ /*Scope*/ 103, /*->19776*/ |
| 4818 | /* 19673*/ OPC_CheckCondCode, ISD::SETGE, |
| 4819 | /* 19675*/ OPC_MoveParent, |
| 4820 | /* 19676*/ OPC_CheckType, MVT::f32, |
| 4821 | /* 19678*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 4822 | /* 19680*/ OPC_EmitInteger, MVT::i32, 0, |
| 4823 | /* 19683*/ OPC_EmitInteger, MVT::i32, 0, |
| 4824 | /* 19686*/ OPC_EmitInteger, MVT::i32, 0, |
| 4825 | /* 19689*/ OPC_EmitInteger, MVT::i32, 0, |
| 4826 | /* 19692*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4827 | /* 19704*/ OPC_EmitInteger, MVT::i32, 0, |
| 4828 | /* 19707*/ OPC_EmitInteger, MVT::i32, 0, |
| 4829 | /* 19710*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4830 | /* 19722*/ OPC_EmitInteger, MVT::i32, 0, |
| 4831 | /* 19725*/ OPC_EmitInteger, MVT::i32, 0, |
| 4832 | /* 19728*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4833 | /* 19740*/ OPC_EmitInteger, MVT::i32, 1, |
| 4834 | /* 19743*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4835 | /* 19746*/ OPC_EmitInteger, MVT::i32, 0, |
| 4836 | /* 19749*/ OPC_EmitInteger, MVT::i32, 0, |
| 4837 | /* 19752*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGE_r600), 0, |
| 4838 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4839 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETGE:{ *:[Other] }) - Complexity = 7 |
| 4840 | // Dst: (CNDGE_r600:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4841 | /* 19776*/ /*Scope*/ 103, /*->19880*/ |
| 4842 | /* 19777*/ OPC_CheckCondCode, ISD::SETOEQ, |
| 4843 | /* 19779*/ OPC_MoveParent, |
| 4844 | /* 19780*/ OPC_CheckType, MVT::f32, |
| 4845 | /* 19782*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4846 | /* 19784*/ OPC_EmitInteger, MVT::i32, 0, |
| 4847 | /* 19787*/ OPC_EmitInteger, MVT::i32, 0, |
| 4848 | /* 19790*/ OPC_EmitInteger, MVT::i32, 0, |
| 4849 | /* 19793*/ OPC_EmitInteger, MVT::i32, 0, |
| 4850 | /* 19796*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4851 | /* 19808*/ OPC_EmitInteger, MVT::i32, 0, |
| 4852 | /* 19811*/ OPC_EmitInteger, MVT::i32, 0, |
| 4853 | /* 19814*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4854 | /* 19826*/ OPC_EmitInteger, MVT::i32, 0, |
| 4855 | /* 19829*/ OPC_EmitInteger, MVT::i32, 0, |
| 4856 | /* 19832*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4857 | /* 19844*/ OPC_EmitInteger, MVT::i32, 1, |
| 4858 | /* 19847*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4859 | /* 19850*/ OPC_EmitInteger, MVT::i32, 0, |
| 4860 | /* 19853*/ OPC_EmitInteger, MVT::i32, 0, |
| 4861 | /* 19856*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDE_eg), 0, |
| 4862 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4863 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETOEQ:{ *:[Other] }) - Complexity = 7 |
| 4864 | // Dst: (CNDE_eg:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4865 | /* 19880*/ /*Scope*/ 103, /*->19984*/ |
| 4866 | /* 19881*/ OPC_CheckCondCode, ISD::SETEQ, |
| 4867 | /* 19883*/ OPC_MoveParent, |
| 4868 | /* 19884*/ OPC_CheckType, MVT::f32, |
| 4869 | /* 19886*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4870 | /* 19888*/ OPC_EmitInteger, MVT::i32, 0, |
| 4871 | /* 19891*/ OPC_EmitInteger, MVT::i32, 0, |
| 4872 | /* 19894*/ OPC_EmitInteger, MVT::i32, 0, |
| 4873 | /* 19897*/ OPC_EmitInteger, MVT::i32, 0, |
| 4874 | /* 19900*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4875 | /* 19912*/ OPC_EmitInteger, MVT::i32, 0, |
| 4876 | /* 19915*/ OPC_EmitInteger, MVT::i32, 0, |
| 4877 | /* 19918*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4878 | /* 19930*/ OPC_EmitInteger, MVT::i32, 0, |
| 4879 | /* 19933*/ OPC_EmitInteger, MVT::i32, 0, |
| 4880 | /* 19936*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4881 | /* 19948*/ OPC_EmitInteger, MVT::i32, 1, |
| 4882 | /* 19951*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4883 | /* 19954*/ OPC_EmitInteger, MVT::i32, 0, |
| 4884 | /* 19957*/ OPC_EmitInteger, MVT::i32, 0, |
| 4885 | /* 19960*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDE_eg), 0, |
| 4886 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4887 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETEQ:{ *:[Other] }) - Complexity = 7 |
| 4888 | // Dst: (CNDE_eg:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4889 | /* 19984*/ /*Scope*/ 103, /*->20088*/ |
| 4890 | /* 19985*/ OPC_CheckCondCode, ISD::SETOGT, |
| 4891 | /* 19987*/ OPC_MoveParent, |
| 4892 | /* 19988*/ OPC_CheckType, MVT::f32, |
| 4893 | /* 19990*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4894 | /* 19992*/ OPC_EmitInteger, MVT::i32, 0, |
| 4895 | /* 19995*/ OPC_EmitInteger, MVT::i32, 0, |
| 4896 | /* 19998*/ OPC_EmitInteger, MVT::i32, 0, |
| 4897 | /* 20001*/ OPC_EmitInteger, MVT::i32, 0, |
| 4898 | /* 20004*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4899 | /* 20016*/ OPC_EmitInteger, MVT::i32, 0, |
| 4900 | /* 20019*/ OPC_EmitInteger, MVT::i32, 0, |
| 4901 | /* 20022*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4902 | /* 20034*/ OPC_EmitInteger, MVT::i32, 0, |
| 4903 | /* 20037*/ OPC_EmitInteger, MVT::i32, 0, |
| 4904 | /* 20040*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4905 | /* 20052*/ OPC_EmitInteger, MVT::i32, 1, |
| 4906 | /* 20055*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4907 | /* 20058*/ OPC_EmitInteger, MVT::i32, 0, |
| 4908 | /* 20061*/ OPC_EmitInteger, MVT::i32, 0, |
| 4909 | /* 20064*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGT_eg), 0, |
| 4910 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4911 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETOGT:{ *:[Other] }) - Complexity = 7 |
| 4912 | // Dst: (CNDGT_eg:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4913 | /* 20088*/ /*Scope*/ 103, /*->20192*/ |
| 4914 | /* 20089*/ OPC_CheckCondCode, ISD::SETGT, |
| 4915 | /* 20091*/ OPC_MoveParent, |
| 4916 | /* 20092*/ OPC_CheckType, MVT::f32, |
| 4917 | /* 20094*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4918 | /* 20096*/ OPC_EmitInteger, MVT::i32, 0, |
| 4919 | /* 20099*/ OPC_EmitInteger, MVT::i32, 0, |
| 4920 | /* 20102*/ OPC_EmitInteger, MVT::i32, 0, |
| 4921 | /* 20105*/ OPC_EmitInteger, MVT::i32, 0, |
| 4922 | /* 20108*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4923 | /* 20120*/ OPC_EmitInteger, MVT::i32, 0, |
| 4924 | /* 20123*/ OPC_EmitInteger, MVT::i32, 0, |
| 4925 | /* 20126*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4926 | /* 20138*/ OPC_EmitInteger, MVT::i32, 0, |
| 4927 | /* 20141*/ OPC_EmitInteger, MVT::i32, 0, |
| 4928 | /* 20144*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4929 | /* 20156*/ OPC_EmitInteger, MVT::i32, 1, |
| 4930 | /* 20159*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4931 | /* 20162*/ OPC_EmitInteger, MVT::i32, 0, |
| 4932 | /* 20165*/ OPC_EmitInteger, MVT::i32, 0, |
| 4933 | /* 20168*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGT_eg), 0, |
| 4934 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4935 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETGT:{ *:[Other] }) - Complexity = 7 |
| 4936 | // Dst: (CNDGT_eg:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4937 | /* 20192*/ /*Scope*/ 103, /*->20296*/ |
| 4938 | /* 20193*/ OPC_CheckCondCode, ISD::SETOGE, |
| 4939 | /* 20195*/ OPC_MoveParent, |
| 4940 | /* 20196*/ OPC_CheckType, MVT::f32, |
| 4941 | /* 20198*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4942 | /* 20200*/ OPC_EmitInteger, MVT::i32, 0, |
| 4943 | /* 20203*/ OPC_EmitInteger, MVT::i32, 0, |
| 4944 | /* 20206*/ OPC_EmitInteger, MVT::i32, 0, |
| 4945 | /* 20209*/ OPC_EmitInteger, MVT::i32, 0, |
| 4946 | /* 20212*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4947 | /* 20224*/ OPC_EmitInteger, MVT::i32, 0, |
| 4948 | /* 20227*/ OPC_EmitInteger, MVT::i32, 0, |
| 4949 | /* 20230*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4950 | /* 20242*/ OPC_EmitInteger, MVT::i32, 0, |
| 4951 | /* 20245*/ OPC_EmitInteger, MVT::i32, 0, |
| 4952 | /* 20248*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4953 | /* 20260*/ OPC_EmitInteger, MVT::i32, 1, |
| 4954 | /* 20263*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4955 | /* 20266*/ OPC_EmitInteger, MVT::i32, 0, |
| 4956 | /* 20269*/ OPC_EmitInteger, MVT::i32, 0, |
| 4957 | /* 20272*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGE_eg), 0, |
| 4958 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4959 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETOGE:{ *:[Other] }) - Complexity = 7 |
| 4960 | // Dst: (CNDGE_eg:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4961 | /* 20296*/ /*Scope*/ 103, /*->20400*/ |
| 4962 | /* 20297*/ OPC_CheckCondCode, ISD::SETGE, |
| 4963 | /* 20299*/ OPC_MoveParent, |
| 4964 | /* 20300*/ OPC_CheckType, MVT::f32, |
| 4965 | /* 20302*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4966 | /* 20304*/ OPC_EmitInteger, MVT::i32, 0, |
| 4967 | /* 20307*/ OPC_EmitInteger, MVT::i32, 0, |
| 4968 | /* 20310*/ OPC_EmitInteger, MVT::i32, 0, |
| 4969 | /* 20313*/ OPC_EmitInteger, MVT::i32, 0, |
| 4970 | /* 20316*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4971 | /* 20328*/ OPC_EmitInteger, MVT::i32, 0, |
| 4972 | /* 20331*/ OPC_EmitInteger, MVT::i32, 0, |
| 4973 | /* 20334*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4974 | /* 20346*/ OPC_EmitInteger, MVT::i32, 0, |
| 4975 | /* 20349*/ OPC_EmitInteger, MVT::i32, 0, |
| 4976 | /* 20352*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4977 | /* 20364*/ OPC_EmitInteger, MVT::i32, 1, |
| 4978 | /* 20367*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 4979 | /* 20370*/ OPC_EmitInteger, MVT::i32, 0, |
| 4980 | /* 20373*/ OPC_EmitInteger, MVT::i32, 0, |
| 4981 | /* 20376*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGE_eg), 0, |
| 4982 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 4983 | // Src: (selectcc:{ *:[f32] } f32:{ *:[f32] }:$src0, (fpimm:{ *:[f32] })<<P:Predicate_FP_ZERO>>, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETGE:{ *:[Other] }) - Complexity = 7 |
| 4984 | // Dst: (CNDGE_eg:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 4985 | /* 20400*/ 0, /*End of Scope*/ |
| 4986 | /* 20401*/ 0, /*End of Scope*/ |
| 4987 | /* 20402*/ /*Scope*/ 106|128,11/*1514*/, /*->21918*/ |
| 4988 | /* 20404*/ OPC_CheckChild0Type, MVT::i32, |
| 4989 | /* 20406*/ OPC_Scope, 13|128,5/*653*/, /*->21062*/ // 3 children in Scope |
| 4990 | /* 20409*/ OPC_RecordChild1, // #1 = $src1 |
| 4991 | /* 20410*/ OPC_CheckChild2Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 4992 | /* 20421*/ OPC_CheckChild3Integer, 0, |
| 4993 | /* 20423*/ OPC_MoveChild4, |
| 4994 | /* 20424*/ OPC_Scope, 105, /*->20531*/ // 6 children in Scope |
| 4995 | /* 20426*/ OPC_CheckCondCode, ISD::SETEQ, |
| 4996 | /* 20428*/ OPC_MoveParent, |
| 4997 | /* 20429*/ OPC_CheckType, MVT::i32, |
| 4998 | /* 20431*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 4999 | /* 20433*/ OPC_EmitInteger, MVT::i32, 0, |
| 5000 | /* 20436*/ OPC_EmitInteger, MVT::i32, 0, |
| 5001 | /* 20439*/ OPC_EmitInteger, MVT::i32, 1, |
| 5002 | /* 20442*/ OPC_EmitInteger, MVT::i32, 0, |
| 5003 | /* 20445*/ OPC_EmitInteger, MVT::i32, 0, |
| 5004 | /* 20448*/ OPC_EmitInteger, MVT::i32, 0, |
| 5005 | /* 20451*/ OPC_EmitInteger, MVT::i32, 0, |
| 5006 | /* 20454*/ OPC_EmitInteger, MVT::i32, 0, |
| 5007 | /* 20457*/ OPC_EmitInteger, MVT::i32, 0, |
| 5008 | /* 20460*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5009 | /* 20472*/ OPC_EmitInteger, MVT::i32, 0, |
| 5010 | /* 20475*/ OPC_EmitInteger, MVT::i32, 0, |
| 5011 | /* 20478*/ OPC_EmitInteger, MVT::i32, 0, |
| 5012 | /* 20481*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5013 | /* 20493*/ OPC_EmitInteger, MVT::i32, 1, |
| 5014 | /* 20496*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5015 | /* 20499*/ OPC_EmitInteger, MVT::i32, 0, |
| 5016 | /* 20502*/ OPC_EmitInteger, MVT::i32, 0, |
| 5017 | /* 20505*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETE_INT), 0, |
| 5018 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 5019 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETEQ:{ *:[Other] }) - Complexity = 13 |
| 5020 | // Dst: (SETE_INT:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 5021 | /* 20531*/ /*Scope*/ 105, /*->20637*/ |
| 5022 | /* 20532*/ OPC_CheckCondCode, ISD::SETGT, |
| 5023 | /* 20534*/ OPC_MoveParent, |
| 5024 | /* 20535*/ OPC_CheckType, MVT::i32, |
| 5025 | /* 20537*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5026 | /* 20539*/ OPC_EmitInteger, MVT::i32, 0, |
| 5027 | /* 20542*/ OPC_EmitInteger, MVT::i32, 0, |
| 5028 | /* 20545*/ OPC_EmitInteger, MVT::i32, 1, |
| 5029 | /* 20548*/ OPC_EmitInteger, MVT::i32, 0, |
| 5030 | /* 20551*/ OPC_EmitInteger, MVT::i32, 0, |
| 5031 | /* 20554*/ OPC_EmitInteger, MVT::i32, 0, |
| 5032 | /* 20557*/ OPC_EmitInteger, MVT::i32, 0, |
| 5033 | /* 20560*/ OPC_EmitInteger, MVT::i32, 0, |
| 5034 | /* 20563*/ OPC_EmitInteger, MVT::i32, 0, |
| 5035 | /* 20566*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5036 | /* 20578*/ OPC_EmitInteger, MVT::i32, 0, |
| 5037 | /* 20581*/ OPC_EmitInteger, MVT::i32, 0, |
| 5038 | /* 20584*/ OPC_EmitInteger, MVT::i32, 0, |
| 5039 | /* 20587*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5040 | /* 20599*/ OPC_EmitInteger, MVT::i32, 1, |
| 5041 | /* 20602*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5042 | /* 20605*/ OPC_EmitInteger, MVT::i32, 0, |
| 5043 | /* 20608*/ OPC_EmitInteger, MVT::i32, 0, |
| 5044 | /* 20611*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETGT_INT), 0, |
| 5045 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 5046 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETGT:{ *:[Other] }) - Complexity = 13 |
| 5047 | // Dst: (SETGT_INT:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 5048 | /* 20637*/ /*Scope*/ 105, /*->20743*/ |
| 5049 | /* 20638*/ OPC_CheckCondCode, ISD::SETGE, |
| 5050 | /* 20640*/ OPC_MoveParent, |
| 5051 | /* 20641*/ OPC_CheckType, MVT::i32, |
| 5052 | /* 20643*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5053 | /* 20645*/ OPC_EmitInteger, MVT::i32, 0, |
| 5054 | /* 20648*/ OPC_EmitInteger, MVT::i32, 0, |
| 5055 | /* 20651*/ OPC_EmitInteger, MVT::i32, 1, |
| 5056 | /* 20654*/ OPC_EmitInteger, MVT::i32, 0, |
| 5057 | /* 20657*/ OPC_EmitInteger, MVT::i32, 0, |
| 5058 | /* 20660*/ OPC_EmitInteger, MVT::i32, 0, |
| 5059 | /* 20663*/ OPC_EmitInteger, MVT::i32, 0, |
| 5060 | /* 20666*/ OPC_EmitInteger, MVT::i32, 0, |
| 5061 | /* 20669*/ OPC_EmitInteger, MVT::i32, 0, |
| 5062 | /* 20672*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5063 | /* 20684*/ OPC_EmitInteger, MVT::i32, 0, |
| 5064 | /* 20687*/ OPC_EmitInteger, MVT::i32, 0, |
| 5065 | /* 20690*/ OPC_EmitInteger, MVT::i32, 0, |
| 5066 | /* 20693*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5067 | /* 20705*/ OPC_EmitInteger, MVT::i32, 1, |
| 5068 | /* 20708*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5069 | /* 20711*/ OPC_EmitInteger, MVT::i32, 0, |
| 5070 | /* 20714*/ OPC_EmitInteger, MVT::i32, 0, |
| 5071 | /* 20717*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETGE_INT), 0, |
| 5072 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 5073 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETGE:{ *:[Other] }) - Complexity = 13 |
| 5074 | // Dst: (SETGE_INT:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 5075 | /* 20743*/ /*Scope*/ 105, /*->20849*/ |
| 5076 | /* 20744*/ OPC_CheckCondCode, ISD::SETNE, |
| 5077 | /* 20746*/ OPC_MoveParent, |
| 5078 | /* 20747*/ OPC_CheckType, MVT::i32, |
| 5079 | /* 20749*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5080 | /* 20751*/ OPC_EmitInteger, MVT::i32, 0, |
| 5081 | /* 20754*/ OPC_EmitInteger, MVT::i32, 0, |
| 5082 | /* 20757*/ OPC_EmitInteger, MVT::i32, 1, |
| 5083 | /* 20760*/ OPC_EmitInteger, MVT::i32, 0, |
| 5084 | /* 20763*/ OPC_EmitInteger, MVT::i32, 0, |
| 5085 | /* 20766*/ OPC_EmitInteger, MVT::i32, 0, |
| 5086 | /* 20769*/ OPC_EmitInteger, MVT::i32, 0, |
| 5087 | /* 20772*/ OPC_EmitInteger, MVT::i32, 0, |
| 5088 | /* 20775*/ OPC_EmitInteger, MVT::i32, 0, |
| 5089 | /* 20778*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5090 | /* 20790*/ OPC_EmitInteger, MVT::i32, 0, |
| 5091 | /* 20793*/ OPC_EmitInteger, MVT::i32, 0, |
| 5092 | /* 20796*/ OPC_EmitInteger, MVT::i32, 0, |
| 5093 | /* 20799*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5094 | /* 20811*/ OPC_EmitInteger, MVT::i32, 1, |
| 5095 | /* 20814*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5096 | /* 20817*/ OPC_EmitInteger, MVT::i32, 0, |
| 5097 | /* 20820*/ OPC_EmitInteger, MVT::i32, 0, |
| 5098 | /* 20823*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETNE_INT), 0, |
| 5099 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 5100 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETNE:{ *:[Other] }) - Complexity = 13 |
| 5101 | // Dst: (SETNE_INT:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 5102 | /* 20849*/ /*Scope*/ 105, /*->20955*/ |
| 5103 | /* 20850*/ OPC_CheckCondCode, ISD::SETUGT, |
| 5104 | /* 20852*/ OPC_MoveParent, |
| 5105 | /* 20853*/ OPC_CheckType, MVT::i32, |
| 5106 | /* 20855*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5107 | /* 20857*/ OPC_EmitInteger, MVT::i32, 0, |
| 5108 | /* 20860*/ OPC_EmitInteger, MVT::i32, 0, |
| 5109 | /* 20863*/ OPC_EmitInteger, MVT::i32, 1, |
| 5110 | /* 20866*/ OPC_EmitInteger, MVT::i32, 0, |
| 5111 | /* 20869*/ OPC_EmitInteger, MVT::i32, 0, |
| 5112 | /* 20872*/ OPC_EmitInteger, MVT::i32, 0, |
| 5113 | /* 20875*/ OPC_EmitInteger, MVT::i32, 0, |
| 5114 | /* 20878*/ OPC_EmitInteger, MVT::i32, 0, |
| 5115 | /* 20881*/ OPC_EmitInteger, MVT::i32, 0, |
| 5116 | /* 20884*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5117 | /* 20896*/ OPC_EmitInteger, MVT::i32, 0, |
| 5118 | /* 20899*/ OPC_EmitInteger, MVT::i32, 0, |
| 5119 | /* 20902*/ OPC_EmitInteger, MVT::i32, 0, |
| 5120 | /* 20905*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5121 | /* 20917*/ OPC_EmitInteger, MVT::i32, 1, |
| 5122 | /* 20920*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5123 | /* 20923*/ OPC_EmitInteger, MVT::i32, 0, |
| 5124 | /* 20926*/ OPC_EmitInteger, MVT::i32, 0, |
| 5125 | /* 20929*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETGT_UINT), 0, |
| 5126 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 5127 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETUGT:{ *:[Other] }) - Complexity = 13 |
| 5128 | // Dst: (SETGT_UINT:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 5129 | /* 20955*/ /*Scope*/ 105, /*->21061*/ |
| 5130 | /* 20956*/ OPC_CheckCondCode, ISD::SETUGE, |
| 5131 | /* 20958*/ OPC_MoveParent, |
| 5132 | /* 20959*/ OPC_CheckType, MVT::i32, |
| 5133 | /* 20961*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5134 | /* 20963*/ OPC_EmitInteger, MVT::i32, 0, |
| 5135 | /* 20966*/ OPC_EmitInteger, MVT::i32, 0, |
| 5136 | /* 20969*/ OPC_EmitInteger, MVT::i32, 1, |
| 5137 | /* 20972*/ OPC_EmitInteger, MVT::i32, 0, |
| 5138 | /* 20975*/ OPC_EmitInteger, MVT::i32, 0, |
| 5139 | /* 20978*/ OPC_EmitInteger, MVT::i32, 0, |
| 5140 | /* 20981*/ OPC_EmitInteger, MVT::i32, 0, |
| 5141 | /* 20984*/ OPC_EmitInteger, MVT::i32, 0, |
| 5142 | /* 20987*/ OPC_EmitInteger, MVT::i32, 0, |
| 5143 | /* 20990*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5144 | /* 21002*/ OPC_EmitInteger, MVT::i32, 0, |
| 5145 | /* 21005*/ OPC_EmitInteger, MVT::i32, 0, |
| 5146 | /* 21008*/ OPC_EmitInteger, MVT::i32, 0, |
| 5147 | /* 21011*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5148 | /* 21023*/ OPC_EmitInteger, MVT::i32, 1, |
| 5149 | /* 21026*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5150 | /* 21029*/ OPC_EmitInteger, MVT::i32, 0, |
| 5151 | /* 21032*/ OPC_EmitInteger, MVT::i32, 0, |
| 5152 | /* 21035*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SETGE_UINT), 0, |
| 5153 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 5154 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, -1:{ *:[i32] }, 0:{ *:[i32] }, SETUGE:{ *:[Other] }) - Complexity = 13 |
| 5155 | // Dst: (SETGE_UINT:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 5156 | /* 21061*/ 0, /*End of Scope*/ |
| 5157 | /* 21062*/ /*Scope*/ 95|128,5/*735*/, /*->21799*/ |
| 5158 | /* 21064*/ OPC_CheckChild1Integer, 0, |
| 5159 | /* 21066*/ OPC_RecordChild2, // #1 = $src1 |
| 5160 | /* 21067*/ OPC_RecordChild3, // #2 = $src2 |
| 5161 | /* 21068*/ OPC_MoveChild4, |
| 5162 | /* 21069*/ OPC_Scope, 103, /*->21174*/ // 7 children in Scope |
| 5163 | /* 21071*/ OPC_CheckCondCode, ISD::SETEQ, |
| 5164 | /* 21073*/ OPC_MoveParent, |
| 5165 | /* 21074*/ OPC_CheckType, MVT::i32, |
| 5166 | /* 21076*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5167 | /* 21078*/ OPC_EmitInteger, MVT::i32, 0, |
| 5168 | /* 21081*/ OPC_EmitInteger, MVT::i32, 0, |
| 5169 | /* 21084*/ OPC_EmitInteger, MVT::i32, 0, |
| 5170 | /* 21087*/ OPC_EmitInteger, MVT::i32, 0, |
| 5171 | /* 21090*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5172 | /* 21102*/ OPC_EmitInteger, MVT::i32, 0, |
| 5173 | /* 21105*/ OPC_EmitInteger, MVT::i32, 0, |
| 5174 | /* 21108*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5175 | /* 21120*/ OPC_EmitInteger, MVT::i32, 0, |
| 5176 | /* 21123*/ OPC_EmitInteger, MVT::i32, 0, |
| 5177 | /* 21126*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5178 | /* 21138*/ OPC_EmitInteger, MVT::i32, 1, |
| 5179 | /* 21141*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5180 | /* 21144*/ OPC_EmitInteger, MVT::i32, 0, |
| 5181 | /* 21147*/ OPC_EmitInteger, MVT::i32, 0, |
| 5182 | /* 21150*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDE_INT), 0, |
| 5183 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 5184 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, 0:{ *:[i32] }, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2, SETEQ:{ *:[Other] }) - Complexity = 8 |
| 5185 | // Dst: (CNDE_INT:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 5186 | /* 21174*/ /*Scope*/ 103, /*->21278*/ |
| 5187 | /* 21175*/ OPC_CheckCondCode, ISD::SETUEQ, |
| 5188 | /* 21177*/ OPC_MoveParent, |
| 5189 | /* 21178*/ OPC_CheckType, MVT::i32, |
| 5190 | /* 21180*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5191 | /* 21182*/ OPC_EmitInteger, MVT::i32, 0, |
| 5192 | /* 21185*/ OPC_EmitInteger, MVT::i32, 0, |
| 5193 | /* 21188*/ OPC_EmitInteger, MVT::i32, 0, |
| 5194 | /* 21191*/ OPC_EmitInteger, MVT::i32, 0, |
| 5195 | /* 21194*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5196 | /* 21206*/ OPC_EmitInteger, MVT::i32, 0, |
| 5197 | /* 21209*/ OPC_EmitInteger, MVT::i32, 0, |
| 5198 | /* 21212*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5199 | /* 21224*/ OPC_EmitInteger, MVT::i32, 0, |
| 5200 | /* 21227*/ OPC_EmitInteger, MVT::i32, 0, |
| 5201 | /* 21230*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5202 | /* 21242*/ OPC_EmitInteger, MVT::i32, 1, |
| 5203 | /* 21245*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5204 | /* 21248*/ OPC_EmitInteger, MVT::i32, 0, |
| 5205 | /* 21251*/ OPC_EmitInteger, MVT::i32, 0, |
| 5206 | /* 21254*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDE_INT), 0, |
| 5207 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 5208 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, 0:{ *:[i32] }, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2, SETUEQ:{ *:[Other] }) - Complexity = 8 |
| 5209 | // Dst: (CNDE_INT:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 5210 | /* 21278*/ /*Scope*/ 103, /*->21382*/ |
| 5211 | /* 21279*/ OPC_CheckCondCode, ISD::SETGE, |
| 5212 | /* 21281*/ OPC_MoveParent, |
| 5213 | /* 21282*/ OPC_CheckType, MVT::i32, |
| 5214 | /* 21284*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5215 | /* 21286*/ OPC_EmitInteger, MVT::i32, 0, |
| 5216 | /* 21289*/ OPC_EmitInteger, MVT::i32, 0, |
| 5217 | /* 21292*/ OPC_EmitInteger, MVT::i32, 0, |
| 5218 | /* 21295*/ OPC_EmitInteger, MVT::i32, 0, |
| 5219 | /* 21298*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5220 | /* 21310*/ OPC_EmitInteger, MVT::i32, 0, |
| 5221 | /* 21313*/ OPC_EmitInteger, MVT::i32, 0, |
| 5222 | /* 21316*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5223 | /* 21328*/ OPC_EmitInteger, MVT::i32, 0, |
| 5224 | /* 21331*/ OPC_EmitInteger, MVT::i32, 0, |
| 5225 | /* 21334*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5226 | /* 21346*/ OPC_EmitInteger, MVT::i32, 1, |
| 5227 | /* 21349*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5228 | /* 21352*/ OPC_EmitInteger, MVT::i32, 0, |
| 5229 | /* 21355*/ OPC_EmitInteger, MVT::i32, 0, |
| 5230 | /* 21358*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGE_INT), 0, |
| 5231 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 5232 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, 0:{ *:[i32] }, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2, SETGE:{ *:[Other] }) - Complexity = 8 |
| 5233 | // Dst: (CNDGE_INT:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 5234 | /* 21382*/ /*Scope*/ 103, /*->21486*/ |
| 5235 | /* 21383*/ OPC_CheckCondCode, ISD::SETGT, |
| 5236 | /* 21385*/ OPC_MoveParent, |
| 5237 | /* 21386*/ OPC_CheckType, MVT::i32, |
| 5238 | /* 21388*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5239 | /* 21390*/ OPC_EmitInteger, MVT::i32, 0, |
| 5240 | /* 21393*/ OPC_EmitInteger, MVT::i32, 0, |
| 5241 | /* 21396*/ OPC_EmitInteger, MVT::i32, 0, |
| 5242 | /* 21399*/ OPC_EmitInteger, MVT::i32, 0, |
| 5243 | /* 21402*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5244 | /* 21414*/ OPC_EmitInteger, MVT::i32, 0, |
| 5245 | /* 21417*/ OPC_EmitInteger, MVT::i32, 0, |
| 5246 | /* 21420*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5247 | /* 21432*/ OPC_EmitInteger, MVT::i32, 0, |
| 5248 | /* 21435*/ OPC_EmitInteger, MVT::i32, 0, |
| 5249 | /* 21438*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5250 | /* 21450*/ OPC_EmitInteger, MVT::i32, 1, |
| 5251 | /* 21453*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5252 | /* 21456*/ OPC_EmitInteger, MVT::i32, 0, |
| 5253 | /* 21459*/ OPC_EmitInteger, MVT::i32, 0, |
| 5254 | /* 21462*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGT_INT), 0, |
| 5255 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 5256 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, 0:{ *:[i32] }, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2, SETGT:{ *:[Other] }) - Complexity = 8 |
| 5257 | // Dst: (CNDGT_INT:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 5258 | /* 21486*/ /*Scope*/ 103, /*->21590*/ |
| 5259 | /* 21487*/ OPC_CheckCondCode, ISD::SETEQ, |
| 5260 | /* 21489*/ OPC_MoveParent, |
| 5261 | /* 21490*/ OPC_CheckType, MVT::f32, |
| 5262 | /* 21492*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5263 | /* 21494*/ OPC_EmitInteger, MVT::i32, 0, |
| 5264 | /* 21497*/ OPC_EmitInteger, MVT::i32, 0, |
| 5265 | /* 21500*/ OPC_EmitInteger, MVT::i32, 0, |
| 5266 | /* 21503*/ OPC_EmitInteger, MVT::i32, 0, |
| 5267 | /* 21506*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5268 | /* 21518*/ OPC_EmitInteger, MVT::i32, 0, |
| 5269 | /* 21521*/ OPC_EmitInteger, MVT::i32, 0, |
| 5270 | /* 21524*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5271 | /* 21536*/ OPC_EmitInteger, MVT::i32, 0, |
| 5272 | /* 21539*/ OPC_EmitInteger, MVT::i32, 0, |
| 5273 | /* 21542*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5274 | /* 21554*/ OPC_EmitInteger, MVT::i32, 1, |
| 5275 | /* 21557*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5276 | /* 21560*/ OPC_EmitInteger, MVT::i32, 0, |
| 5277 | /* 21563*/ OPC_EmitInteger, MVT::i32, 0, |
| 5278 | /* 21566*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDE_INT), 0, |
| 5279 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 5280 | // Src: (selectcc:{ *:[f32] } i32:{ *:[i32] }:$src0, 0:{ *:[i32] }, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETEQ:{ *:[Other] }) - Complexity = 8 |
| 5281 | // Dst: (CNDE_INT:{ *:[f32] } ?:{ *:[i32] }:$src0, ?:{ *:[f32] }:$src1, ?:{ *:[f32] }:$src2) |
| 5282 | /* 21590*/ /*Scope*/ 103, /*->21694*/ |
| 5283 | /* 21591*/ OPC_CheckCondCode, ISD::SETGT, |
| 5284 | /* 21593*/ OPC_MoveParent, |
| 5285 | /* 21594*/ OPC_CheckType, MVT::f32, |
| 5286 | /* 21596*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5287 | /* 21598*/ OPC_EmitInteger, MVT::i32, 0, |
| 5288 | /* 21601*/ OPC_EmitInteger, MVT::i32, 0, |
| 5289 | /* 21604*/ OPC_EmitInteger, MVT::i32, 0, |
| 5290 | /* 21607*/ OPC_EmitInteger, MVT::i32, 0, |
| 5291 | /* 21610*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5292 | /* 21622*/ OPC_EmitInteger, MVT::i32, 0, |
| 5293 | /* 21625*/ OPC_EmitInteger, MVT::i32, 0, |
| 5294 | /* 21628*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5295 | /* 21640*/ OPC_EmitInteger, MVT::i32, 0, |
| 5296 | /* 21643*/ OPC_EmitInteger, MVT::i32, 0, |
| 5297 | /* 21646*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5298 | /* 21658*/ OPC_EmitInteger, MVT::i32, 1, |
| 5299 | /* 21661*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5300 | /* 21664*/ OPC_EmitInteger, MVT::i32, 0, |
| 5301 | /* 21667*/ OPC_EmitInteger, MVT::i32, 0, |
| 5302 | /* 21670*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGT_INT), 0, |
| 5303 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 5304 | // Src: (selectcc:{ *:[f32] } i32:{ *:[i32] }:$src0, 0:{ *:[i32] }, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETGT:{ *:[Other] }) - Complexity = 8 |
| 5305 | // Dst: (CNDGT_INT:{ *:[f32] } ?:{ *:[i32] }:$src0, ?:{ *:[f32] }:$src1, ?:{ *:[f32] }:$src2) |
| 5306 | /* 21694*/ /*Scope*/ 103, /*->21798*/ |
| 5307 | /* 21695*/ OPC_CheckCondCode, ISD::SETGE, |
| 5308 | /* 21697*/ OPC_MoveParent, |
| 5309 | /* 21698*/ OPC_CheckType, MVT::f32, |
| 5310 | /* 21700*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5311 | /* 21702*/ OPC_EmitInteger, MVT::i32, 0, |
| 5312 | /* 21705*/ OPC_EmitInteger, MVT::i32, 0, |
| 5313 | /* 21708*/ OPC_EmitInteger, MVT::i32, 0, |
| 5314 | /* 21711*/ OPC_EmitInteger, MVT::i32, 0, |
| 5315 | /* 21714*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5316 | /* 21726*/ OPC_EmitInteger, MVT::i32, 0, |
| 5317 | /* 21729*/ OPC_EmitInteger, MVT::i32, 0, |
| 5318 | /* 21732*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5319 | /* 21744*/ OPC_EmitInteger, MVT::i32, 0, |
| 5320 | /* 21747*/ OPC_EmitInteger, MVT::i32, 0, |
| 5321 | /* 21750*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5322 | /* 21762*/ OPC_EmitInteger, MVT::i32, 1, |
| 5323 | /* 21765*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5324 | /* 21768*/ OPC_EmitInteger, MVT::i32, 0, |
| 5325 | /* 21771*/ OPC_EmitInteger, MVT::i32, 0, |
| 5326 | /* 21774*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGE_INT), 0, |
| 5327 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 5328 | // Src: (selectcc:{ *:[f32] } i32:{ *:[i32] }:$src0, 0:{ *:[i32] }, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2, SETGE:{ *:[Other] }) - Complexity = 8 |
| 5329 | // Dst: (CNDGE_INT:{ *:[f32] } ?:{ *:[i32] }:$src0, ?:{ *:[f32] }:$src1, ?:{ *:[f32] }:$src2) |
| 5330 | /* 21798*/ 0, /*End of Scope*/ |
| 5331 | /* 21799*/ /*Scope*/ 117, /*->21917*/ |
| 5332 | /* 21800*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5333 | /* 21811*/ OPC_RecordChild2, // #1 = $src1 |
| 5334 | /* 21812*/ OPC_RecordChild3, // #2 = $src2 |
| 5335 | /* 21813*/ OPC_MoveChild4, |
| 5336 | /* 21814*/ OPC_CheckCondCode, ISD::SETGT, |
| 5337 | /* 21816*/ OPC_MoveParent, |
| 5338 | /* 21817*/ OPC_CheckType, MVT::i32, |
| 5339 | /* 21819*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5340 | /* 21821*/ OPC_EmitInteger, MVT::i32, 0, |
| 5341 | /* 21824*/ OPC_EmitInteger, MVT::i32, 0, |
| 5342 | /* 21827*/ OPC_EmitInteger, MVT::i32, 0, |
| 5343 | /* 21830*/ OPC_EmitInteger, MVT::i32, 0, |
| 5344 | /* 21833*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5345 | /* 21845*/ OPC_EmitInteger, MVT::i32, 0, |
| 5346 | /* 21848*/ OPC_EmitInteger, MVT::i32, 0, |
| 5347 | /* 21851*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5348 | /* 21863*/ OPC_EmitInteger, MVT::i32, 0, |
| 5349 | /* 21866*/ OPC_EmitInteger, MVT::i32, 0, |
| 5350 | /* 21869*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5351 | /* 21881*/ OPC_EmitInteger, MVT::i32, 1, |
| 5352 | /* 21884*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5353 | /* 21887*/ OPC_EmitInteger, MVT::i32, 0, |
| 5354 | /* 21890*/ OPC_EmitInteger, MVT::i32, 0, |
| 5355 | /* 21893*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CNDGE_INT), 0, |
| 5356 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 5357 | // Src: (selectcc:{ *:[i32] } i32:{ *:[i32] }:$src0, -1:{ *:[i32] }, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2, SETGT:{ *:[Other] }) - Complexity = 8 |
| 5358 | // Dst: (CNDGE_INT:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1, ?:{ *:[i32] }:$src2) |
| 5359 | /* 21917*/ 0, /*End of Scope*/ |
| 5360 | /* 21918*/ 0, /*End of Scope*/ |
| 5361 | /* 21919*/ /*SwitchOpcode*/ 96|128,7/*992*/, TARGET_VAL(ISD::LOAD),// ->22915 |
| 5362 | /* 21923*/ OPC_RecordMemRef, |
| 5363 | /* 21924*/ OPC_RecordNode, // #0 = 'ld' chained node |
| 5364 | /* 21925*/ OPC_RecordChild1, // #1 = $addr |
| 5365 | /* 21926*/ OPC_CheckPredicate, 4, // Predicate_unindexedload |
| 5366 | /* 21928*/ OPC_Scope, 22, /*->21952*/ // 4 children in Scope |
| 5367 | /* 21930*/ OPC_CheckPredicate, 5, // Predicate_load_private |
| 5368 | /* 21932*/ OPC_CheckType, MVT::i32, |
| 5369 | /* 21934*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5370 | /* 21936*/ OPC_CheckComplexPat, /*CP*/0, /*#*/1, // SelectADDRIndirect:$addr #2 #3 |
| 5371 | /* 21939*/ OPC_EmitMergeInputChains1_0, |
| 5372 | /* 21940*/ OPC_EmitInteger, MVT::i32, 0, |
| 5373 | /* 21943*/ OPC_MorphNodeTo1, TARGET_VAL(R600::R600_RegisterLoad), 0|OPFL_Chain|OPFL_MemRefs, |
| 5374 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5375 | // Src: (ld:{ *:[i32] } ADDRIndirect:{ *:[iPTR] }:$addr)<<P:Predicate_unindexedload>><<P:Predicate_load_private>> - Complexity = 13 |
| 5376 | // Dst: (R600_RegisterLoad:{ *:[i32] } FRAMEri:{ *:[iPTR] }:$addr, 0:{ *:[i32] }) |
| 5377 | /* 21952*/ /*Scope*/ 66|128,3/*450*/, /*->22404*/ |
| 5378 | /* 21954*/ OPC_CheckChild1Type, MVT::i32, |
| 5379 | /* 21956*/ OPC_CheckType, MVT::i32, |
| 5380 | /* 21958*/ OPC_Scope, 50, /*->22010*/ // 12 children in Scope |
| 5381 | /* 21960*/ OPC_CheckPredicate, 6, // Predicate_az_extload |
| 5382 | /* 21962*/ OPC_Scope, 22, /*->21986*/ // 2 children in Scope |
| 5383 | /* 21964*/ OPC_CheckPredicate, 7, // Predicate_az_extloadi8 |
| 5384 | /* 21966*/ OPC_CheckPredicate, 8, // Predicate_vtx_id3_az_extloadi8 |
| 5385 | /* 21968*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5386 | /* 21970*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5387 | /* 21973*/ OPC_EmitMergeInputChains1_0, |
| 5388 | /* 21974*/ OPC_EmitInteger, MVT::i8, 3, |
| 5389 | /* 21977*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_8_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5390 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5391 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi8>><<P:Predicate_vtx_id3_az_extloadi8>> - Complexity = 13 |
| 5392 | // Dst: (VTX_READ_8_eg:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 3:{ *:[i8] }) |
| 5393 | /* 21986*/ /*Scope*/ 22, /*->22009*/ |
| 5394 | /* 21987*/ OPC_CheckPredicate, 9, // Predicate_az_extloadi16 |
| 5395 | /* 21989*/ OPC_CheckPredicate, 8, // Predicate_vtx_id3_az_extloadi16 |
| 5396 | /* 21991*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5397 | /* 21993*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5398 | /* 21996*/ OPC_EmitMergeInputChains1_0, |
| 5399 | /* 21997*/ OPC_EmitInteger, MVT::i8, 3, |
| 5400 | /* 22000*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_16_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5401 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5402 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi16>><<P:Predicate_vtx_id3_az_extloadi16>> - Complexity = 13 |
| 5403 | // Dst: (VTX_READ_16_eg:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 3:{ *:[i8] }) |
| 5404 | /* 22009*/ 0, /*End of Scope*/ |
| 5405 | /* 22010*/ /*Scope*/ 22, /*->22033*/ |
| 5406 | /* 22011*/ OPC_CheckPredicate, 10, // Predicate_load |
| 5407 | /* 22013*/ OPC_CheckPredicate, 8, // Predicate_vtx_id3_load |
| 5408 | /* 22015*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5409 | /* 22017*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5410 | /* 22020*/ OPC_EmitMergeInputChains1_0, |
| 5411 | /* 22021*/ OPC_EmitInteger, MVT::i8, 3, |
| 5412 | /* 22024*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_32_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5413 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5414 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id3_load>> - Complexity = 13 |
| 5415 | // Dst: (VTX_READ_32_eg:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 3:{ *:[i8] }) |
| 5416 | /* 22033*/ /*Scope*/ 50, /*->22084*/ |
| 5417 | /* 22034*/ OPC_CheckPredicate, 6, // Predicate_az_extload |
| 5418 | /* 22036*/ OPC_Scope, 22, /*->22060*/ // 2 children in Scope |
| 5419 | /* 22038*/ OPC_CheckPredicate, 7, // Predicate_az_extloadi8 |
| 5420 | /* 22040*/ OPC_CheckPredicate, 11, // Predicate_vtx_id2_az_extloadi8 |
| 5421 | /* 22042*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5422 | /* 22044*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5423 | /* 22047*/ OPC_EmitMergeInputChains1_0, |
| 5424 | /* 22048*/ OPC_EmitInteger, MVT::i8, 2, |
| 5425 | /* 22051*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_8_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5426 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5427 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi8>><<P:Predicate_vtx_id2_az_extloadi8>> - Complexity = 13 |
| 5428 | // Dst: (VTX_READ_8_eg:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 2:{ *:[i8] }) |
| 5429 | /* 22060*/ /*Scope*/ 22, /*->22083*/ |
| 5430 | /* 22061*/ OPC_CheckPredicate, 9, // Predicate_az_extloadi16 |
| 5431 | /* 22063*/ OPC_CheckPredicate, 11, // Predicate_vtx_id2_az_extloadi16 |
| 5432 | /* 22065*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5433 | /* 22067*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5434 | /* 22070*/ OPC_EmitMergeInputChains1_0, |
| 5435 | /* 22071*/ OPC_EmitInteger, MVT::i8, 2, |
| 5436 | /* 22074*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_16_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5437 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5438 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi16>><<P:Predicate_vtx_id2_az_extloadi16>> - Complexity = 13 |
| 5439 | // Dst: (VTX_READ_16_eg:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 2:{ *:[i8] }) |
| 5440 | /* 22083*/ 0, /*End of Scope*/ |
| 5441 | /* 22084*/ /*Scope*/ 22, /*->22107*/ |
| 5442 | /* 22085*/ OPC_CheckPredicate, 10, // Predicate_load |
| 5443 | /* 22087*/ OPC_CheckPredicate, 11, // Predicate_vtx_id2_load |
| 5444 | /* 22089*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5445 | /* 22091*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5446 | /* 22094*/ OPC_EmitMergeInputChains1_0, |
| 5447 | /* 22095*/ OPC_EmitInteger, MVT::i8, 2, |
| 5448 | /* 22098*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_32_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5449 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5450 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id2_load>> - Complexity = 13 |
| 5451 | // Dst: (VTX_READ_32_eg:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 2:{ *:[i8] }) |
| 5452 | /* 22107*/ /*Scope*/ 50, /*->22158*/ |
| 5453 | /* 22108*/ OPC_CheckPredicate, 6, // Predicate_az_extload |
| 5454 | /* 22110*/ OPC_Scope, 22, /*->22134*/ // 2 children in Scope |
| 5455 | /* 22112*/ OPC_CheckPredicate, 7, // Predicate_az_extloadi8 |
| 5456 | /* 22114*/ OPC_CheckPredicate, 12, // Predicate_vtx_id1_az_extloadi8 |
| 5457 | /* 22116*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5458 | /* 22118*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5459 | /* 22121*/ OPC_EmitMergeInputChains1_0, |
| 5460 | /* 22122*/ OPC_EmitInteger, MVT::i8, 1, |
| 5461 | /* 22125*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_8_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5462 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5463 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi8>><<P:Predicate_vtx_id1_az_extloadi8>> - Complexity = 13 |
| 5464 | // Dst: (VTX_READ_8_eg:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 1:{ *:[i8] }) |
| 5465 | /* 22134*/ /*Scope*/ 22, /*->22157*/ |
| 5466 | /* 22135*/ OPC_CheckPredicate, 9, // Predicate_az_extloadi16 |
| 5467 | /* 22137*/ OPC_CheckPredicate, 12, // Predicate_vtx_id1_az_extloadi16 |
| 5468 | /* 22139*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5469 | /* 22141*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5470 | /* 22144*/ OPC_EmitMergeInputChains1_0, |
| 5471 | /* 22145*/ OPC_EmitInteger, MVT::i8, 1, |
| 5472 | /* 22148*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_16_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5473 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5474 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi16>><<P:Predicate_vtx_id1_az_extloadi16>> - Complexity = 13 |
| 5475 | // Dst: (VTX_READ_16_eg:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 1:{ *:[i8] }) |
| 5476 | /* 22157*/ 0, /*End of Scope*/ |
| 5477 | /* 22158*/ /*Scope*/ 22, /*->22181*/ |
| 5478 | /* 22159*/ OPC_CheckPredicate, 10, // Predicate_load |
| 5479 | /* 22161*/ OPC_CheckPredicate, 12, // Predicate_vtx_id1_load |
| 5480 | /* 22163*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5481 | /* 22165*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5482 | /* 22168*/ OPC_EmitMergeInputChains1_0, |
| 5483 | /* 22169*/ OPC_EmitInteger, MVT::i8, 1, |
| 5484 | /* 22172*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_32_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5485 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5486 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id1_load>> - Complexity = 13 |
| 5487 | // Dst: (VTX_READ_32_eg:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 1:{ *:[i8] }) |
| 5488 | /* 22181*/ /*Scope*/ 50, /*->22232*/ |
| 5489 | /* 22182*/ OPC_CheckPredicate, 6, // Predicate_az_extload |
| 5490 | /* 22184*/ OPC_Scope, 22, /*->22208*/ // 2 children in Scope |
| 5491 | /* 22186*/ OPC_CheckPredicate, 7, // Predicate_az_extloadi8 |
| 5492 | /* 22188*/ OPC_CheckPredicate, 8, // Predicate_vtx_id3_az_extloadi8 |
| 5493 | /* 22190*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5494 | /* 22192*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5495 | /* 22195*/ OPC_EmitMergeInputChains1_0, |
| 5496 | /* 22196*/ OPC_EmitInteger, MVT::i8, 3, |
| 5497 | /* 22199*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_8_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5498 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5499 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi8>><<P:Predicate_vtx_id3_az_extloadi8>> - Complexity = 13 |
| 5500 | // Dst: (VTX_READ_8_cm:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 3:{ *:[i8] }) |
| 5501 | /* 22208*/ /*Scope*/ 22, /*->22231*/ |
| 5502 | /* 22209*/ OPC_CheckPredicate, 9, // Predicate_az_extloadi16 |
| 5503 | /* 22211*/ OPC_CheckPredicate, 8, // Predicate_vtx_id3_az_extloadi16 |
| 5504 | /* 22213*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5505 | /* 22215*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5506 | /* 22218*/ OPC_EmitMergeInputChains1_0, |
| 5507 | /* 22219*/ OPC_EmitInteger, MVT::i8, 3, |
| 5508 | /* 22222*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_16_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5509 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5510 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi16>><<P:Predicate_vtx_id3_az_extloadi16>> - Complexity = 13 |
| 5511 | // Dst: (VTX_READ_16_cm:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 3:{ *:[i8] }) |
| 5512 | /* 22231*/ 0, /*End of Scope*/ |
| 5513 | /* 22232*/ /*Scope*/ 22, /*->22255*/ |
| 5514 | /* 22233*/ OPC_CheckPredicate, 10, // Predicate_load |
| 5515 | /* 22235*/ OPC_CheckPredicate, 8, // Predicate_vtx_id3_load |
| 5516 | /* 22237*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5517 | /* 22239*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5518 | /* 22242*/ OPC_EmitMergeInputChains1_0, |
| 5519 | /* 22243*/ OPC_EmitInteger, MVT::i8, 3, |
| 5520 | /* 22246*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_32_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5521 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5522 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id3_load>> - Complexity = 13 |
| 5523 | // Dst: (VTX_READ_32_cm:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 3:{ *:[i8] }) |
| 5524 | /* 22255*/ /*Scope*/ 50, /*->22306*/ |
| 5525 | /* 22256*/ OPC_CheckPredicate, 6, // Predicate_az_extload |
| 5526 | /* 22258*/ OPC_Scope, 22, /*->22282*/ // 2 children in Scope |
| 5527 | /* 22260*/ OPC_CheckPredicate, 7, // Predicate_az_extloadi8 |
| 5528 | /* 22262*/ OPC_CheckPredicate, 11, // Predicate_vtx_id2_az_extloadi8 |
| 5529 | /* 22264*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5530 | /* 22266*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5531 | /* 22269*/ OPC_EmitMergeInputChains1_0, |
| 5532 | /* 22270*/ OPC_EmitInteger, MVT::i8, 2, |
| 5533 | /* 22273*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_8_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5534 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5535 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi8>><<P:Predicate_vtx_id2_az_extloadi8>> - Complexity = 13 |
| 5536 | // Dst: (VTX_READ_8_cm:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 2:{ *:[i8] }) |
| 5537 | /* 22282*/ /*Scope*/ 22, /*->22305*/ |
| 5538 | /* 22283*/ OPC_CheckPredicate, 9, // Predicate_az_extloadi16 |
| 5539 | /* 22285*/ OPC_CheckPredicate, 11, // Predicate_vtx_id2_az_extloadi16 |
| 5540 | /* 22287*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5541 | /* 22289*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5542 | /* 22292*/ OPC_EmitMergeInputChains1_0, |
| 5543 | /* 22293*/ OPC_EmitInteger, MVT::i8, 2, |
| 5544 | /* 22296*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_16_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5545 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5546 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi16>><<P:Predicate_vtx_id2_az_extloadi16>> - Complexity = 13 |
| 5547 | // Dst: (VTX_READ_16_cm:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 2:{ *:[i8] }) |
| 5548 | /* 22305*/ 0, /*End of Scope*/ |
| 5549 | /* 22306*/ /*Scope*/ 22, /*->22329*/ |
| 5550 | /* 22307*/ OPC_CheckPredicate, 10, // Predicate_load |
| 5551 | /* 22309*/ OPC_CheckPredicate, 11, // Predicate_vtx_id2_load |
| 5552 | /* 22311*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5553 | /* 22313*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5554 | /* 22316*/ OPC_EmitMergeInputChains1_0, |
| 5555 | /* 22317*/ OPC_EmitInteger, MVT::i8, 2, |
| 5556 | /* 22320*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_32_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5557 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5558 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id2_load>> - Complexity = 13 |
| 5559 | // Dst: (VTX_READ_32_cm:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 2:{ *:[i8] }) |
| 5560 | /* 22329*/ /*Scope*/ 50, /*->22380*/ |
| 5561 | /* 22330*/ OPC_CheckPredicate, 6, // Predicate_az_extload |
| 5562 | /* 22332*/ OPC_Scope, 22, /*->22356*/ // 2 children in Scope |
| 5563 | /* 22334*/ OPC_CheckPredicate, 7, // Predicate_az_extloadi8 |
| 5564 | /* 22336*/ OPC_CheckPredicate, 12, // Predicate_vtx_id1_az_extloadi8 |
| 5565 | /* 22338*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5566 | /* 22340*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5567 | /* 22343*/ OPC_EmitMergeInputChains1_0, |
| 5568 | /* 22344*/ OPC_EmitInteger, MVT::i8, 1, |
| 5569 | /* 22347*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_8_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5570 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5571 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi8>><<P:Predicate_vtx_id1_az_extloadi8>> - Complexity = 13 |
| 5572 | // Dst: (VTX_READ_8_cm:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 1:{ *:[i8] }) |
| 5573 | /* 22356*/ /*Scope*/ 22, /*->22379*/ |
| 5574 | /* 22357*/ OPC_CheckPredicate, 9, // Predicate_az_extloadi16 |
| 5575 | /* 22359*/ OPC_CheckPredicate, 12, // Predicate_vtx_id1_az_extloadi16 |
| 5576 | /* 22361*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5577 | /* 22363*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5578 | /* 22366*/ OPC_EmitMergeInputChains1_0, |
| 5579 | /* 22367*/ OPC_EmitInteger, MVT::i8, 1, |
| 5580 | /* 22370*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_16_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5581 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5582 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi16>><<P:Predicate_vtx_id1_az_extloadi16>> - Complexity = 13 |
| 5583 | // Dst: (VTX_READ_16_cm:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 1:{ *:[i8] }) |
| 5584 | /* 22379*/ 0, /*End of Scope*/ |
| 5585 | /* 22380*/ /*Scope*/ 22, /*->22403*/ |
| 5586 | /* 22381*/ OPC_CheckPredicate, 10, // Predicate_load |
| 5587 | /* 22383*/ OPC_CheckPredicate, 12, // Predicate_vtx_id1_load |
| 5588 | /* 22385*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5589 | /* 22387*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5590 | /* 22390*/ OPC_EmitMergeInputChains1_0, |
| 5591 | /* 22391*/ OPC_EmitInteger, MVT::i8, 1, |
| 5592 | /* 22394*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_32_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5593 | MVT::i32, 3/*#Ops*/, 2, 3, 4, |
| 5594 | // Src: (ld:{ *:[i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id1_load>> - Complexity = 13 |
| 5595 | // Dst: (VTX_READ_32_cm:{ *:[i32] } MEMxi:{ *:[i32] }:$src_gpr, 1:{ *:[i8] }) |
| 5596 | /* 22403*/ 0, /*End of Scope*/ |
| 5597 | /* 22404*/ /*Scope*/ 43, /*->22448*/ |
| 5598 | /* 22405*/ OPC_CheckPredicate, 13, // Predicate_load_local |
| 5599 | /* 22407*/ OPC_CheckType, MVT::i32, |
| 5600 | /* 22409*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5601 | /* 22411*/ OPC_EmitMergeInputChains1_0, |
| 5602 | /* 22412*/ OPC_EmitInteger, MVT::i32, 0, |
| 5603 | /* 22415*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5604 | /* 22427*/ OPC_EmitInteger, MVT::i32, 1, |
| 5605 | /* 22430*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5606 | /* 22433*/ OPC_EmitInteger, MVT::i32, 0, |
| 5607 | /* 22436*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_READ_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 5608 | MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, |
| 5609 | // Src: (ld:{ *:[i32] } R600_Reg32:{ *:[iPTR] }:$src0)<<P:Predicate_unindexedload>><<P:Predicate_load_local>> - Complexity = 4 |
| 5610 | // Dst: (LDS_READ_RET:{ *:[i32] } R600_Reg32:{ *:[iPTR] }:$src0) |
| 5611 | /* 22448*/ /*Scope*/ 80|128,3/*464*/, /*->22914*/ |
| 5612 | /* 22450*/ OPC_CheckChild1Type, MVT::i32, |
| 5613 | /* 22452*/ OPC_Scope, 45, /*->22499*/ // 5 children in Scope |
| 5614 | /* 22454*/ OPC_CheckPredicate, 14, // Predicate_sextload |
| 5615 | /* 22456*/ OPC_CheckPredicate, 15, // Predicate_sextloadi8_local |
| 5616 | /* 22458*/ OPC_CheckType, MVT::i32, |
| 5617 | /* 22460*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5618 | /* 22462*/ OPC_EmitMergeInputChains1_0, |
| 5619 | /* 22463*/ OPC_EmitInteger, MVT::i32, 0, |
| 5620 | /* 22466*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5621 | /* 22478*/ OPC_EmitInteger, MVT::i32, 1, |
| 5622 | /* 22481*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5623 | /* 22484*/ OPC_EmitInteger, MVT::i32, 0, |
| 5624 | /* 22487*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_BYTE_READ_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 5625 | MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, |
| 5626 | // Src: (ld:{ *:[i32] } i32:{ *:[i32] }:$src0)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8_local>> - Complexity = 4 |
| 5627 | // Dst: (LDS_BYTE_READ_RET:{ *:[i32] } i32:{ *:[i32] }:$src0) |
| 5628 | /* 22499*/ /*Scope*/ 45, /*->22545*/ |
| 5629 | /* 22500*/ OPC_CheckPredicate, 6, // Predicate_az_extload |
| 5630 | /* 22502*/ OPC_CheckPredicate, 7, // Predicate_az_extloadi8 |
| 5631 | /* 22504*/ OPC_CheckType, MVT::i32, |
| 5632 | /* 22506*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5633 | /* 22508*/ OPC_EmitMergeInputChains1_0, |
| 5634 | /* 22509*/ OPC_EmitInteger, MVT::i32, 0, |
| 5635 | /* 22512*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5636 | /* 22524*/ OPC_EmitInteger, MVT::i32, 1, |
| 5637 | /* 22527*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5638 | /* 22530*/ OPC_EmitInteger, MVT::i32, 0, |
| 5639 | /* 22533*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_UBYTE_READ_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 5640 | MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, |
| 5641 | // Src: (ld:{ *:[i32] } i32:{ *:[i32] }:$src0)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi8>> - Complexity = 4 |
| 5642 | // Dst: (LDS_UBYTE_READ_RET:{ *:[i32] } i32:{ *:[i32] }:$src0) |
| 5643 | /* 22545*/ /*Scope*/ 45, /*->22591*/ |
| 5644 | /* 22546*/ OPC_CheckPredicate, 14, // Predicate_sextload |
| 5645 | /* 22548*/ OPC_CheckPredicate, 16, // Predicate_sextloadi16_local |
| 5646 | /* 22550*/ OPC_CheckType, MVT::i32, |
| 5647 | /* 22552*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5648 | /* 22554*/ OPC_EmitMergeInputChains1_0, |
| 5649 | /* 22555*/ OPC_EmitInteger, MVT::i32, 0, |
| 5650 | /* 22558*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5651 | /* 22570*/ OPC_EmitInteger, MVT::i32, 1, |
| 5652 | /* 22573*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5653 | /* 22576*/ OPC_EmitInteger, MVT::i32, 0, |
| 5654 | /* 22579*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_SHORT_READ_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 5655 | MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, |
| 5656 | // Src: (ld:{ *:[i32] } i32:{ *:[i32] }:$src0)<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16_local>> - Complexity = 4 |
| 5657 | // Dst: (LDS_SHORT_READ_RET:{ *:[i32] } i32:{ *:[i32] }:$src0) |
| 5658 | /* 22591*/ /*Scope*/ 45, /*->22637*/ |
| 5659 | /* 22592*/ OPC_CheckPredicate, 6, // Predicate_az_extload |
| 5660 | /* 22594*/ OPC_CheckPredicate, 9, // Predicate_az_extloadi16 |
| 5661 | /* 22596*/ OPC_CheckType, MVT::i32, |
| 5662 | /* 22598*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5663 | /* 22600*/ OPC_EmitMergeInputChains1_0, |
| 5664 | /* 22601*/ OPC_EmitInteger, MVT::i32, 0, |
| 5665 | /* 22604*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5666 | /* 22616*/ OPC_EmitInteger, MVT::i32, 1, |
| 5667 | /* 22619*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5668 | /* 22622*/ OPC_EmitInteger, MVT::i32, 0, |
| 5669 | /* 22625*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_USHORT_READ_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 5670 | MVT::i32, 6/*#Ops*/, 1, 2, 3, 4, 5, 6, |
| 5671 | // Src: (ld:{ *:[i32] } i32:{ *:[i32] }:$src0)<<P:Predicate_unindexedload>><<P:Predicate_az_extload>><<P:Predicate_az_extloadi16>> - Complexity = 4 |
| 5672 | // Dst: (LDS_USHORT_READ_RET:{ *:[i32] } i32:{ *:[i32] }:$src0) |
| 5673 | /* 22637*/ /*Scope*/ 18|128,2/*274*/, /*->22913*/ |
| 5674 | /* 22639*/ OPC_CheckPredicate, 10, // Predicate_load |
| 5675 | /* 22641*/ OPC_Scope, 44, /*->22687*/ // 6 children in Scope |
| 5676 | /* 22643*/ OPC_CheckPredicate, 8, // Predicate_vtx_id3_load |
| 5677 | /* 22645*/ OPC_SwitchType /*2 cases */, 18, MVT::v2i32,// ->22666 |
| 5678 | /* 22648*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5679 | /* 22650*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5680 | /* 22653*/ OPC_EmitMergeInputChains1_0, |
| 5681 | /* 22654*/ OPC_EmitInteger, MVT::i8, 3, |
| 5682 | /* 22657*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_64_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5683 | MVT::v2i32, 3/*#Ops*/, 2, 3, 4, |
| 5684 | // Src: (ld:{ *:[v2i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id3_load>> - Complexity = 13 |
| 5685 | // Dst: (VTX_READ_64_eg:{ *:[v2i32] } MEMxi:{ *:[i32] }:$src_gpr, 3:{ *:[i8] }) |
| 5686 | /* 22666*/ /*SwitchType*/ 18, MVT::v4i32,// ->22686 |
| 5687 | /* 22668*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5688 | /* 22670*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5689 | /* 22673*/ OPC_EmitMergeInputChains1_0, |
| 5690 | /* 22674*/ OPC_EmitInteger, MVT::i8, 3, |
| 5691 | /* 22677*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_128_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5692 | MVT::v4i32, 3/*#Ops*/, 2, 3, 4, |
| 5693 | // Src: (ld:{ *:[v4i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id3_load>> - Complexity = 13 |
| 5694 | // Dst: (VTX_READ_128_eg:{ *:[v4i32] } MEMxi:{ *:[i32] }:$src_gpr, 3:{ *:[i8] }) |
| 5695 | /* 22686*/ 0, // EndSwitchType |
| 5696 | /* 22687*/ /*Scope*/ 44, /*->22732*/ |
| 5697 | /* 22688*/ OPC_CheckPredicate, 11, // Predicate_vtx_id2_load |
| 5698 | /* 22690*/ OPC_SwitchType /*2 cases */, 18, MVT::v2i32,// ->22711 |
| 5699 | /* 22693*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5700 | /* 22695*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5701 | /* 22698*/ OPC_EmitMergeInputChains1_0, |
| 5702 | /* 22699*/ OPC_EmitInteger, MVT::i8, 2, |
| 5703 | /* 22702*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_64_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5704 | MVT::v2i32, 3/*#Ops*/, 2, 3, 4, |
| 5705 | // Src: (ld:{ *:[v2i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id2_load>> - Complexity = 13 |
| 5706 | // Dst: (VTX_READ_64_eg:{ *:[v2i32] } MEMxi:{ *:[i32] }:$src_gpr, 2:{ *:[i8] }) |
| 5707 | /* 22711*/ /*SwitchType*/ 18, MVT::v4i32,// ->22731 |
| 5708 | /* 22713*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5709 | /* 22715*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5710 | /* 22718*/ OPC_EmitMergeInputChains1_0, |
| 5711 | /* 22719*/ OPC_EmitInteger, MVT::i8, 2, |
| 5712 | /* 22722*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_128_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5713 | MVT::v4i32, 3/*#Ops*/, 2, 3, 4, |
| 5714 | // Src: (ld:{ *:[v4i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id2_load>> - Complexity = 13 |
| 5715 | // Dst: (VTX_READ_128_eg:{ *:[v4i32] } MEMxi:{ *:[i32] }:$src_gpr, 2:{ *:[i8] }) |
| 5716 | /* 22731*/ 0, // EndSwitchType |
| 5717 | /* 22732*/ /*Scope*/ 44, /*->22777*/ |
| 5718 | /* 22733*/ OPC_CheckPredicate, 12, // Predicate_vtx_id1_load |
| 5719 | /* 22735*/ OPC_SwitchType /*2 cases */, 18, MVT::v2i32,// ->22756 |
| 5720 | /* 22738*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5721 | /* 22740*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5722 | /* 22743*/ OPC_EmitMergeInputChains1_0, |
| 5723 | /* 22744*/ OPC_EmitInteger, MVT::i8, 1, |
| 5724 | /* 22747*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_64_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5725 | MVT::v2i32, 3/*#Ops*/, 2, 3, 4, |
| 5726 | // Src: (ld:{ *:[v2i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id1_load>> - Complexity = 13 |
| 5727 | // Dst: (VTX_READ_64_eg:{ *:[v2i32] } MEMxi:{ *:[i32] }:$src_gpr, 1:{ *:[i8] }) |
| 5728 | /* 22756*/ /*SwitchType*/ 18, MVT::v4i32,// ->22776 |
| 5729 | /* 22758*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 5730 | /* 22760*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5731 | /* 22763*/ OPC_EmitMergeInputChains1_0, |
| 5732 | /* 22764*/ OPC_EmitInteger, MVT::i8, 1, |
| 5733 | /* 22767*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_128_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5734 | MVT::v4i32, 3/*#Ops*/, 2, 3, 4, |
| 5735 | // Src: (ld:{ *:[v4i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id1_load>> - Complexity = 13 |
| 5736 | // Dst: (VTX_READ_128_eg:{ *:[v4i32] } MEMxi:{ *:[i32] }:$src_gpr, 1:{ *:[i8] }) |
| 5737 | /* 22776*/ 0, // EndSwitchType |
| 5738 | /* 22777*/ /*Scope*/ 44, /*->22822*/ |
| 5739 | /* 22778*/ OPC_CheckPredicate, 8, // Predicate_vtx_id3_load |
| 5740 | /* 22780*/ OPC_SwitchType /*2 cases */, 18, MVT::v2i32,// ->22801 |
| 5741 | /* 22783*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5742 | /* 22785*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5743 | /* 22788*/ OPC_EmitMergeInputChains1_0, |
| 5744 | /* 22789*/ OPC_EmitInteger, MVT::i8, 3, |
| 5745 | /* 22792*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_64_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5746 | MVT::v2i32, 3/*#Ops*/, 2, 3, 4, |
| 5747 | // Src: (ld:{ *:[v2i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id3_load>> - Complexity = 13 |
| 5748 | // Dst: (VTX_READ_64_cm:{ *:[v2i32] } MEMxi:{ *:[i32] }:$src_gpr, 3:{ *:[i8] }) |
| 5749 | /* 22801*/ /*SwitchType*/ 18, MVT::v4i32,// ->22821 |
| 5750 | /* 22803*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5751 | /* 22805*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5752 | /* 22808*/ OPC_EmitMergeInputChains1_0, |
| 5753 | /* 22809*/ OPC_EmitInteger, MVT::i8, 3, |
| 5754 | /* 22812*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_128_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5755 | MVT::v4i32, 3/*#Ops*/, 2, 3, 4, |
| 5756 | // Src: (ld:{ *:[v4i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id3_load>> - Complexity = 13 |
| 5757 | // Dst: (VTX_READ_128_cm:{ *:[v4i32] } MEMxi:{ *:[i32] }:$src_gpr, 3:{ *:[i8] }) |
| 5758 | /* 22821*/ 0, // EndSwitchType |
| 5759 | /* 22822*/ /*Scope*/ 44, /*->22867*/ |
| 5760 | /* 22823*/ OPC_CheckPredicate, 11, // Predicate_vtx_id2_load |
| 5761 | /* 22825*/ OPC_SwitchType /*2 cases */, 18, MVT::v2i32,// ->22846 |
| 5762 | /* 22828*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5763 | /* 22830*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5764 | /* 22833*/ OPC_EmitMergeInputChains1_0, |
| 5765 | /* 22834*/ OPC_EmitInteger, MVT::i8, 2, |
| 5766 | /* 22837*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_64_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5767 | MVT::v2i32, 3/*#Ops*/, 2, 3, 4, |
| 5768 | // Src: (ld:{ *:[v2i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id2_load>> - Complexity = 13 |
| 5769 | // Dst: (VTX_READ_64_cm:{ *:[v2i32] } MEMxi:{ *:[i32] }:$src_gpr, 2:{ *:[i8] }) |
| 5770 | /* 22846*/ /*SwitchType*/ 18, MVT::v4i32,// ->22866 |
| 5771 | /* 22848*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5772 | /* 22850*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5773 | /* 22853*/ OPC_EmitMergeInputChains1_0, |
| 5774 | /* 22854*/ OPC_EmitInteger, MVT::i8, 2, |
| 5775 | /* 22857*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_128_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5776 | MVT::v4i32, 3/*#Ops*/, 2, 3, 4, |
| 5777 | // Src: (ld:{ *:[v4i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id2_load>> - Complexity = 13 |
| 5778 | // Dst: (VTX_READ_128_cm:{ *:[v4i32] } MEMxi:{ *:[i32] }:$src_gpr, 2:{ *:[i8] }) |
| 5779 | /* 22866*/ 0, // EndSwitchType |
| 5780 | /* 22867*/ /*Scope*/ 44, /*->22912*/ |
| 5781 | /* 22868*/ OPC_CheckPredicate, 12, // Predicate_vtx_id1_load |
| 5782 | /* 22870*/ OPC_SwitchType /*2 cases */, 18, MVT::v2i32,// ->22891 |
| 5783 | /* 22873*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5784 | /* 22875*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5785 | /* 22878*/ OPC_EmitMergeInputChains1_0, |
| 5786 | /* 22879*/ OPC_EmitInteger, MVT::i8, 1, |
| 5787 | /* 22882*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_64_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5788 | MVT::v2i32, 3/*#Ops*/, 2, 3, 4, |
| 5789 | // Src: (ld:{ *:[v2i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id1_load>> - Complexity = 13 |
| 5790 | // Dst: (VTX_READ_64_cm:{ *:[v2i32] } MEMxi:{ *:[i32] }:$src_gpr, 1:{ *:[i8] }) |
| 5791 | /* 22891*/ /*SwitchType*/ 18, MVT::v4i32,// ->22911 |
| 5792 | /* 22893*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5793 | /* 22895*/ OPC_CheckComplexPat, /*CP*/1, /*#*/1, // SelectADDRVTX_READ:$src_gpr #2 #3 |
| 5794 | /* 22898*/ OPC_EmitMergeInputChains1_0, |
| 5795 | /* 22899*/ OPC_EmitInteger, MVT::i8, 1, |
| 5796 | /* 22902*/ OPC_MorphNodeTo1, TARGET_VAL(R600::VTX_READ_128_cm), 0|OPFL_Chain|OPFL_MemRefs, |
| 5797 | MVT::v4i32, 3/*#Ops*/, 2, 3, 4, |
| 5798 | // Src: (ld:{ *:[v4i32] } ADDRVTX_READ:{ *:[i32] }:$src_gpr)<<P:Predicate_unindexedload>><<P:Predicate_load>><<P:Predicate_vtx_id1_load>> - Complexity = 13 |
| 5799 | // Dst: (VTX_READ_128_cm:{ *:[v4i32] } MEMxi:{ *:[i32] }:$src_gpr, 1:{ *:[i8] }) |
| 5800 | /* 22911*/ 0, // EndSwitchType |
| 5801 | /* 22912*/ 0, /*End of Scope*/ |
| 5802 | /* 22913*/ 0, /*End of Scope*/ |
| 5803 | /* 22914*/ 0, /*End of Scope*/ |
| 5804 | /* 22915*/ /*SwitchOpcode*/ 74|128,2/*330*/, TARGET_VAL(ISD::STORE),// ->23249 |
| 5805 | /* 22919*/ OPC_RecordMemRef, |
| 5806 | /* 22920*/ OPC_RecordNode, // #0 = 'st' chained node |
| 5807 | /* 22921*/ OPC_RecordChild1, // #1 = $val |
| 5808 | /* 22922*/ OPC_Scope, 119|128,1/*247*/, /*->23172*/ // 3 children in Scope |
| 5809 | /* 22925*/ OPC_CheckChild1Type, MVT::i32, |
| 5810 | /* 22927*/ OPC_RecordChild2, // #2 = $addr |
| 5811 | /* 22928*/ OPC_CheckPredicate, 17, // Predicate_unindexedstore |
| 5812 | /* 22930*/ OPC_Scope, 20, /*->22952*/ // 3 children in Scope |
| 5813 | /* 22932*/ OPC_CheckPredicate, 18, // Predicate_store_private |
| 5814 | /* 22934*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5815 | /* 22936*/ OPC_CheckComplexPat, /*CP*/0, /*#*/2, // SelectADDRIndirect:$addr #3 #4 |
| 5816 | /* 22939*/ OPC_EmitMergeInputChains1_0, |
| 5817 | /* 22940*/ OPC_EmitInteger, MVT::i32, 0, |
| 5818 | /* 22943*/ OPC_MorphNodeTo0, TARGET_VAL(R600::R600_RegisterStore), 0|OPFL_Chain|OPFL_MemRefs, |
| 5819 | 4/*#Ops*/, 1, 3, 4, 5, |
| 5820 | // Src: (st i32:{ *:[i32] }:$val, ADDRIndirect:{ *:[iPTR] }:$addr)<<P:Predicate_unindexedstore>><<P:Predicate_store_private>> - Complexity = 13 |
| 5821 | // Dst: (R600_RegisterStore i32:{ *:[i32] }:$val, FRAMEri:{ *:[iPTR] }:$addr, 0:{ *:[i32] }) |
| 5822 | /* 22952*/ /*Scope*/ 58, /*->23011*/ |
| 5823 | /* 22953*/ OPC_CheckPredicate, 19, // Predicate_store_local |
| 5824 | /* 22955*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5825 | /* 22957*/ OPC_EmitMergeInputChains1_0, |
| 5826 | /* 22958*/ OPC_EmitInteger, MVT::i32, 0, |
| 5827 | /* 22961*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5828 | /* 22973*/ OPC_EmitInteger, MVT::i32, 0, |
| 5829 | /* 22976*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5830 | /* 22988*/ OPC_EmitInteger, MVT::i32, 1, |
| 5831 | /* 22991*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5832 | /* 22994*/ OPC_EmitInteger, MVT::i32, 0, |
| 5833 | /* 22997*/ OPC_MorphNodeTo0, TARGET_VAL(R600::LDS_WRITE), 0|OPFL_Chain|OPFL_MemRefs, |
| 5834 | 9/*#Ops*/, 2, 3, 4, 1, 5, 6, 7, 8, 9, |
| 5835 | // Src: (st R600_Reg32:{ *:[i32] }:$src1, R600_Reg32:{ *:[iPTR] }:$src0)<<P:Predicate_unindexedstore>><<P:Predicate_store_local>> - Complexity = 4 |
| 5836 | // Dst: (LDS_WRITE R600_Reg32:{ *:[iPTR] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 5837 | /* 23011*/ /*Scope*/ 30|128,1/*158*/, /*->23171*/ |
| 5838 | /* 23013*/ OPC_CheckChild2Type, MVT::i32, |
| 5839 | /* 23015*/ OPC_Scope, 122, /*->23139*/ // 2 children in Scope |
| 5840 | /* 23017*/ OPC_CheckPredicate, 20, // Predicate_truncstore |
| 5841 | /* 23019*/ OPC_Scope, 58, /*->23079*/ // 2 children in Scope |
| 5842 | /* 23021*/ OPC_CheckPredicate, 15, // Predicate_truncstorei8_local |
| 5843 | /* 23023*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5844 | /* 23025*/ OPC_EmitMergeInputChains1_0, |
| 5845 | /* 23026*/ OPC_EmitInteger, MVT::i32, 0, |
| 5846 | /* 23029*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5847 | /* 23041*/ OPC_EmitInteger, MVT::i32, 0, |
| 5848 | /* 23044*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5849 | /* 23056*/ OPC_EmitInteger, MVT::i32, 1, |
| 5850 | /* 23059*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5851 | /* 23062*/ OPC_EmitInteger, MVT::i32, 0, |
| 5852 | /* 23065*/ OPC_MorphNodeTo0, TARGET_VAL(R600::LDS_BYTE_WRITE), 0|OPFL_Chain|OPFL_MemRefs, |
| 5853 | 9/*#Ops*/, 2, 3, 4, 1, 5, 6, 7, 8, 9, |
| 5854 | // Src: (st i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src0)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8_local>> - Complexity = 4 |
| 5855 | // Dst: (LDS_BYTE_WRITE i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 5856 | /* 23079*/ /*Scope*/ 58, /*->23138*/ |
| 5857 | /* 23080*/ OPC_CheckPredicate, 16, // Predicate_truncstorei16_local |
| 5858 | /* 23082*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5859 | /* 23084*/ OPC_EmitMergeInputChains1_0, |
| 5860 | /* 23085*/ OPC_EmitInteger, MVT::i32, 0, |
| 5861 | /* 23088*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5862 | /* 23100*/ OPC_EmitInteger, MVT::i32, 0, |
| 5863 | /* 23103*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5864 | /* 23115*/ OPC_EmitInteger, MVT::i32, 1, |
| 5865 | /* 23118*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5866 | /* 23121*/ OPC_EmitInteger, MVT::i32, 0, |
| 5867 | /* 23124*/ OPC_MorphNodeTo0, TARGET_VAL(R600::LDS_SHORT_WRITE), 0|OPFL_Chain|OPFL_MemRefs, |
| 5868 | 9/*#Ops*/, 2, 3, 4, 1, 5, 6, 7, 8, 9, |
| 5869 | // Src: (st i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src0)<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16_local>> - Complexity = 4 |
| 5870 | // Dst: (LDS_SHORT_WRITE i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 5871 | /* 23138*/ 0, /*End of Scope*/ |
| 5872 | /* 23139*/ /*Scope*/ 30, /*->23170*/ |
| 5873 | /* 23140*/ OPC_CheckPredicate, 21, // Predicate_store_global |
| 5874 | /* 23142*/ OPC_Scope, 10, /*->23154*/ // 2 children in Scope |
| 5875 | /* 23144*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5876 | /* 23146*/ OPC_EmitMergeInputChains1_0, |
| 5877 | /* 23147*/ OPC_MorphNodeTo0, TARGET_VAL(R600::RAT_STORE_DWORD32), 0|OPFL_Chain|OPFL_MemRefs, |
| 5878 | 2/*#Ops*/, 1, 2, |
| 5879 | // Src: (st i32:{ *:[i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr)<<P:Predicate_unindexedstore>><<P:Predicate_store_global>> - Complexity = 4 |
| 5880 | // Dst: (RAT_STORE_DWORD32 i32:{ *:[i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr) |
| 5881 | /* 23154*/ /*Scope*/ 14, /*->23169*/ |
| 5882 | /* 23155*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5883 | /* 23157*/ OPC_EmitMergeInputChains1_0, |
| 5884 | /* 23158*/ OPC_EmitInteger, MVT::i32, 0, |
| 5885 | /* 23161*/ OPC_MorphNodeTo0, TARGET_VAL(R600::RAT_WRITE_CACHELESS_32_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5886 | 3/*#Ops*/, 1, 2, 3, |
| 5887 | // Src: (st i32:{ *:[i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr)<<P:Predicate_unindexedstore>><<P:Predicate_store_global>> - Complexity = 4 |
| 5888 | // Dst: (RAT_WRITE_CACHELESS_32_eg i32:{ *:[i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr) |
| 5889 | /* 23169*/ 0, /*End of Scope*/ |
| 5890 | /* 23170*/ 0, /*End of Scope*/ |
| 5891 | /* 23171*/ 0, /*End of Scope*/ |
| 5892 | /* 23172*/ /*Scope*/ 37, /*->23210*/ |
| 5893 | /* 23173*/ OPC_CheckChild1Type, MVT::v2i32, |
| 5894 | /* 23175*/ OPC_RecordChild2, // #2 = $index_gpr |
| 5895 | /* 23176*/ OPC_CheckChild2Type, MVT::i32, |
| 5896 | /* 23178*/ OPC_CheckPredicate, 17, // Predicate_unindexedstore |
| 5897 | /* 23180*/ OPC_CheckPredicate, 21, // Predicate_store_global |
| 5898 | /* 23182*/ OPC_Scope, 10, /*->23194*/ // 2 children in Scope |
| 5899 | /* 23184*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5900 | /* 23186*/ OPC_EmitMergeInputChains1_0, |
| 5901 | /* 23187*/ OPC_MorphNodeTo0, TARGET_VAL(R600::RAT_STORE_DWORD64), 0|OPFL_Chain|OPFL_MemRefs, |
| 5902 | 2/*#Ops*/, 1, 2, |
| 5903 | // Src: (st v2i32:{ *:[v2i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr)<<P:Predicate_unindexedstore>><<P:Predicate_store_global>> - Complexity = 4 |
| 5904 | // Dst: (RAT_STORE_DWORD64 v2i32:{ *:[v2i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr) |
| 5905 | /* 23194*/ /*Scope*/ 14, /*->23209*/ |
| 5906 | /* 23195*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5907 | /* 23197*/ OPC_EmitMergeInputChains1_0, |
| 5908 | /* 23198*/ OPC_EmitInteger, MVT::i32, 0, |
| 5909 | /* 23201*/ OPC_MorphNodeTo0, TARGET_VAL(R600::RAT_WRITE_CACHELESS_64_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5910 | 3/*#Ops*/, 1, 2, 3, |
| 5911 | // Src: (st v2i32:{ *:[v2i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr)<<P:Predicate_unindexedstore>><<P:Predicate_store_global>> - Complexity = 4 |
| 5912 | // Dst: (RAT_WRITE_CACHELESS_64_eg v2i32:{ *:[v2i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr) |
| 5913 | /* 23209*/ 0, /*End of Scope*/ |
| 5914 | /* 23210*/ /*Scope*/ 37, /*->23248*/ |
| 5915 | /* 23211*/ OPC_CheckChild1Type, MVT::v4i32, |
| 5916 | /* 23213*/ OPC_RecordChild2, // #2 = $index_gpr |
| 5917 | /* 23214*/ OPC_CheckChild2Type, MVT::i32, |
| 5918 | /* 23216*/ OPC_CheckPredicate, 17, // Predicate_unindexedstore |
| 5919 | /* 23218*/ OPC_CheckPredicate, 21, // Predicate_store_global |
| 5920 | /* 23220*/ OPC_Scope, 10, /*->23232*/ // 2 children in Scope |
| 5921 | /* 23222*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5922 | /* 23224*/ OPC_EmitMergeInputChains1_0, |
| 5923 | /* 23225*/ OPC_MorphNodeTo0, TARGET_VAL(R600::RAT_STORE_DWORD128), 0|OPFL_Chain|OPFL_MemRefs, |
| 5924 | 2/*#Ops*/, 1, 2, |
| 5925 | // Src: (st v4i32:{ *:[v4i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr)<<P:Predicate_unindexedstore>><<P:Predicate_store_global>> - Complexity = 4 |
| 5926 | // Dst: (RAT_STORE_DWORD128 v4i32:{ *:[v4i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr) |
| 5927 | /* 23232*/ /*Scope*/ 14, /*->23247*/ |
| 5928 | /* 23233*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5929 | /* 23235*/ OPC_EmitMergeInputChains1_0, |
| 5930 | /* 23236*/ OPC_EmitInteger, MVT::i32, 0, |
| 5931 | /* 23239*/ OPC_MorphNodeTo0, TARGET_VAL(R600::RAT_WRITE_CACHELESS_128_eg), 0|OPFL_Chain|OPFL_MemRefs, |
| 5932 | 3/*#Ops*/, 1, 2, 3, |
| 5933 | // Src: (st v4i32:{ *:[v4i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr)<<P:Predicate_unindexedstore>><<P:Predicate_store_global>> - Complexity = 4 |
| 5934 | // Dst: (RAT_WRITE_CACHELESS_128_eg v4i32:{ *:[v4i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr) |
| 5935 | /* 23247*/ 0, /*End of Scope*/ |
| 5936 | /* 23248*/ 0, /*End of Scope*/ |
| 5937 | /* 23249*/ /*SwitchOpcode*/ 90|128,7/*986*/, TARGET_VAL(ISD::ADD),// ->24239 |
| 5938 | /* 23253*/ OPC_Scope, 90|128,1/*218*/, /*->23474*/ // 4 children in Scope |
| 5939 | /* 23256*/ OPC_MoveChild0, |
| 5940 | /* 23257*/ OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_WO_CHAIN), |
| 5941 | /* 23260*/ OPC_Scope, 105, /*->23367*/ // 2 children in Scope |
| 5942 | /* 23262*/ OPC_CheckChild0Integer, 88|128,13/*1752*/, |
| 5943 | /* 23265*/ OPC_RecordChild1, // #0 = $src0 |
| 5944 | /* 23266*/ OPC_RecordChild2, // #1 = $src1 |
| 5945 | /* 23267*/ OPC_MoveParent, |
| 5946 | /* 23268*/ OPC_RecordChild1, // #2 = $src2 |
| 5947 | /* 23269*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 5948 | /* 23271*/ OPC_EmitInteger, MVT::i32, 0, |
| 5949 | /* 23274*/ OPC_EmitInteger, MVT::i32, 0, |
| 5950 | /* 23277*/ OPC_EmitInteger, MVT::i32, 0, |
| 5951 | /* 23280*/ OPC_EmitInteger, MVT::i32, 0, |
| 5952 | /* 23283*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5953 | /* 23295*/ OPC_EmitInteger, MVT::i32, 0, |
| 5954 | /* 23298*/ OPC_EmitInteger, MVT::i32, 0, |
| 5955 | /* 23301*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5956 | /* 23313*/ OPC_EmitInteger, MVT::i32, 0, |
| 5957 | /* 23316*/ OPC_EmitInteger, MVT::i32, 0, |
| 5958 | /* 23319*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5959 | /* 23331*/ OPC_EmitInteger, MVT::i32, 1, |
| 5960 | /* 23334*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5961 | /* 23337*/ OPC_EmitInteger, MVT::i32, 0, |
| 5962 | /* 23340*/ OPC_EmitInteger, MVT::i32, 0, |
| 5963 | /* 23343*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_UINT24_eg), 0, |
| 5964 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 5965 | // Src: (add:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 1752:{ *:[iPTR] }, i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1), i32:{ *:[i32] }:$src2) - Complexity = 13 |
| 5966 | // Dst: (MULADD_UINT24_eg:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1, ?:{ *:[i32] }:$src2) |
| 5967 | /* 23367*/ /*Scope*/ 105, /*->23473*/ |
| 5968 | /* 23368*/ OPC_CheckChild0Integer, 87|128,13/*1751*/, |
| 5969 | /* 23371*/ OPC_RecordChild1, // #0 = $src0 |
| 5970 | /* 23372*/ OPC_RecordChild2, // #1 = $src1 |
| 5971 | /* 23373*/ OPC_MoveParent, |
| 5972 | /* 23374*/ OPC_RecordChild1, // #2 = $src2 |
| 5973 | /* 23375*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 5974 | /* 23377*/ OPC_EmitInteger, MVT::i32, 0, |
| 5975 | /* 23380*/ OPC_EmitInteger, MVT::i32, 0, |
| 5976 | /* 23383*/ OPC_EmitInteger, MVT::i32, 0, |
| 5977 | /* 23386*/ OPC_EmitInteger, MVT::i32, 0, |
| 5978 | /* 23389*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5979 | /* 23401*/ OPC_EmitInteger, MVT::i32, 0, |
| 5980 | /* 23404*/ OPC_EmitInteger, MVT::i32, 0, |
| 5981 | /* 23407*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5982 | /* 23419*/ OPC_EmitInteger, MVT::i32, 0, |
| 5983 | /* 23422*/ OPC_EmitInteger, MVT::i32, 0, |
| 5984 | /* 23425*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 5985 | /* 23437*/ OPC_EmitInteger, MVT::i32, 1, |
| 5986 | /* 23440*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 5987 | /* 23443*/ OPC_EmitInteger, MVT::i32, 0, |
| 5988 | /* 23446*/ OPC_EmitInteger, MVT::i32, 0, |
| 5989 | /* 23449*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_INT24_cm), 0, |
| 5990 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 5991 | // Src: (add:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 1751:{ *:[iPTR] }, i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1), i32:{ *:[i32] }:$src2) - Complexity = 13 |
| 5992 | // Dst: (MULADD_INT24_cm:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1, ?:{ *:[i32] }:$src2) |
| 5993 | /* 23473*/ 0, /*End of Scope*/ |
| 5994 | /* 23474*/ /*Scope*/ 89|128,1/*217*/, /*->23693*/ |
| 5995 | /* 23476*/ OPC_RecordChild0, // #0 = $src2 |
| 5996 | /* 23477*/ OPC_MoveChild1, |
| 5997 | /* 23478*/ OPC_CheckOpcode, TARGET_VAL(ISD::INTRINSIC_WO_CHAIN), |
| 5998 | /* 23481*/ OPC_Scope, 104, /*->23587*/ // 2 children in Scope |
| 5999 | /* 23483*/ OPC_CheckChild0Integer, 88|128,13/*1752*/, |
| 6000 | /* 23486*/ OPC_RecordChild1, // #1 = $src0 |
| 6001 | /* 23487*/ OPC_RecordChild2, // #2 = $src1 |
| 6002 | /* 23488*/ OPC_MoveParent, |
| 6003 | /* 23489*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6004 | /* 23491*/ OPC_EmitInteger, MVT::i32, 0, |
| 6005 | /* 23494*/ OPC_EmitInteger, MVT::i32, 0, |
| 6006 | /* 23497*/ OPC_EmitInteger, MVT::i32, 0, |
| 6007 | /* 23500*/ OPC_EmitInteger, MVT::i32, 0, |
| 6008 | /* 23503*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6009 | /* 23515*/ OPC_EmitInteger, MVT::i32, 0, |
| 6010 | /* 23518*/ OPC_EmitInteger, MVT::i32, 0, |
| 6011 | /* 23521*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6012 | /* 23533*/ OPC_EmitInteger, MVT::i32, 0, |
| 6013 | /* 23536*/ OPC_EmitInteger, MVT::i32, 0, |
| 6014 | /* 23539*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6015 | /* 23551*/ OPC_EmitInteger, MVT::i32, 1, |
| 6016 | /* 23554*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6017 | /* 23557*/ OPC_EmitInteger, MVT::i32, 0, |
| 6018 | /* 23560*/ OPC_EmitInteger, MVT::i32, 0, |
| 6019 | /* 23563*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_UINT24_eg), 0, |
| 6020 | MVT::i32, 18/*#Ops*/, 3, 4, 1, 5, 6, 7, 2, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 6021 | // Src: (add:{ *:[i32] } i32:{ *:[i32] }:$src2, (intrinsic_wo_chain:{ *:[i32] } 1752:{ *:[iPTR] }, i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)) - Complexity = 13 |
| 6022 | // Dst: (MULADD_UINT24_eg:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1, ?:{ *:[i32] }:$src2) |
| 6023 | /* 23587*/ /*Scope*/ 104, /*->23692*/ |
| 6024 | /* 23588*/ OPC_CheckChild0Integer, 87|128,13/*1751*/, |
| 6025 | /* 23591*/ OPC_RecordChild1, // #1 = $src0 |
| 6026 | /* 23592*/ OPC_RecordChild2, // #2 = $src1 |
| 6027 | /* 23593*/ OPC_MoveParent, |
| 6028 | /* 23594*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 6029 | /* 23596*/ OPC_EmitInteger, MVT::i32, 0, |
| 6030 | /* 23599*/ OPC_EmitInteger, MVT::i32, 0, |
| 6031 | /* 23602*/ OPC_EmitInteger, MVT::i32, 0, |
| 6032 | /* 23605*/ OPC_EmitInteger, MVT::i32, 0, |
| 6033 | /* 23608*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6034 | /* 23620*/ OPC_EmitInteger, MVT::i32, 0, |
| 6035 | /* 23623*/ OPC_EmitInteger, MVT::i32, 0, |
| 6036 | /* 23626*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6037 | /* 23638*/ OPC_EmitInteger, MVT::i32, 0, |
| 6038 | /* 23641*/ OPC_EmitInteger, MVT::i32, 0, |
| 6039 | /* 23644*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6040 | /* 23656*/ OPC_EmitInteger, MVT::i32, 1, |
| 6041 | /* 23659*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6042 | /* 23662*/ OPC_EmitInteger, MVT::i32, 0, |
| 6043 | /* 23665*/ OPC_EmitInteger, MVT::i32, 0, |
| 6044 | /* 23668*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_INT24_cm), 0, |
| 6045 | MVT::i32, 18/*#Ops*/, 3, 4, 1, 5, 6, 7, 2, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 6046 | // Src: (add:{ *:[i32] } i32:{ *:[i32] }:$src2, (intrinsic_wo_chain:{ *:[i32] } 1751:{ *:[iPTR] }, i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)) - Complexity = 13 |
| 6047 | // Dst: (MULADD_INT24_cm:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1, ?:{ *:[i32] }:$src2) |
| 6048 | /* 23692*/ 0, /*End of Scope*/ |
| 6049 | /* 23693*/ /*Scope*/ 89|128,1/*217*/, /*->23912*/ |
| 6050 | /* 23695*/ OPC_MoveChild0, |
| 6051 | /* 23696*/ OPC_SwitchOpcode /*2 cases */, 104, TARGET_VAL(AMDGPUISD::MUL_U24),// ->23804 |
| 6052 | /* 23700*/ OPC_RecordChild0, // #0 = $src0 |
| 6053 | /* 23701*/ OPC_RecordChild1, // #1 = $src1 |
| 6054 | /* 23702*/ OPC_MoveParent, |
| 6055 | /* 23703*/ OPC_RecordChild1, // #2 = $src2 |
| 6056 | /* 23704*/ OPC_CheckType, MVT::i32, |
| 6057 | /* 23706*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6058 | /* 23708*/ OPC_EmitInteger, MVT::i32, 0, |
| 6059 | /* 23711*/ OPC_EmitInteger, MVT::i32, 0, |
| 6060 | /* 23714*/ OPC_EmitInteger, MVT::i32, 0, |
| 6061 | /* 23717*/ OPC_EmitInteger, MVT::i32, 0, |
| 6062 | /* 23720*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6063 | /* 23732*/ OPC_EmitInteger, MVT::i32, 0, |
| 6064 | /* 23735*/ OPC_EmitInteger, MVT::i32, 0, |
| 6065 | /* 23738*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6066 | /* 23750*/ OPC_EmitInteger, MVT::i32, 0, |
| 6067 | /* 23753*/ OPC_EmitInteger, MVT::i32, 0, |
| 6068 | /* 23756*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6069 | /* 23768*/ OPC_EmitInteger, MVT::i32, 1, |
| 6070 | /* 23771*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6071 | /* 23774*/ OPC_EmitInteger, MVT::i32, 0, |
| 6072 | /* 23777*/ OPC_EmitInteger, MVT::i32, 0, |
| 6073 | /* 23780*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_UINT24_eg), 0, |
| 6074 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 6075 | // Src: (add:{ *:[i32] } (AMDGPUmul_u24_impl:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1), i32:{ *:[i32] }:$src2) - Complexity = 8 |
| 6076 | // Dst: (MULADD_UINT24_eg:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1, ?:{ *:[i32] }:$src2) |
| 6077 | /* 23804*/ /*SwitchOpcode*/ 104, TARGET_VAL(AMDGPUISD::MUL_I24),// ->23911 |
| 6078 | /* 23807*/ OPC_RecordChild0, // #0 = $src0 |
| 6079 | /* 23808*/ OPC_RecordChild1, // #1 = $src1 |
| 6080 | /* 23809*/ OPC_MoveParent, |
| 6081 | /* 23810*/ OPC_RecordChild1, // #2 = $src2 |
| 6082 | /* 23811*/ OPC_CheckType, MVT::i32, |
| 6083 | /* 23813*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 6084 | /* 23815*/ OPC_EmitInteger, MVT::i32, 0, |
| 6085 | /* 23818*/ OPC_EmitInteger, MVT::i32, 0, |
| 6086 | /* 23821*/ OPC_EmitInteger, MVT::i32, 0, |
| 6087 | /* 23824*/ OPC_EmitInteger, MVT::i32, 0, |
| 6088 | /* 23827*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6089 | /* 23839*/ OPC_EmitInteger, MVT::i32, 0, |
| 6090 | /* 23842*/ OPC_EmitInteger, MVT::i32, 0, |
| 6091 | /* 23845*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6092 | /* 23857*/ OPC_EmitInteger, MVT::i32, 0, |
| 6093 | /* 23860*/ OPC_EmitInteger, MVT::i32, 0, |
| 6094 | /* 23863*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6095 | /* 23875*/ OPC_EmitInteger, MVT::i32, 1, |
| 6096 | /* 23878*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6097 | /* 23881*/ OPC_EmitInteger, MVT::i32, 0, |
| 6098 | /* 23884*/ OPC_EmitInteger, MVT::i32, 0, |
| 6099 | /* 23887*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_INT24_cm), 0, |
| 6100 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 6101 | // Src: (add:{ *:[i32] } (AMDGPUmul_i24_impl:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1), i32:{ *:[i32] }:$src2) - Complexity = 8 |
| 6102 | // Dst: (MULADD_INT24_cm:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1, ?:{ *:[i32] }:$src2) |
| 6103 | /* 23911*/ 0, // EndSwitchOpcode |
| 6104 | /* 23912*/ /*Scope*/ 68|128,2/*324*/, /*->24238*/ |
| 6105 | /* 23914*/ OPC_RecordChild0, // #0 = $src2 |
| 6106 | /* 23915*/ OPC_Scope, 87|128,1/*215*/, /*->24133*/ // 2 children in Scope |
| 6107 | /* 23918*/ OPC_MoveChild1, |
| 6108 | /* 23919*/ OPC_SwitchOpcode /*2 cases */, 103, TARGET_VAL(AMDGPUISD::MUL_U24),// ->24026 |
| 6109 | /* 23923*/ OPC_RecordChild0, // #1 = $src0 |
| 6110 | /* 23924*/ OPC_RecordChild1, // #2 = $src1 |
| 6111 | /* 23925*/ OPC_MoveParent, |
| 6112 | /* 23926*/ OPC_CheckType, MVT::i32, |
| 6113 | /* 23928*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6114 | /* 23930*/ OPC_EmitInteger, MVT::i32, 0, |
| 6115 | /* 23933*/ OPC_EmitInteger, MVT::i32, 0, |
| 6116 | /* 23936*/ OPC_EmitInteger, MVT::i32, 0, |
| 6117 | /* 23939*/ OPC_EmitInteger, MVT::i32, 0, |
| 6118 | /* 23942*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6119 | /* 23954*/ OPC_EmitInteger, MVT::i32, 0, |
| 6120 | /* 23957*/ OPC_EmitInteger, MVT::i32, 0, |
| 6121 | /* 23960*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6122 | /* 23972*/ OPC_EmitInteger, MVT::i32, 0, |
| 6123 | /* 23975*/ OPC_EmitInteger, MVT::i32, 0, |
| 6124 | /* 23978*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6125 | /* 23990*/ OPC_EmitInteger, MVT::i32, 1, |
| 6126 | /* 23993*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6127 | /* 23996*/ OPC_EmitInteger, MVT::i32, 0, |
| 6128 | /* 23999*/ OPC_EmitInteger, MVT::i32, 0, |
| 6129 | /* 24002*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_UINT24_eg), 0, |
| 6130 | MVT::i32, 18/*#Ops*/, 3, 4, 1, 5, 6, 7, 2, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 6131 | // Src: (add:{ *:[i32] } i32:{ *:[i32] }:$src2, (AMDGPUmul_u24_impl:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)) - Complexity = 8 |
| 6132 | // Dst: (MULADD_UINT24_eg:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1, ?:{ *:[i32] }:$src2) |
| 6133 | /* 24026*/ /*SwitchOpcode*/ 103, TARGET_VAL(AMDGPUISD::MUL_I24),// ->24132 |
| 6134 | /* 24029*/ OPC_RecordChild0, // #1 = $src0 |
| 6135 | /* 24030*/ OPC_RecordChild1, // #2 = $src1 |
| 6136 | /* 24031*/ OPC_MoveParent, |
| 6137 | /* 24032*/ OPC_CheckType, MVT::i32, |
| 6138 | /* 24034*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 6139 | /* 24036*/ OPC_EmitInteger, MVT::i32, 0, |
| 6140 | /* 24039*/ OPC_EmitInteger, MVT::i32, 0, |
| 6141 | /* 24042*/ OPC_EmitInteger, MVT::i32, 0, |
| 6142 | /* 24045*/ OPC_EmitInteger, MVT::i32, 0, |
| 6143 | /* 24048*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6144 | /* 24060*/ OPC_EmitInteger, MVT::i32, 0, |
| 6145 | /* 24063*/ OPC_EmitInteger, MVT::i32, 0, |
| 6146 | /* 24066*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6147 | /* 24078*/ OPC_EmitInteger, MVT::i32, 0, |
| 6148 | /* 24081*/ OPC_EmitInteger, MVT::i32, 0, |
| 6149 | /* 24084*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6150 | /* 24096*/ OPC_EmitInteger, MVT::i32, 1, |
| 6151 | /* 24099*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6152 | /* 24102*/ OPC_EmitInteger, MVT::i32, 0, |
| 6153 | /* 24105*/ OPC_EmitInteger, MVT::i32, 0, |
| 6154 | /* 24108*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_INT24_cm), 0, |
| 6155 | MVT::i32, 18/*#Ops*/, 3, 4, 1, 5, 6, 7, 2, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 6156 | // Src: (add:{ *:[i32] } i32:{ *:[i32] }:$src2, (AMDGPUmul_i24_impl:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)) - Complexity = 8 |
| 6157 | // Dst: (MULADD_INT24_cm:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1, ?:{ *:[i32] }:$src2) |
| 6158 | /* 24132*/ 0, // EndSwitchOpcode |
| 6159 | /* 24133*/ /*Scope*/ 103, /*->24237*/ |
| 6160 | /* 24134*/ OPC_RecordChild1, // #1 = $src1 |
| 6161 | /* 24135*/ OPC_CheckType, MVT::i32, |
| 6162 | /* 24137*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6163 | /* 24139*/ OPC_EmitInteger, MVT::i32, 0, |
| 6164 | /* 24142*/ OPC_EmitInteger, MVT::i32, 0, |
| 6165 | /* 24145*/ OPC_EmitInteger, MVT::i32, 1, |
| 6166 | /* 24148*/ OPC_EmitInteger, MVT::i32, 0, |
| 6167 | /* 24151*/ OPC_EmitInteger, MVT::i32, 0, |
| 6168 | /* 24154*/ OPC_EmitInteger, MVT::i32, 0, |
| 6169 | /* 24157*/ OPC_EmitInteger, MVT::i32, 0, |
| 6170 | /* 24160*/ OPC_EmitInteger, MVT::i32, 0, |
| 6171 | /* 24163*/ OPC_EmitInteger, MVT::i32, 0, |
| 6172 | /* 24166*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6173 | /* 24178*/ OPC_EmitInteger, MVT::i32, 0, |
| 6174 | /* 24181*/ OPC_EmitInteger, MVT::i32, 0, |
| 6175 | /* 24184*/ OPC_EmitInteger, MVT::i32, 0, |
| 6176 | /* 24187*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6177 | /* 24199*/ OPC_EmitInteger, MVT::i32, 1, |
| 6178 | /* 24202*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6179 | /* 24205*/ OPC_EmitInteger, MVT::i32, 0, |
| 6180 | /* 24208*/ OPC_EmitInteger, MVT::i32, 0, |
| 6181 | /* 24211*/ OPC_MorphNodeTo1, TARGET_VAL(R600::ADD_INT), 0, |
| 6182 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 6183 | // Src: (add:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 6184 | // Dst: (ADD_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 6185 | /* 24237*/ 0, /*End of Scope*/ |
| 6186 | /* 24238*/ 0, /*End of Scope*/ |
| 6187 | /* 24239*/ /*SwitchOpcode*/ 113|128,26/*3441*/, TARGET_VAL(ISD::XOR),// ->27684 |
| 6188 | /* 24243*/ OPC_Scope, 66|128,3/*450*/, /*->24696*/ // 5 children in Scope |
| 6189 | /* 24246*/ OPC_RecordChild0, // #0 = $z |
| 6190 | /* 24247*/ OPC_MoveChild1, |
| 6191 | /* 24248*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 6192 | /* 24251*/ OPC_Scope, 91|128,1/*219*/, /*->24473*/ // 2 children in Scope |
| 6193 | /* 24254*/ OPC_RecordChild0, // #1 = $x |
| 6194 | /* 24255*/ OPC_MoveChild1, |
| 6195 | /* 24256*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 6196 | /* 24259*/ OPC_Scope, 105, /*->24366*/ // 2 children in Scope |
| 6197 | /* 24261*/ OPC_RecordChild0, // #2 = $y |
| 6198 | /* 24262*/ OPC_CheckChild1Same, 0, |
| 6199 | /* 24264*/ OPC_MoveParent, |
| 6200 | /* 24265*/ OPC_MoveParent, |
| 6201 | /* 24266*/ OPC_CheckType, MVT::i32, |
| 6202 | /* 24268*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6203 | /* 24270*/ OPC_EmitInteger, MVT::i32, 0, |
| 6204 | /* 24273*/ OPC_EmitInteger, MVT::i32, 0, |
| 6205 | /* 24276*/ OPC_EmitInteger, MVT::i32, 0, |
| 6206 | /* 24279*/ OPC_EmitInteger, MVT::i32, 0, |
| 6207 | /* 24282*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6208 | /* 24294*/ OPC_EmitInteger, MVT::i32, 0, |
| 6209 | /* 24297*/ OPC_EmitInteger, MVT::i32, 0, |
| 6210 | /* 24300*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6211 | /* 24312*/ OPC_EmitInteger, MVT::i32, 0, |
| 6212 | /* 24315*/ OPC_EmitInteger, MVT::i32, 0, |
| 6213 | /* 24318*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6214 | /* 24330*/ OPC_EmitInteger, MVT::i32, 1, |
| 6215 | /* 24333*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6216 | /* 24336*/ OPC_EmitInteger, MVT::i32, 0, |
| 6217 | /* 24339*/ OPC_EmitInteger, MVT::i32, 0, |
| 6218 | /* 24342*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6219 | MVT::i32, 18/*#Ops*/, 3, 4, 1, 5, 6, 7, 2, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 6220 | // Src: (xor:{ *:[i32] } i32:{ *:[i32] }:$z, (and:{ *:[i32] } i32:{ *:[i32] }:$x, (xor:{ *:[i32] } i32:{ *:[i32] }:$y, i32:{ *:[i32] }:$z))) - Complexity = 9 |
| 6221 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 6222 | /* 24366*/ /*Scope*/ 105, /*->24472*/ |
| 6223 | /* 24367*/ OPC_CheckChild0Same, 0, |
| 6224 | /* 24369*/ OPC_RecordChild1, // #2 = $y |
| 6225 | /* 24370*/ OPC_MoveParent, |
| 6226 | /* 24371*/ OPC_MoveParent, |
| 6227 | /* 24372*/ OPC_CheckType, MVT::i32, |
| 6228 | /* 24374*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6229 | /* 24376*/ OPC_EmitInteger, MVT::i32, 0, |
| 6230 | /* 24379*/ OPC_EmitInteger, MVT::i32, 0, |
| 6231 | /* 24382*/ OPC_EmitInteger, MVT::i32, 0, |
| 6232 | /* 24385*/ OPC_EmitInteger, MVT::i32, 0, |
| 6233 | /* 24388*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6234 | /* 24400*/ OPC_EmitInteger, MVT::i32, 0, |
| 6235 | /* 24403*/ OPC_EmitInteger, MVT::i32, 0, |
| 6236 | /* 24406*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6237 | /* 24418*/ OPC_EmitInteger, MVT::i32, 0, |
| 6238 | /* 24421*/ OPC_EmitInteger, MVT::i32, 0, |
| 6239 | /* 24424*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6240 | /* 24436*/ OPC_EmitInteger, MVT::i32, 1, |
| 6241 | /* 24439*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6242 | /* 24442*/ OPC_EmitInteger, MVT::i32, 0, |
| 6243 | /* 24445*/ OPC_EmitInteger, MVT::i32, 0, |
| 6244 | /* 24448*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6245 | MVT::i32, 18/*#Ops*/, 3, 4, 1, 5, 6, 7, 2, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 6246 | // Src: (xor:{ *:[i32] } i32:{ *:[i32] }:$z, (and:{ *:[i32] } i32:{ *:[i32] }:$x, (xor:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y))) - Complexity = 9 |
| 6247 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 6248 | /* 24472*/ 0, /*End of Scope*/ |
| 6249 | /* 24473*/ /*Scope*/ 92|128,1/*220*/, /*->24695*/ |
| 6250 | /* 24475*/ OPC_MoveChild0, |
| 6251 | /* 24476*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 6252 | /* 24479*/ OPC_Scope, 106, /*->24587*/ // 2 children in Scope |
| 6253 | /* 24481*/ OPC_RecordChild0, // #1 = $y |
| 6254 | /* 24482*/ OPC_CheckChild1Same, 0, |
| 6255 | /* 24484*/ OPC_MoveParent, |
| 6256 | /* 24485*/ OPC_RecordChild1, // #2 = $x |
| 6257 | /* 24486*/ OPC_MoveParent, |
| 6258 | /* 24487*/ OPC_CheckType, MVT::i32, |
| 6259 | /* 24489*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6260 | /* 24491*/ OPC_EmitInteger, MVT::i32, 0, |
| 6261 | /* 24494*/ OPC_EmitInteger, MVT::i32, 0, |
| 6262 | /* 24497*/ OPC_EmitInteger, MVT::i32, 0, |
| 6263 | /* 24500*/ OPC_EmitInteger, MVT::i32, 0, |
| 6264 | /* 24503*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6265 | /* 24515*/ OPC_EmitInteger, MVT::i32, 0, |
| 6266 | /* 24518*/ OPC_EmitInteger, MVT::i32, 0, |
| 6267 | /* 24521*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6268 | /* 24533*/ OPC_EmitInteger, MVT::i32, 0, |
| 6269 | /* 24536*/ OPC_EmitInteger, MVT::i32, 0, |
| 6270 | /* 24539*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6271 | /* 24551*/ OPC_EmitInteger, MVT::i32, 1, |
| 6272 | /* 24554*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6273 | /* 24557*/ OPC_EmitInteger, MVT::i32, 0, |
| 6274 | /* 24560*/ OPC_EmitInteger, MVT::i32, 0, |
| 6275 | /* 24563*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6276 | MVT::i32, 18/*#Ops*/, 3, 4, 2, 5, 6, 7, 1, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 6277 | // Src: (xor:{ *:[i32] } i32:{ *:[i32] }:$z, (and:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$y, i32:{ *:[i32] }:$z), i32:{ *:[i32] }:$x)) - Complexity = 9 |
| 6278 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 6279 | /* 24587*/ /*Scope*/ 106, /*->24694*/ |
| 6280 | /* 24588*/ OPC_CheckChild0Same, 0, |
| 6281 | /* 24590*/ OPC_RecordChild1, // #1 = $y |
| 6282 | /* 24591*/ OPC_MoveParent, |
| 6283 | /* 24592*/ OPC_RecordChild1, // #2 = $x |
| 6284 | /* 24593*/ OPC_MoveParent, |
| 6285 | /* 24594*/ OPC_CheckType, MVT::i32, |
| 6286 | /* 24596*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6287 | /* 24598*/ OPC_EmitInteger, MVT::i32, 0, |
| 6288 | /* 24601*/ OPC_EmitInteger, MVT::i32, 0, |
| 6289 | /* 24604*/ OPC_EmitInteger, MVT::i32, 0, |
| 6290 | /* 24607*/ OPC_EmitInteger, MVT::i32, 0, |
| 6291 | /* 24610*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6292 | /* 24622*/ OPC_EmitInteger, MVT::i32, 0, |
| 6293 | /* 24625*/ OPC_EmitInteger, MVT::i32, 0, |
| 6294 | /* 24628*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6295 | /* 24640*/ OPC_EmitInteger, MVT::i32, 0, |
| 6296 | /* 24643*/ OPC_EmitInteger, MVT::i32, 0, |
| 6297 | /* 24646*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6298 | /* 24658*/ OPC_EmitInteger, MVT::i32, 1, |
| 6299 | /* 24661*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6300 | /* 24664*/ OPC_EmitInteger, MVT::i32, 0, |
| 6301 | /* 24667*/ OPC_EmitInteger, MVT::i32, 0, |
| 6302 | /* 24670*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6303 | MVT::i32, 18/*#Ops*/, 3, 4, 2, 5, 6, 7, 1, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 6304 | // Src: (xor:{ *:[i32] } i32:{ *:[i32] }:$z, (and:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$x)) - Complexity = 9 |
| 6305 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 6306 | /* 24694*/ 0, /*End of Scope*/ |
| 6307 | /* 24695*/ 0, /*End of Scope*/ |
| 6308 | /* 24696*/ /*Scope*/ 56|128,3/*440*/, /*->25138*/ |
| 6309 | /* 24698*/ OPC_MoveChild0, |
| 6310 | /* 24699*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 6311 | /* 24702*/ OPC_Scope, 87|128,1/*215*/, /*->24920*/ // 2 children in Scope |
| 6312 | /* 24705*/ OPC_RecordChild0, // #0 = $x |
| 6313 | /* 24706*/ OPC_MoveChild1, |
| 6314 | /* 24707*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 6315 | /* 24710*/ OPC_RecordChild0, // #1 = $y |
| 6316 | /* 24711*/ OPC_RecordChild1, // #2 = $z |
| 6317 | /* 24712*/ OPC_MoveParent, |
| 6318 | /* 24713*/ OPC_MoveParent, |
| 6319 | /* 24714*/ OPC_CheckType, MVT::i32, |
| 6320 | /* 24716*/ OPC_Scope, 100, /*->24818*/ // 2 children in Scope |
| 6321 | /* 24718*/ OPC_CheckChild1Same, 2, |
| 6322 | /* 24720*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6323 | /* 24722*/ OPC_EmitInteger, MVT::i32, 0, |
| 6324 | /* 24725*/ OPC_EmitInteger, MVT::i32, 0, |
| 6325 | /* 24728*/ OPC_EmitInteger, MVT::i32, 0, |
| 6326 | /* 24731*/ OPC_EmitInteger, MVT::i32, 0, |
| 6327 | /* 24734*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6328 | /* 24746*/ OPC_EmitInteger, MVT::i32, 0, |
| 6329 | /* 24749*/ OPC_EmitInteger, MVT::i32, 0, |
| 6330 | /* 24752*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6331 | /* 24764*/ OPC_EmitInteger, MVT::i32, 0, |
| 6332 | /* 24767*/ OPC_EmitInteger, MVT::i32, 0, |
| 6333 | /* 24770*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6334 | /* 24782*/ OPC_EmitInteger, MVT::i32, 1, |
| 6335 | /* 24785*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6336 | /* 24788*/ OPC_EmitInteger, MVT::i32, 0, |
| 6337 | /* 24791*/ OPC_EmitInteger, MVT::i32, 0, |
| 6338 | /* 24794*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6339 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 6340 | // Src: (xor:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$x, (xor:{ *:[i32] } i32:{ *:[i32] }:$y, i32:{ *:[i32] }:$z)), i32:{ *:[i32] }:$z) - Complexity = 9 |
| 6341 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 6342 | /* 24818*/ /*Scope*/ 100, /*->24919*/ |
| 6343 | /* 24819*/ OPC_CheckChild1Same, 1, |
| 6344 | /* 24821*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6345 | /* 24823*/ OPC_EmitInteger, MVT::i32, 0, |
| 6346 | /* 24826*/ OPC_EmitInteger, MVT::i32, 0, |
| 6347 | /* 24829*/ OPC_EmitInteger, MVT::i32, 0, |
| 6348 | /* 24832*/ OPC_EmitInteger, MVT::i32, 0, |
| 6349 | /* 24835*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6350 | /* 24847*/ OPC_EmitInteger, MVT::i32, 0, |
| 6351 | /* 24850*/ OPC_EmitInteger, MVT::i32, 0, |
| 6352 | /* 24853*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6353 | /* 24865*/ OPC_EmitInteger, MVT::i32, 0, |
| 6354 | /* 24868*/ OPC_EmitInteger, MVT::i32, 0, |
| 6355 | /* 24871*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6356 | /* 24883*/ OPC_EmitInteger, MVT::i32, 1, |
| 6357 | /* 24886*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6358 | /* 24889*/ OPC_EmitInteger, MVT::i32, 0, |
| 6359 | /* 24892*/ OPC_EmitInteger, MVT::i32, 0, |
| 6360 | /* 24895*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6361 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 2, 8, 9, 10, 1, 11, 12, 13, 14, 15, 16, 17, |
| 6362 | // Src: (xor:{ *:[i32] } (and:{ *:[i32] } i32:{ *:[i32] }:$x, (xor:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y)), i32:{ *:[i32] }:$z) - Complexity = 9 |
| 6363 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 6364 | /* 24919*/ 0, /*End of Scope*/ |
| 6365 | /* 24920*/ /*Scope*/ 87|128,1/*215*/, /*->25137*/ |
| 6366 | /* 24922*/ OPC_MoveChild0, |
| 6367 | /* 24923*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 6368 | /* 24926*/ OPC_RecordChild0, // #0 = $y |
| 6369 | /* 24927*/ OPC_RecordChild1, // #1 = $z |
| 6370 | /* 24928*/ OPC_MoveParent, |
| 6371 | /* 24929*/ OPC_RecordChild1, // #2 = $x |
| 6372 | /* 24930*/ OPC_MoveParent, |
| 6373 | /* 24931*/ OPC_CheckType, MVT::i32, |
| 6374 | /* 24933*/ OPC_Scope, 100, /*->25035*/ // 2 children in Scope |
| 6375 | /* 24935*/ OPC_CheckChild1Same, 1, |
| 6376 | /* 24937*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6377 | /* 24939*/ OPC_EmitInteger, MVT::i32, 0, |
| 6378 | /* 24942*/ OPC_EmitInteger, MVT::i32, 0, |
| 6379 | /* 24945*/ OPC_EmitInteger, MVT::i32, 0, |
| 6380 | /* 24948*/ OPC_EmitInteger, MVT::i32, 0, |
| 6381 | /* 24951*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6382 | /* 24963*/ OPC_EmitInteger, MVT::i32, 0, |
| 6383 | /* 24966*/ OPC_EmitInteger, MVT::i32, 0, |
| 6384 | /* 24969*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6385 | /* 24981*/ OPC_EmitInteger, MVT::i32, 0, |
| 6386 | /* 24984*/ OPC_EmitInteger, MVT::i32, 0, |
| 6387 | /* 24987*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6388 | /* 24999*/ OPC_EmitInteger, MVT::i32, 1, |
| 6389 | /* 25002*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6390 | /* 25005*/ OPC_EmitInteger, MVT::i32, 0, |
| 6391 | /* 25008*/ OPC_EmitInteger, MVT::i32, 0, |
| 6392 | /* 25011*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6393 | MVT::i32, 18/*#Ops*/, 3, 4, 2, 5, 6, 7, 0, 8, 9, 10, 1, 11, 12, 13, 14, 15, 16, 17, |
| 6394 | // Src: (xor:{ *:[i32] } (and:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$y, i32:{ *:[i32] }:$z), i32:{ *:[i32] }:$x), i32:{ *:[i32] }:$z) - Complexity = 9 |
| 6395 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 6396 | /* 25035*/ /*Scope*/ 100, /*->25136*/ |
| 6397 | /* 25036*/ OPC_CheckChild1Same, 0, |
| 6398 | /* 25038*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6399 | /* 25040*/ OPC_EmitInteger, MVT::i32, 0, |
| 6400 | /* 25043*/ OPC_EmitInteger, MVT::i32, 0, |
| 6401 | /* 25046*/ OPC_EmitInteger, MVT::i32, 0, |
| 6402 | /* 25049*/ OPC_EmitInteger, MVT::i32, 0, |
| 6403 | /* 25052*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6404 | /* 25064*/ OPC_EmitInteger, MVT::i32, 0, |
| 6405 | /* 25067*/ OPC_EmitInteger, MVT::i32, 0, |
| 6406 | /* 25070*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6407 | /* 25082*/ OPC_EmitInteger, MVT::i32, 0, |
| 6408 | /* 25085*/ OPC_EmitInteger, MVT::i32, 0, |
| 6409 | /* 25088*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6410 | /* 25100*/ OPC_EmitInteger, MVT::i32, 1, |
| 6411 | /* 25103*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6412 | /* 25106*/ OPC_EmitInteger, MVT::i32, 0, |
| 6413 | /* 25109*/ OPC_EmitInteger, MVT::i32, 0, |
| 6414 | /* 25112*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6415 | MVT::i32, 18/*#Ops*/, 3, 4, 2, 5, 6, 7, 1, 8, 9, 10, 0, 11, 12, 13, 14, 15, 16, 17, |
| 6416 | // Src: (xor:{ *:[i32] } (and:{ *:[i32] } (xor:{ *:[i32] } i32:{ *:[i32] }:$z, i32:{ *:[i32] }:$y), i32:{ *:[i32] }:$x), i32:{ *:[i32] }:$z) - Complexity = 9 |
| 6417 | // Dst: (BFI_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$x, ?:{ *:[i32] }:$y, ?:{ *:[i32] }:$z) |
| 6418 | /* 25136*/ 0, /*End of Scope*/ |
| 6419 | /* 25137*/ 0, /*End of Scope*/ |
| 6420 | /* 25138*/ /*Scope*/ 30|128,9/*1182*/, /*->26322*/ |
| 6421 | /* 25140*/ OPC_RecordChild0, // #0 = $z |
| 6422 | /* 25141*/ OPC_MoveChild1, |
| 6423 | /* 25142*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 6424 | /* 25145*/ OPC_Scope, 73|128,4/*585*/, /*->25733*/ // 2 children in Scope |
| 6425 | /* 25148*/ OPC_RecordChild0, // #1 = $x |
| 6426 | /* 25149*/ OPC_MoveChild1, |
| 6427 | /* 25150*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 6428 | /* 25153*/ OPC_Scope, 31|128,2/*287*/, /*->25443*/ // 2 children in Scope |
| 6429 | /* 25156*/ OPC_RecordChild0, // #2 = $y |
| 6430 | /* 25157*/ OPC_CheckChild1Same, 0, |
| 6431 | /* 25159*/ OPC_MoveParent, |
| 6432 | /* 25160*/ OPC_MoveParent, |
| 6433 | /* 25161*/ OPC_CheckType, MVT::i64, |
| 6434 | /* 25163*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6435 | /* 25165*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 6436 | /* 25168*/ OPC_EmitInteger, MVT::i32, 0, |
| 6437 | /* 25171*/ OPC_EmitInteger, MVT::i32, 0, |
| 6438 | /* 25174*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6439 | /* 25177*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6440 | MVT::i32, 2/*#Ops*/, 1, 6, // Results = #7 |
| 6441 | /* 25185*/ OPC_EmitInteger, MVT::i32, 0, |
| 6442 | /* 25188*/ OPC_EmitInteger, MVT::i32, 0, |
| 6443 | /* 25191*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6444 | /* 25203*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6445 | /* 25206*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6446 | MVT::i32, 2/*#Ops*/, 2, 11, // Results = #12 |
| 6447 | /* 25214*/ OPC_EmitInteger, MVT::i32, 0, |
| 6448 | /* 25217*/ OPC_EmitInteger, MVT::i32, 0, |
| 6449 | /* 25220*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6450 | /* 25232*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6451 | /* 25235*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6452 | MVT::i32, 2/*#Ops*/, 0, 16, // Results = #17 |
| 6453 | /* 25243*/ OPC_EmitInteger, MVT::i32, 0, |
| 6454 | /* 25246*/ OPC_EmitInteger, MVT::i32, 0, |
| 6455 | /* 25249*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6456 | /* 25261*/ OPC_EmitInteger, MVT::i32, 1, |
| 6457 | /* 25264*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6458 | /* 25267*/ OPC_EmitInteger, MVT::i32, 0, |
| 6459 | /* 25270*/ OPC_EmitInteger, MVT::i32, 0, |
| 6460 | /* 25273*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6461 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 6462 | /* 25297*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6463 | /* 25300*/ OPC_EmitInteger, MVT::i32, 0, |
| 6464 | /* 25303*/ OPC_EmitInteger, MVT::i32, 0, |
| 6465 | /* 25306*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6466 | /* 25309*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6467 | MVT::i32, 2/*#Ops*/, 1, 29, // Results = #30 |
| 6468 | /* 25317*/ OPC_EmitInteger, MVT::i32, 0, |
| 6469 | /* 25320*/ OPC_EmitInteger, MVT::i32, 0, |
| 6470 | /* 25323*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6471 | /* 25335*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6472 | /* 25338*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6473 | MVT::i32, 2/*#Ops*/, 2, 34, // Results = #35 |
| 6474 | /* 25346*/ OPC_EmitInteger, MVT::i32, 0, |
| 6475 | /* 25349*/ OPC_EmitInteger, MVT::i32, 0, |
| 6476 | /* 25352*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6477 | /* 25364*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6478 | /* 25367*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6479 | MVT::i32, 2/*#Ops*/, 0, 39, // Results = #40 |
| 6480 | /* 25375*/ OPC_EmitInteger, MVT::i32, 0, |
| 6481 | /* 25378*/ OPC_EmitInteger, MVT::i32, 0, |
| 6482 | /* 25381*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6483 | /* 25393*/ OPC_EmitInteger, MVT::i32, 1, |
| 6484 | /* 25396*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6485 | /* 25399*/ OPC_EmitInteger, MVT::i32, 0, |
| 6486 | /* 25402*/ OPC_EmitInteger, MVT::i32, 0, |
| 6487 | /* 25405*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6488 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 6489 | /* 25429*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6490 | /* 25432*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 6491 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 6492 | // Src: (xor:{ *:[i64] } i64:{ *:[i64] }:$z, (and:{ *:[i64] } i64:{ *:[i64] }:$x, (xor:{ *:[i64] } i64:{ *:[i64] }:$y, i64:{ *:[i64] }:$z))) - Complexity = 9 |
| 6493 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 6494 | /* 25443*/ /*Scope*/ 31|128,2/*287*/, /*->25732*/ |
| 6495 | /* 25445*/ OPC_CheckChild0Same, 0, |
| 6496 | /* 25447*/ OPC_RecordChild1, // #2 = $y |
| 6497 | /* 25448*/ OPC_MoveParent, |
| 6498 | /* 25449*/ OPC_MoveParent, |
| 6499 | /* 25450*/ OPC_CheckType, MVT::i64, |
| 6500 | /* 25452*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6501 | /* 25454*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 6502 | /* 25457*/ OPC_EmitInteger, MVT::i32, 0, |
| 6503 | /* 25460*/ OPC_EmitInteger, MVT::i32, 0, |
| 6504 | /* 25463*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6505 | /* 25466*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6506 | MVT::i32, 2/*#Ops*/, 1, 6, // Results = #7 |
| 6507 | /* 25474*/ OPC_EmitInteger, MVT::i32, 0, |
| 6508 | /* 25477*/ OPC_EmitInteger, MVT::i32, 0, |
| 6509 | /* 25480*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6510 | /* 25492*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6511 | /* 25495*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6512 | MVT::i32, 2/*#Ops*/, 2, 11, // Results = #12 |
| 6513 | /* 25503*/ OPC_EmitInteger, MVT::i32, 0, |
| 6514 | /* 25506*/ OPC_EmitInteger, MVT::i32, 0, |
| 6515 | /* 25509*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6516 | /* 25521*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6517 | /* 25524*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6518 | MVT::i32, 2/*#Ops*/, 0, 16, // Results = #17 |
| 6519 | /* 25532*/ OPC_EmitInteger, MVT::i32, 0, |
| 6520 | /* 25535*/ OPC_EmitInteger, MVT::i32, 0, |
| 6521 | /* 25538*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6522 | /* 25550*/ OPC_EmitInteger, MVT::i32, 1, |
| 6523 | /* 25553*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6524 | /* 25556*/ OPC_EmitInteger, MVT::i32, 0, |
| 6525 | /* 25559*/ OPC_EmitInteger, MVT::i32, 0, |
| 6526 | /* 25562*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6527 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 6528 | /* 25586*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6529 | /* 25589*/ OPC_EmitInteger, MVT::i32, 0, |
| 6530 | /* 25592*/ OPC_EmitInteger, MVT::i32, 0, |
| 6531 | /* 25595*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6532 | /* 25598*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6533 | MVT::i32, 2/*#Ops*/, 1, 29, // Results = #30 |
| 6534 | /* 25606*/ OPC_EmitInteger, MVT::i32, 0, |
| 6535 | /* 25609*/ OPC_EmitInteger, MVT::i32, 0, |
| 6536 | /* 25612*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6537 | /* 25624*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6538 | /* 25627*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6539 | MVT::i32, 2/*#Ops*/, 2, 34, // Results = #35 |
| 6540 | /* 25635*/ OPC_EmitInteger, MVT::i32, 0, |
| 6541 | /* 25638*/ OPC_EmitInteger, MVT::i32, 0, |
| 6542 | /* 25641*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6543 | /* 25653*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6544 | /* 25656*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6545 | MVT::i32, 2/*#Ops*/, 0, 39, // Results = #40 |
| 6546 | /* 25664*/ OPC_EmitInteger, MVT::i32, 0, |
| 6547 | /* 25667*/ OPC_EmitInteger, MVT::i32, 0, |
| 6548 | /* 25670*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6549 | /* 25682*/ OPC_EmitInteger, MVT::i32, 1, |
| 6550 | /* 25685*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6551 | /* 25688*/ OPC_EmitInteger, MVT::i32, 0, |
| 6552 | /* 25691*/ OPC_EmitInteger, MVT::i32, 0, |
| 6553 | /* 25694*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6554 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 6555 | /* 25718*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6556 | /* 25721*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 6557 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 6558 | // Src: (xor:{ *:[i64] } i64:{ *:[i64] }:$z, (and:{ *:[i64] } i64:{ *:[i64] }:$x, (xor:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$y))) - Complexity = 9 |
| 6559 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 6560 | /* 25732*/ 0, /*End of Scope*/ |
| 6561 | /* 25733*/ /*Scope*/ 74|128,4/*586*/, /*->26321*/ |
| 6562 | /* 25735*/ OPC_MoveChild0, |
| 6563 | /* 25736*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 6564 | /* 25739*/ OPC_Scope, 32|128,2/*288*/, /*->26030*/ // 2 children in Scope |
| 6565 | /* 25742*/ OPC_RecordChild0, // #1 = $y |
| 6566 | /* 25743*/ OPC_CheckChild1Same, 0, |
| 6567 | /* 25745*/ OPC_MoveParent, |
| 6568 | /* 25746*/ OPC_RecordChild1, // #2 = $x |
| 6569 | /* 25747*/ OPC_MoveParent, |
| 6570 | /* 25748*/ OPC_CheckType, MVT::i64, |
| 6571 | /* 25750*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6572 | /* 25752*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 6573 | /* 25755*/ OPC_EmitInteger, MVT::i32, 0, |
| 6574 | /* 25758*/ OPC_EmitInteger, MVT::i32, 0, |
| 6575 | /* 25761*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6576 | /* 25764*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6577 | MVT::i32, 2/*#Ops*/, 2, 6, // Results = #7 |
| 6578 | /* 25772*/ OPC_EmitInteger, MVT::i32, 0, |
| 6579 | /* 25775*/ OPC_EmitInteger, MVT::i32, 0, |
| 6580 | /* 25778*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6581 | /* 25790*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6582 | /* 25793*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6583 | MVT::i32, 2/*#Ops*/, 1, 11, // Results = #12 |
| 6584 | /* 25801*/ OPC_EmitInteger, MVT::i32, 0, |
| 6585 | /* 25804*/ OPC_EmitInteger, MVT::i32, 0, |
| 6586 | /* 25807*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6587 | /* 25819*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6588 | /* 25822*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6589 | MVT::i32, 2/*#Ops*/, 0, 16, // Results = #17 |
| 6590 | /* 25830*/ OPC_EmitInteger, MVT::i32, 0, |
| 6591 | /* 25833*/ OPC_EmitInteger, MVT::i32, 0, |
| 6592 | /* 25836*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6593 | /* 25848*/ OPC_EmitInteger, MVT::i32, 1, |
| 6594 | /* 25851*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6595 | /* 25854*/ OPC_EmitInteger, MVT::i32, 0, |
| 6596 | /* 25857*/ OPC_EmitInteger, MVT::i32, 0, |
| 6597 | /* 25860*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6598 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 6599 | /* 25884*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6600 | /* 25887*/ OPC_EmitInteger, MVT::i32, 0, |
| 6601 | /* 25890*/ OPC_EmitInteger, MVT::i32, 0, |
| 6602 | /* 25893*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6603 | /* 25896*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6604 | MVT::i32, 2/*#Ops*/, 2, 29, // Results = #30 |
| 6605 | /* 25904*/ OPC_EmitInteger, MVT::i32, 0, |
| 6606 | /* 25907*/ OPC_EmitInteger, MVT::i32, 0, |
| 6607 | /* 25910*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6608 | /* 25922*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6609 | /* 25925*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6610 | MVT::i32, 2/*#Ops*/, 1, 34, // Results = #35 |
| 6611 | /* 25933*/ OPC_EmitInteger, MVT::i32, 0, |
| 6612 | /* 25936*/ OPC_EmitInteger, MVT::i32, 0, |
| 6613 | /* 25939*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6614 | /* 25951*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6615 | /* 25954*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6616 | MVT::i32, 2/*#Ops*/, 0, 39, // Results = #40 |
| 6617 | /* 25962*/ OPC_EmitInteger, MVT::i32, 0, |
| 6618 | /* 25965*/ OPC_EmitInteger, MVT::i32, 0, |
| 6619 | /* 25968*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6620 | /* 25980*/ OPC_EmitInteger, MVT::i32, 1, |
| 6621 | /* 25983*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6622 | /* 25986*/ OPC_EmitInteger, MVT::i32, 0, |
| 6623 | /* 25989*/ OPC_EmitInteger, MVT::i32, 0, |
| 6624 | /* 25992*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6625 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 6626 | /* 26016*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6627 | /* 26019*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 6628 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 6629 | // Src: (xor:{ *:[i64] } i64:{ *:[i64] }:$z, (and:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$y, i64:{ *:[i64] }:$z), i64:{ *:[i64] }:$x)) - Complexity = 9 |
| 6630 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 6631 | /* 26030*/ /*Scope*/ 32|128,2/*288*/, /*->26320*/ |
| 6632 | /* 26032*/ OPC_CheckChild0Same, 0, |
| 6633 | /* 26034*/ OPC_RecordChild1, // #1 = $y |
| 6634 | /* 26035*/ OPC_MoveParent, |
| 6635 | /* 26036*/ OPC_RecordChild1, // #2 = $x |
| 6636 | /* 26037*/ OPC_MoveParent, |
| 6637 | /* 26038*/ OPC_CheckType, MVT::i64, |
| 6638 | /* 26040*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6639 | /* 26042*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 6640 | /* 26045*/ OPC_EmitInteger, MVT::i32, 0, |
| 6641 | /* 26048*/ OPC_EmitInteger, MVT::i32, 0, |
| 6642 | /* 26051*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6643 | /* 26054*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6644 | MVT::i32, 2/*#Ops*/, 2, 6, // Results = #7 |
| 6645 | /* 26062*/ OPC_EmitInteger, MVT::i32, 0, |
| 6646 | /* 26065*/ OPC_EmitInteger, MVT::i32, 0, |
| 6647 | /* 26068*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6648 | /* 26080*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6649 | /* 26083*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6650 | MVT::i32, 2/*#Ops*/, 1, 11, // Results = #12 |
| 6651 | /* 26091*/ OPC_EmitInteger, MVT::i32, 0, |
| 6652 | /* 26094*/ OPC_EmitInteger, MVT::i32, 0, |
| 6653 | /* 26097*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6654 | /* 26109*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6655 | /* 26112*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6656 | MVT::i32, 2/*#Ops*/, 0, 16, // Results = #17 |
| 6657 | /* 26120*/ OPC_EmitInteger, MVT::i32, 0, |
| 6658 | /* 26123*/ OPC_EmitInteger, MVT::i32, 0, |
| 6659 | /* 26126*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6660 | /* 26138*/ OPC_EmitInteger, MVT::i32, 1, |
| 6661 | /* 26141*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6662 | /* 26144*/ OPC_EmitInteger, MVT::i32, 0, |
| 6663 | /* 26147*/ OPC_EmitInteger, MVT::i32, 0, |
| 6664 | /* 26150*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6665 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 6666 | /* 26174*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6667 | /* 26177*/ OPC_EmitInteger, MVT::i32, 0, |
| 6668 | /* 26180*/ OPC_EmitInteger, MVT::i32, 0, |
| 6669 | /* 26183*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6670 | /* 26186*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6671 | MVT::i32, 2/*#Ops*/, 2, 29, // Results = #30 |
| 6672 | /* 26194*/ OPC_EmitInteger, MVT::i32, 0, |
| 6673 | /* 26197*/ OPC_EmitInteger, MVT::i32, 0, |
| 6674 | /* 26200*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6675 | /* 26212*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6676 | /* 26215*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6677 | MVT::i32, 2/*#Ops*/, 1, 34, // Results = #35 |
| 6678 | /* 26223*/ OPC_EmitInteger, MVT::i32, 0, |
| 6679 | /* 26226*/ OPC_EmitInteger, MVT::i32, 0, |
| 6680 | /* 26229*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6681 | /* 26241*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6682 | /* 26244*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6683 | MVT::i32, 2/*#Ops*/, 0, 39, // Results = #40 |
| 6684 | /* 26252*/ OPC_EmitInteger, MVT::i32, 0, |
| 6685 | /* 26255*/ OPC_EmitInteger, MVT::i32, 0, |
| 6686 | /* 26258*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6687 | /* 26270*/ OPC_EmitInteger, MVT::i32, 1, |
| 6688 | /* 26273*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6689 | /* 26276*/ OPC_EmitInteger, MVT::i32, 0, |
| 6690 | /* 26279*/ OPC_EmitInteger, MVT::i32, 0, |
| 6691 | /* 26282*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6692 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 6693 | /* 26306*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6694 | /* 26309*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 6695 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 6696 | // Src: (xor:{ *:[i64] } i64:{ *:[i64] }:$z, (and:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$y), i64:{ *:[i64] }:$x)) - Complexity = 9 |
| 6697 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 6698 | /* 26320*/ 0, /*End of Scope*/ |
| 6699 | /* 26321*/ 0, /*End of Scope*/ |
| 6700 | /* 26322*/ /*Scope*/ 20|128,9/*1172*/, /*->27496*/ |
| 6701 | /* 26324*/ OPC_MoveChild0, |
| 6702 | /* 26325*/ OPC_CheckOpcode, TARGET_VAL(ISD::AND), |
| 6703 | /* 26328*/ OPC_Scope, 69|128,4/*581*/, /*->26912*/ // 2 children in Scope |
| 6704 | /* 26331*/ OPC_RecordChild0, // #0 = $x |
| 6705 | /* 26332*/ OPC_MoveChild1, |
| 6706 | /* 26333*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 6707 | /* 26336*/ OPC_RecordChild0, // #1 = $y |
| 6708 | /* 26337*/ OPC_RecordChild1, // #2 = $z |
| 6709 | /* 26338*/ OPC_MoveParent, |
| 6710 | /* 26339*/ OPC_MoveParent, |
| 6711 | /* 26340*/ OPC_CheckType, MVT::i64, |
| 6712 | /* 26342*/ OPC_Scope, 26|128,2/*282*/, /*->26627*/ // 2 children in Scope |
| 6713 | /* 26345*/ OPC_CheckChild1Same, 2, |
| 6714 | /* 26347*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6715 | /* 26349*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 6716 | /* 26352*/ OPC_EmitInteger, MVT::i32, 0, |
| 6717 | /* 26355*/ OPC_EmitInteger, MVT::i32, 0, |
| 6718 | /* 26358*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6719 | /* 26361*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6720 | MVT::i32, 2/*#Ops*/, 0, 6, // Results = #7 |
| 6721 | /* 26369*/ OPC_EmitInteger, MVT::i32, 0, |
| 6722 | /* 26372*/ OPC_EmitInteger, MVT::i32, 0, |
| 6723 | /* 26375*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6724 | /* 26387*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6725 | /* 26390*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6726 | MVT::i32, 2/*#Ops*/, 1, 11, // Results = #12 |
| 6727 | /* 26398*/ OPC_EmitInteger, MVT::i32, 0, |
| 6728 | /* 26401*/ OPC_EmitInteger, MVT::i32, 0, |
| 6729 | /* 26404*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6730 | /* 26416*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6731 | /* 26419*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6732 | MVT::i32, 2/*#Ops*/, 2, 16, // Results = #17 |
| 6733 | /* 26427*/ OPC_EmitInteger, MVT::i32, 0, |
| 6734 | /* 26430*/ OPC_EmitInteger, MVT::i32, 0, |
| 6735 | /* 26433*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6736 | /* 26445*/ OPC_EmitInteger, MVT::i32, 1, |
| 6737 | /* 26448*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6738 | /* 26451*/ OPC_EmitInteger, MVT::i32, 0, |
| 6739 | /* 26454*/ OPC_EmitInteger, MVT::i32, 0, |
| 6740 | /* 26457*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6741 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 6742 | /* 26481*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6743 | /* 26484*/ OPC_EmitInteger, MVT::i32, 0, |
| 6744 | /* 26487*/ OPC_EmitInteger, MVT::i32, 0, |
| 6745 | /* 26490*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6746 | /* 26493*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6747 | MVT::i32, 2/*#Ops*/, 0, 29, // Results = #30 |
| 6748 | /* 26501*/ OPC_EmitInteger, MVT::i32, 0, |
| 6749 | /* 26504*/ OPC_EmitInteger, MVT::i32, 0, |
| 6750 | /* 26507*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6751 | /* 26519*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6752 | /* 26522*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6753 | MVT::i32, 2/*#Ops*/, 1, 34, // Results = #35 |
| 6754 | /* 26530*/ OPC_EmitInteger, MVT::i32, 0, |
| 6755 | /* 26533*/ OPC_EmitInteger, MVT::i32, 0, |
| 6756 | /* 26536*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6757 | /* 26548*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6758 | /* 26551*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6759 | MVT::i32, 2/*#Ops*/, 2, 39, // Results = #40 |
| 6760 | /* 26559*/ OPC_EmitInteger, MVT::i32, 0, |
| 6761 | /* 26562*/ OPC_EmitInteger, MVT::i32, 0, |
| 6762 | /* 26565*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6763 | /* 26577*/ OPC_EmitInteger, MVT::i32, 1, |
| 6764 | /* 26580*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6765 | /* 26583*/ OPC_EmitInteger, MVT::i32, 0, |
| 6766 | /* 26586*/ OPC_EmitInteger, MVT::i32, 0, |
| 6767 | /* 26589*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6768 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 6769 | /* 26613*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6770 | /* 26616*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 6771 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 6772 | // Src: (xor:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$x, (xor:{ *:[i64] } i64:{ *:[i64] }:$y, i64:{ *:[i64] }:$z)), i64:{ *:[i64] }:$z) - Complexity = 9 |
| 6773 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 6774 | /* 26627*/ /*Scope*/ 26|128,2/*282*/, /*->26911*/ |
| 6775 | /* 26629*/ OPC_CheckChild1Same, 1, |
| 6776 | /* 26631*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6777 | /* 26633*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 6778 | /* 26636*/ OPC_EmitInteger, MVT::i32, 0, |
| 6779 | /* 26639*/ OPC_EmitInteger, MVT::i32, 0, |
| 6780 | /* 26642*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6781 | /* 26645*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6782 | MVT::i32, 2/*#Ops*/, 0, 6, // Results = #7 |
| 6783 | /* 26653*/ OPC_EmitInteger, MVT::i32, 0, |
| 6784 | /* 26656*/ OPC_EmitInteger, MVT::i32, 0, |
| 6785 | /* 26659*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6786 | /* 26671*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6787 | /* 26674*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6788 | MVT::i32, 2/*#Ops*/, 2, 11, // Results = #12 |
| 6789 | /* 26682*/ OPC_EmitInteger, MVT::i32, 0, |
| 6790 | /* 26685*/ OPC_EmitInteger, MVT::i32, 0, |
| 6791 | /* 26688*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6792 | /* 26700*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6793 | /* 26703*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6794 | MVT::i32, 2/*#Ops*/, 1, 16, // Results = #17 |
| 6795 | /* 26711*/ OPC_EmitInteger, MVT::i32, 0, |
| 6796 | /* 26714*/ OPC_EmitInteger, MVT::i32, 0, |
| 6797 | /* 26717*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6798 | /* 26729*/ OPC_EmitInteger, MVT::i32, 1, |
| 6799 | /* 26732*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6800 | /* 26735*/ OPC_EmitInteger, MVT::i32, 0, |
| 6801 | /* 26738*/ OPC_EmitInteger, MVT::i32, 0, |
| 6802 | /* 26741*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6803 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 6804 | /* 26765*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6805 | /* 26768*/ OPC_EmitInteger, MVT::i32, 0, |
| 6806 | /* 26771*/ OPC_EmitInteger, MVT::i32, 0, |
| 6807 | /* 26774*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6808 | /* 26777*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6809 | MVT::i32, 2/*#Ops*/, 0, 29, // Results = #30 |
| 6810 | /* 26785*/ OPC_EmitInteger, MVT::i32, 0, |
| 6811 | /* 26788*/ OPC_EmitInteger, MVT::i32, 0, |
| 6812 | /* 26791*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6813 | /* 26803*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6814 | /* 26806*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6815 | MVT::i32, 2/*#Ops*/, 2, 34, // Results = #35 |
| 6816 | /* 26814*/ OPC_EmitInteger, MVT::i32, 0, |
| 6817 | /* 26817*/ OPC_EmitInteger, MVT::i32, 0, |
| 6818 | /* 26820*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6819 | /* 26832*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6820 | /* 26835*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6821 | MVT::i32, 2/*#Ops*/, 1, 39, // Results = #40 |
| 6822 | /* 26843*/ OPC_EmitInteger, MVT::i32, 0, |
| 6823 | /* 26846*/ OPC_EmitInteger, MVT::i32, 0, |
| 6824 | /* 26849*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6825 | /* 26861*/ OPC_EmitInteger, MVT::i32, 1, |
| 6826 | /* 26864*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6827 | /* 26867*/ OPC_EmitInteger, MVT::i32, 0, |
| 6828 | /* 26870*/ OPC_EmitInteger, MVT::i32, 0, |
| 6829 | /* 26873*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6830 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 6831 | /* 26897*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6832 | /* 26900*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 6833 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 6834 | // Src: (xor:{ *:[i64] } (and:{ *:[i64] } i64:{ *:[i64] }:$x, (xor:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$y)), i64:{ *:[i64] }:$z) - Complexity = 9 |
| 6835 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 6836 | /* 26911*/ 0, /*End of Scope*/ |
| 6837 | /* 26912*/ /*Scope*/ 69|128,4/*581*/, /*->27495*/ |
| 6838 | /* 26914*/ OPC_MoveChild0, |
| 6839 | /* 26915*/ OPC_CheckOpcode, TARGET_VAL(ISD::XOR), |
| 6840 | /* 26918*/ OPC_RecordChild0, // #0 = $y |
| 6841 | /* 26919*/ OPC_RecordChild1, // #1 = $z |
| 6842 | /* 26920*/ OPC_MoveParent, |
| 6843 | /* 26921*/ OPC_RecordChild1, // #2 = $x |
| 6844 | /* 26922*/ OPC_MoveParent, |
| 6845 | /* 26923*/ OPC_CheckType, MVT::i64, |
| 6846 | /* 26925*/ OPC_Scope, 26|128,2/*282*/, /*->27210*/ // 2 children in Scope |
| 6847 | /* 26928*/ OPC_CheckChild1Same, 1, |
| 6848 | /* 26930*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6849 | /* 26932*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 6850 | /* 26935*/ OPC_EmitInteger, MVT::i32, 0, |
| 6851 | /* 26938*/ OPC_EmitInteger, MVT::i32, 0, |
| 6852 | /* 26941*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6853 | /* 26944*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6854 | MVT::i32, 2/*#Ops*/, 2, 6, // Results = #7 |
| 6855 | /* 26952*/ OPC_EmitInteger, MVT::i32, 0, |
| 6856 | /* 26955*/ OPC_EmitInteger, MVT::i32, 0, |
| 6857 | /* 26958*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6858 | /* 26970*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6859 | /* 26973*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6860 | MVT::i32, 2/*#Ops*/, 0, 11, // Results = #12 |
| 6861 | /* 26981*/ OPC_EmitInteger, MVT::i32, 0, |
| 6862 | /* 26984*/ OPC_EmitInteger, MVT::i32, 0, |
| 6863 | /* 26987*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6864 | /* 26999*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6865 | /* 27002*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6866 | MVT::i32, 2/*#Ops*/, 1, 16, // Results = #17 |
| 6867 | /* 27010*/ OPC_EmitInteger, MVT::i32, 0, |
| 6868 | /* 27013*/ OPC_EmitInteger, MVT::i32, 0, |
| 6869 | /* 27016*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6870 | /* 27028*/ OPC_EmitInteger, MVT::i32, 1, |
| 6871 | /* 27031*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6872 | /* 27034*/ OPC_EmitInteger, MVT::i32, 0, |
| 6873 | /* 27037*/ OPC_EmitInteger, MVT::i32, 0, |
| 6874 | /* 27040*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6875 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 6876 | /* 27064*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6877 | /* 27067*/ OPC_EmitInteger, MVT::i32, 0, |
| 6878 | /* 27070*/ OPC_EmitInteger, MVT::i32, 0, |
| 6879 | /* 27073*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6880 | /* 27076*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6881 | MVT::i32, 2/*#Ops*/, 2, 29, // Results = #30 |
| 6882 | /* 27084*/ OPC_EmitInteger, MVT::i32, 0, |
| 6883 | /* 27087*/ OPC_EmitInteger, MVT::i32, 0, |
| 6884 | /* 27090*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6885 | /* 27102*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6886 | /* 27105*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6887 | MVT::i32, 2/*#Ops*/, 0, 34, // Results = #35 |
| 6888 | /* 27113*/ OPC_EmitInteger, MVT::i32, 0, |
| 6889 | /* 27116*/ OPC_EmitInteger, MVT::i32, 0, |
| 6890 | /* 27119*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6891 | /* 27131*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6892 | /* 27134*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6893 | MVT::i32, 2/*#Ops*/, 1, 39, // Results = #40 |
| 6894 | /* 27142*/ OPC_EmitInteger, MVT::i32, 0, |
| 6895 | /* 27145*/ OPC_EmitInteger, MVT::i32, 0, |
| 6896 | /* 27148*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6897 | /* 27160*/ OPC_EmitInteger, MVT::i32, 1, |
| 6898 | /* 27163*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6899 | /* 27166*/ OPC_EmitInteger, MVT::i32, 0, |
| 6900 | /* 27169*/ OPC_EmitInteger, MVT::i32, 0, |
| 6901 | /* 27172*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6902 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 6903 | /* 27196*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6904 | /* 27199*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 6905 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 6906 | // Src: (xor:{ *:[i64] } (and:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$y, i64:{ *:[i64] }:$z), i64:{ *:[i64] }:$x), i64:{ *:[i64] }:$z) - Complexity = 9 |
| 6907 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 6908 | /* 27210*/ /*Scope*/ 26|128,2/*282*/, /*->27494*/ |
| 6909 | /* 27212*/ OPC_CheckChild1Same, 0, |
| 6910 | /* 27214*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6911 | /* 27216*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 6912 | /* 27219*/ OPC_EmitInteger, MVT::i32, 0, |
| 6913 | /* 27222*/ OPC_EmitInteger, MVT::i32, 0, |
| 6914 | /* 27225*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6915 | /* 27228*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6916 | MVT::i32, 2/*#Ops*/, 2, 6, // Results = #7 |
| 6917 | /* 27236*/ OPC_EmitInteger, MVT::i32, 0, |
| 6918 | /* 27239*/ OPC_EmitInteger, MVT::i32, 0, |
| 6919 | /* 27242*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6920 | /* 27254*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6921 | /* 27257*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6922 | MVT::i32, 2/*#Ops*/, 1, 11, // Results = #12 |
| 6923 | /* 27265*/ OPC_EmitInteger, MVT::i32, 0, |
| 6924 | /* 27268*/ OPC_EmitInteger, MVT::i32, 0, |
| 6925 | /* 27271*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6926 | /* 27283*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6927 | /* 27286*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6928 | MVT::i32, 2/*#Ops*/, 0, 16, // Results = #17 |
| 6929 | /* 27294*/ OPC_EmitInteger, MVT::i32, 0, |
| 6930 | /* 27297*/ OPC_EmitInteger, MVT::i32, 0, |
| 6931 | /* 27300*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6932 | /* 27312*/ OPC_EmitInteger, MVT::i32, 1, |
| 6933 | /* 27315*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6934 | /* 27318*/ OPC_EmitInteger, MVT::i32, 0, |
| 6935 | /* 27321*/ OPC_EmitInteger, MVT::i32, 0, |
| 6936 | /* 27324*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6937 | MVT::i32, 18/*#Ops*/, 4, 5, 7, 8, 9, 10, 12, 13, 14, 15, 17, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 6938 | /* 27348*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 6939 | /* 27351*/ OPC_EmitInteger, MVT::i32, 0, |
| 6940 | /* 27354*/ OPC_EmitInteger, MVT::i32, 0, |
| 6941 | /* 27357*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6942 | /* 27360*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6943 | MVT::i32, 2/*#Ops*/, 2, 29, // Results = #30 |
| 6944 | /* 27368*/ OPC_EmitInteger, MVT::i32, 0, |
| 6945 | /* 27371*/ OPC_EmitInteger, MVT::i32, 0, |
| 6946 | /* 27374*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6947 | /* 27386*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6948 | /* 27389*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6949 | MVT::i32, 2/*#Ops*/, 1, 34, // Results = #35 |
| 6950 | /* 27397*/ OPC_EmitInteger, MVT::i32, 0, |
| 6951 | /* 27400*/ OPC_EmitInteger, MVT::i32, 0, |
| 6952 | /* 27403*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6953 | /* 27415*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6954 | /* 27418*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 6955 | MVT::i32, 2/*#Ops*/, 0, 39, // Results = #40 |
| 6956 | /* 27426*/ OPC_EmitInteger, MVT::i32, 0, |
| 6957 | /* 27429*/ OPC_EmitInteger, MVT::i32, 0, |
| 6958 | /* 27432*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6959 | /* 27444*/ OPC_EmitInteger, MVT::i32, 1, |
| 6960 | /* 27447*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6961 | /* 27450*/ OPC_EmitInteger, MVT::i32, 0, |
| 6962 | /* 27453*/ OPC_EmitInteger, MVT::i32, 0, |
| 6963 | /* 27456*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 6964 | MVT::i32, 18/*#Ops*/, 27, 28, 30, 31, 32, 33, 35, 36, 37, 38, 40, 41, 42, 43, 44, 45, 46, 47, // Results = #48 |
| 6965 | /* 27480*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 6966 | /* 27483*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 6967 | MVT::i64, 5/*#Ops*/, 3, 25, 26, 48, 49, |
| 6968 | // Src: (xor:{ *:[i64] } (and:{ *:[i64] } (xor:{ *:[i64] } i64:{ *:[i64] }:$z, i64:{ *:[i64] }:$y), i64:{ *:[i64] }:$x), i64:{ *:[i64] }:$z) - Complexity = 9 |
| 6969 | // Dst: (REG_SEQUENCE:{ *:[i64] } R600_Reg64:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub0:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub0:{ *:[i32] })), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$x, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$y, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[i64] }:$z, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 6970 | /* 27494*/ 0, /*End of Scope*/ |
| 6971 | /* 27495*/ 0, /*End of Scope*/ |
| 6972 | /* 27496*/ /*Scope*/ 57|128,1/*185*/, /*->27683*/ |
| 6973 | /* 27498*/ OPC_RecordChild0, // #0 = $src0 |
| 6974 | /* 27499*/ OPC_CheckType, MVT::i32, |
| 6975 | /* 27501*/ OPC_Scope, 77, /*->27580*/ // 2 children in Scope |
| 6976 | /* 27503*/ OPC_CheckChild1Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6977 | /* 27514*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6978 | /* 27516*/ OPC_EmitInteger, MVT::i32, 1, |
| 6979 | /* 27519*/ OPC_EmitInteger, MVT::i32, 0, |
| 6980 | /* 27522*/ OPC_EmitInteger, MVT::i32, 0, |
| 6981 | /* 27525*/ OPC_EmitInteger, MVT::i32, 0, |
| 6982 | /* 27528*/ OPC_EmitInteger, MVT::i32, 0, |
| 6983 | /* 27531*/ OPC_EmitInteger, MVT::i32, 0, |
| 6984 | /* 27534*/ OPC_EmitInteger, MVT::i32, 0, |
| 6985 | /* 27537*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 6986 | /* 27549*/ OPC_EmitInteger, MVT::i32, 1, |
| 6987 | /* 27552*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 6988 | /* 27555*/ OPC_EmitInteger, MVT::i32, 0, |
| 6989 | /* 27558*/ OPC_EmitInteger, MVT::i32, 0, |
| 6990 | /* 27561*/ OPC_MorphNodeTo1, TARGET_VAL(R600::NOT_INT), 0, |
| 6991 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 6992 | // Src: (xor:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, -1:{ *:[i32] }) - Complexity = 8 |
| 6993 | // Dst: (NOT_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) |
| 6994 | /* 27580*/ /*Scope*/ 101, /*->27682*/ |
| 6995 | /* 27581*/ OPC_RecordChild1, // #1 = $src1 |
| 6996 | /* 27582*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 6997 | /* 27584*/ OPC_EmitInteger, MVT::i32, 0, |
| 6998 | /* 27587*/ OPC_EmitInteger, MVT::i32, 0, |
| 6999 | /* 27590*/ OPC_EmitInteger, MVT::i32, 1, |
| 7000 | /* 27593*/ OPC_EmitInteger, MVT::i32, 0, |
| 7001 | /* 27596*/ OPC_EmitInteger, MVT::i32, 0, |
| 7002 | /* 27599*/ OPC_EmitInteger, MVT::i32, 0, |
| 7003 | /* 27602*/ OPC_EmitInteger, MVT::i32, 0, |
| 7004 | /* 27605*/ OPC_EmitInteger, MVT::i32, 0, |
| 7005 | /* 27608*/ OPC_EmitInteger, MVT::i32, 0, |
| 7006 | /* 27611*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7007 | /* 27623*/ OPC_EmitInteger, MVT::i32, 0, |
| 7008 | /* 27626*/ OPC_EmitInteger, MVT::i32, 0, |
| 7009 | /* 27629*/ OPC_EmitInteger, MVT::i32, 0, |
| 7010 | /* 27632*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7011 | /* 27644*/ OPC_EmitInteger, MVT::i32, 1, |
| 7012 | /* 27647*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7013 | /* 27650*/ OPC_EmitInteger, MVT::i32, 0, |
| 7014 | /* 27653*/ OPC_EmitInteger, MVT::i32, 0, |
| 7015 | /* 27656*/ OPC_MorphNodeTo1, TARGET_VAL(R600::XOR_INT), 0, |
| 7016 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 7017 | // Src: (xor:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 7018 | // Dst: (XOR_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 7019 | /* 27682*/ 0, /*End of Scope*/ |
| 7020 | /* 27683*/ 0, /*End of Scope*/ |
| 7021 | /* 27684*/ /*SwitchOpcode*/ 45, TARGET_VAL(AMDGPUISD::CONST_ADDRESS),// ->27732 |
| 7022 | /* 27687*/ OPC_RecordChild0, // #0 = $src |
| 7023 | /* 27688*/ OPC_CheckChild0Type, MVT::i32, |
| 7024 | /* 27690*/ OPC_Scope, 12, /*->27704*/ // 2 children in Scope |
| 7025 | /* 27692*/ OPC_CheckType, MVT::i32, |
| 7026 | /* 27694*/ OPC_CheckComplexPat, /*CP*/2, /*#*/0, // SelectGlobalValueConstantOffset:$src #1 |
| 7027 | /* 27697*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CONST_COPY), 0|OPFL_Variadic1, |
| 7028 | MVT::i32, 1/*#Ops*/, 1, |
| 7029 | // Src: (CONST_ADDRESS:{ *:[i32] } ADDRGA_CONST_OFFSET:{ *:[i32] }:$src) - Complexity = 9 |
| 7030 | // Dst: (CONST_COPY:{ *:[i32] } ADDRGA_CONST_OFFSET:{ *:[i32] }:$src) |
| 7031 | /* 27704*/ /*Scope*/ 26, /*->27731*/ |
| 7032 | /* 27705*/ OPC_RecordChild1, // #1 = $buffer_id |
| 7033 | /* 27706*/ OPC_MoveChild1, |
| 7034 | /* 27707*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 7035 | /* 27710*/ OPC_CheckType, MVT::i32, |
| 7036 | /* 27712*/ OPC_MoveParent, |
| 7037 | /* 27713*/ OPC_CheckType, MVT::v4i32, |
| 7038 | /* 27715*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7039 | /* 27717*/ OPC_CheckComplexPat, /*CP*/3, /*#*/0, // SelectGlobalValueVariableOffset:$ptr #2 #3 |
| 7040 | /* 27720*/ OPC_EmitConvertToTarget, 1, |
| 7041 | /* 27722*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_VTX_CONSTBUF), 0|OPFL_Variadic2, |
| 7042 | MVT::v4i32, 3/*#Ops*/, 2, 3, 4, |
| 7043 | // Src: (CONST_ADDRESS:{ *:[v4i32] } ADDRGA_VAR_OFFSET:{ *:[i32] }:$ptr, (imm:{ *:[i32] }):$buffer_id) - Complexity = 15 |
| 7044 | // Dst: (TEX_VTX_CONSTBUF:{ *:[v4i32] } ADDRGA_VAR_OFFSET:{ *:[i32] }:$ptr, (imm:{ *:[i32] }):$buffer_id) |
| 7045 | /* 27731*/ 0, /*End of Scope*/ |
| 7046 | /* 27732*/ /*SwitchOpcode*/ 125|128,1/*253*/, TARGET_VAL(ISD::ATOMIC_LOAD_ADD),// ->27989 |
| 7047 | /* 27736*/ OPC_RecordMemRef, |
| 7048 | /* 27737*/ OPC_RecordNode, // #0 = 'atomic_load_add' chained node |
| 7049 | /* 27738*/ OPC_RecordChild1, // #1 = $ptr |
| 7050 | /* 27739*/ OPC_CheckChild1Type, MVT::i32, |
| 7051 | /* 27741*/ OPC_CheckType, MVT::i32, |
| 7052 | /* 27743*/ OPC_Scope, 63, /*->27808*/ // 3 children in Scope |
| 7053 | /* 27745*/ OPC_CheckChild2Integer, 1, |
| 7054 | /* 27747*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_add_global_noret_32 |
| 7055 | /* 27749*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7056 | /* 27751*/ OPC_EmitMergeInputChains1_0, |
| 7057 | /* 27752*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7058 | MVT::v4i32, 0/*#Ops*/, // Results = #2 |
| 7059 | /* 27758*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7060 | /* 27770*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 7061 | MVT::i32, 1/*#Ops*/, 3, // Results = #4 |
| 7062 | /* 27777*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7063 | /* 27780*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7064 | MVT::v4i32, 3/*#Ops*/, 2, 4, 5, // Results = #6 |
| 7065 | /* 27789*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_INC_UINT_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7066 | MVT::v4i32, 2/*#Ops*/, 6, 1, // Results = #7 |
| 7067 | /* 27797*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7068 | /* 27800*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7069 | MVT::i32, 2/*#Ops*/, 7, 8, |
| 7070 | // Src: (atomic_load_add:{ *:[i32] } i32:{ *:[i32] }:$ptr, 1:{ *:[i32] })<<P:Predicate_atomic_load_add_global_noret_32>> - Complexity = 9 |
| 7071 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_INC_UINT_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), (MOV_IMM_I32:{ *:[i32] } -1:{ *:[i32] }), sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 7072 | /* 27808*/ /*Scope*/ 72, /*->27881*/ |
| 7073 | /* 27809*/ OPC_CheckChild2Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7074 | /* 27820*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_add_global_noret_32 |
| 7075 | /* 27822*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7076 | /* 27824*/ OPC_EmitMergeInputChains1_0, |
| 7077 | /* 27825*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7078 | MVT::v4i32, 0/*#Ops*/, // Results = #2 |
| 7079 | /* 27831*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7080 | /* 27843*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 7081 | MVT::i32, 1/*#Ops*/, 3, // Results = #4 |
| 7082 | /* 27850*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7083 | /* 27853*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7084 | MVT::v4i32, 3/*#Ops*/, 2, 4, 5, // Results = #6 |
| 7085 | /* 27862*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_DEC_UINT_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7086 | MVT::v4i32, 2/*#Ops*/, 6, 1, // Results = #7 |
| 7087 | /* 27870*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7088 | /* 27873*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7089 | MVT::i32, 2/*#Ops*/, 7, 8, |
| 7090 | // Src: (atomic_load_add:{ *:[i32] } i32:{ *:[i32] }:$ptr, -1:{ *:[i32] })<<P:Predicate_atomic_load_add_global_noret_32>> - Complexity = 9 |
| 7091 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_DEC_UINT_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), (MOV_IMM_I32:{ *:[i32] } -1:{ *:[i32] }), sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 7092 | /* 27881*/ /*Scope*/ 106, /*->27988*/ |
| 7093 | /* 27882*/ OPC_RecordChild2, // #2 = $data |
| 7094 | /* 27883*/ OPC_Scope, 42, /*->27927*/ // 2 children in Scope |
| 7095 | /* 27885*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_add_global_noret_32 |
| 7096 | /* 27887*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7097 | /* 27889*/ OPC_EmitMergeInputChains1_0, |
| 7098 | /* 27890*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7099 | MVT::v4i32, 0/*#Ops*/, // Results = #3 |
| 7100 | /* 27896*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7101 | /* 27899*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7102 | MVT::v4i32, 3/*#Ops*/, 3, 2, 4, // Results = #5 |
| 7103 | /* 27908*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_ADD_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7104 | MVT::v4i32, 2/*#Ops*/, 5, 1, // Results = #6 |
| 7105 | /* 27916*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7106 | /* 27919*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7107 | MVT::i32, 2/*#Ops*/, 6, 7, |
| 7108 | // Src: (atomic_load_add:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_load_add_global_noret_32>> - Complexity = 4 |
| 7109 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_ADD_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 7110 | /* 27927*/ /*Scope*/ 59, /*->27987*/ |
| 7111 | /* 27928*/ OPC_CheckPredicate, 23, // Predicate_atomic_load_add_local_32 |
| 7112 | /* 27930*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7113 | /* 27932*/ OPC_EmitMergeInputChains1_0, |
| 7114 | /* 27933*/ OPC_EmitInteger, MVT::i32, 0, |
| 7115 | /* 27936*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7116 | /* 27948*/ OPC_EmitInteger, MVT::i32, 0, |
| 7117 | /* 27951*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7118 | /* 27963*/ OPC_EmitInteger, MVT::i32, 1, |
| 7119 | /* 27966*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7120 | /* 27969*/ OPC_EmitInteger, MVT::i32, 0, |
| 7121 | /* 27972*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_ADD_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7122 | MVT::i32, 9/*#Ops*/, 1, 3, 4, 2, 5, 6, 7, 8, 9, |
| 7123 | // Src: (atomic_load_add:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_load_add_local_32>> - Complexity = 4 |
| 7124 | // Dst: (LDS_ADD_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 7125 | /* 27987*/ 0, /*End of Scope*/ |
| 7126 | /* 27988*/ 0, /*End of Scope*/ |
| 7127 | /* 27989*/ /*SwitchOpcode*/ 125|128,1/*253*/, TARGET_VAL(ISD::ATOMIC_LOAD_SUB),// ->28246 |
| 7128 | /* 27993*/ OPC_RecordMemRef, |
| 7129 | /* 27994*/ OPC_RecordNode, // #0 = 'atomic_load_sub' chained node |
| 7130 | /* 27995*/ OPC_RecordChild1, // #1 = $ptr |
| 7131 | /* 27996*/ OPC_CheckChild1Type, MVT::i32, |
| 7132 | /* 27998*/ OPC_CheckType, MVT::i32, |
| 7133 | /* 28000*/ OPC_Scope, 72, /*->28074*/ // 3 children in Scope |
| 7134 | /* 28002*/ OPC_CheckChild2Integer, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7135 | /* 28013*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_sub_global_noret_32 |
| 7136 | /* 28015*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7137 | /* 28017*/ OPC_EmitMergeInputChains1_0, |
| 7138 | /* 28018*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7139 | MVT::v4i32, 0/*#Ops*/, // Results = #2 |
| 7140 | /* 28024*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7141 | /* 28036*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 7142 | MVT::i32, 1/*#Ops*/, 3, // Results = #4 |
| 7143 | /* 28043*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7144 | /* 28046*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7145 | MVT::v4i32, 3/*#Ops*/, 2, 4, 5, // Results = #6 |
| 7146 | /* 28055*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_INC_UINT_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7147 | MVT::v4i32, 2/*#Ops*/, 6, 1, // Results = #7 |
| 7148 | /* 28063*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7149 | /* 28066*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7150 | MVT::i32, 2/*#Ops*/, 7, 8, |
| 7151 | // Src: (atomic_load_sub:{ *:[i32] } i32:{ *:[i32] }:$ptr, -1:{ *:[i32] })<<P:Predicate_atomic_load_sub_global_noret_32>> - Complexity = 9 |
| 7152 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_INC_UINT_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), (MOV_IMM_I32:{ *:[i32] } -1:{ *:[i32] }), sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 7153 | /* 28074*/ /*Scope*/ 63, /*->28138*/ |
| 7154 | /* 28075*/ OPC_CheckChild2Integer, 1, |
| 7155 | /* 28077*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_sub_global_noret_32 |
| 7156 | /* 28079*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7157 | /* 28081*/ OPC_EmitMergeInputChains1_0, |
| 7158 | /* 28082*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7159 | MVT::v4i32, 0/*#Ops*/, // Results = #2 |
| 7160 | /* 28088*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7161 | /* 28100*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 7162 | MVT::i32, 1/*#Ops*/, 3, // Results = #4 |
| 7163 | /* 28107*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7164 | /* 28110*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7165 | MVT::v4i32, 3/*#Ops*/, 2, 4, 5, // Results = #6 |
| 7166 | /* 28119*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_DEC_UINT_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7167 | MVT::v4i32, 2/*#Ops*/, 6, 1, // Results = #7 |
| 7168 | /* 28127*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7169 | /* 28130*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7170 | MVT::i32, 2/*#Ops*/, 7, 8, |
| 7171 | // Src: (atomic_load_sub:{ *:[i32] } i32:{ *:[i32] }:$ptr, 1:{ *:[i32] })<<P:Predicate_atomic_load_sub_global_noret_32>> - Complexity = 9 |
| 7172 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_DEC_UINT_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), (MOV_IMM_I32:{ *:[i32] } -1:{ *:[i32] }), sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 7173 | /* 28138*/ /*Scope*/ 106, /*->28245*/ |
| 7174 | /* 28139*/ OPC_RecordChild2, // #2 = $data |
| 7175 | /* 28140*/ OPC_Scope, 42, /*->28184*/ // 2 children in Scope |
| 7176 | /* 28142*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_sub_global_noret_32 |
| 7177 | /* 28144*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7178 | /* 28146*/ OPC_EmitMergeInputChains1_0, |
| 7179 | /* 28147*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7180 | MVT::v4i32, 0/*#Ops*/, // Results = #3 |
| 7181 | /* 28153*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7182 | /* 28156*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7183 | MVT::v4i32, 3/*#Ops*/, 3, 2, 4, // Results = #5 |
| 7184 | /* 28165*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_SUB_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7185 | MVT::v4i32, 2/*#Ops*/, 5, 1, // Results = #6 |
| 7186 | /* 28173*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7187 | /* 28176*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7188 | MVT::i32, 2/*#Ops*/, 6, 7, |
| 7189 | // Src: (atomic_load_sub:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_load_sub_global_noret_32>> - Complexity = 4 |
| 7190 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_SUB_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 7191 | /* 28184*/ /*Scope*/ 59, /*->28244*/ |
| 7192 | /* 28185*/ OPC_CheckPredicate, 23, // Predicate_atomic_load_sub_local_32 |
| 7193 | /* 28187*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7194 | /* 28189*/ OPC_EmitMergeInputChains1_0, |
| 7195 | /* 28190*/ OPC_EmitInteger, MVT::i32, 0, |
| 7196 | /* 28193*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7197 | /* 28205*/ OPC_EmitInteger, MVT::i32, 0, |
| 7198 | /* 28208*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7199 | /* 28220*/ OPC_EmitInteger, MVT::i32, 1, |
| 7200 | /* 28223*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7201 | /* 28226*/ OPC_EmitInteger, MVT::i32, 0, |
| 7202 | /* 28229*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_SUB_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7203 | MVT::i32, 9/*#Ops*/, 1, 3, 4, 2, 5, 6, 7, 8, 9, |
| 7204 | // Src: (atomic_load_sub:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_load_sub_local_32>> - Complexity = 4 |
| 7205 | // Dst: (LDS_SUB_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 7206 | /* 28244*/ 0, /*End of Scope*/ |
| 7207 | /* 28245*/ 0, /*End of Scope*/ |
| 7208 | /* 28246*/ /*SwitchOpcode*/ 25|128,2/*281*/, TARGET_VAL(ISD::EXTRACT_VECTOR_ELT),// ->28531 |
| 7209 | /* 28250*/ OPC_RecordChild0, // #0 = $src |
| 7210 | /* 28251*/ OPC_SwitchType /*2 cases */, 8|128,1/*136*/, MVT::i32,// ->28391 |
| 7211 | /* 28255*/ OPC_Scope, 82, /*->28339*/ // 2 children in Scope |
| 7212 | /* 28257*/ OPC_CheckChild0Type, MVT::v4i32, |
| 7213 | /* 28259*/ OPC_Scope, 15, /*->28276*/ // 5 children in Scope |
| 7214 | /* 28261*/ OPC_CheckChild1Integer, 0, |
| 7215 | /* 28263*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7216 | /* 28265*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7217 | /* 28268*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7218 | MVT::i32, 2/*#Ops*/, 0, 1, |
| 7219 | // Src: (extractelt:{ *:[i32] } v4i32:{ *:[v4i32] }:$src, 0:{ *:[iPTR] }) - Complexity = 8 |
| 7220 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } ?:{ *:[v4i32] }:$src, sub0:{ *:[i32] }) |
| 7221 | /* 28276*/ /*Scope*/ 15, /*->28292*/ |
| 7222 | /* 28277*/ OPC_CheckChild1Integer, 1, |
| 7223 | /* 28279*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7224 | /* 28281*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7225 | /* 28284*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7226 | MVT::i32, 2/*#Ops*/, 0, 1, |
| 7227 | // Src: (extractelt:{ *:[i32] } v4i32:{ *:[v4i32] }:$src, 1:{ *:[iPTR] }) - Complexity = 8 |
| 7228 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } ?:{ *:[v4i32] }:$src, sub1:{ *:[i32] }) |
| 7229 | /* 28292*/ /*Scope*/ 15, /*->28308*/ |
| 7230 | /* 28293*/ OPC_CheckChild1Integer, 2, |
| 7231 | /* 28295*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7232 | /* 28297*/ OPC_EmitInteger, MVT::i32, R600::sub2, |
| 7233 | /* 28300*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7234 | MVT::i32, 2/*#Ops*/, 0, 1, |
| 7235 | // Src: (extractelt:{ *:[i32] } v4i32:{ *:[v4i32] }:$src, 2:{ *:[iPTR] }) - Complexity = 8 |
| 7236 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } ?:{ *:[v4i32] }:$src, sub2:{ *:[i32] }) |
| 7237 | /* 28308*/ /*Scope*/ 15, /*->28324*/ |
| 7238 | /* 28309*/ OPC_CheckChild1Integer, 3, |
| 7239 | /* 28311*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7240 | /* 28313*/ OPC_EmitInteger, MVT::i32, R600::sub3, |
| 7241 | /* 28316*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7242 | MVT::i32, 2/*#Ops*/, 0, 1, |
| 7243 | // Src: (extractelt:{ *:[i32] } v4i32:{ *:[v4i32] }:$src, 3:{ *:[iPTR] }) - Complexity = 8 |
| 7244 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } ?:{ *:[v4i32] }:$src, sub3:{ *:[i32] }) |
| 7245 | /* 28324*/ /*Scope*/ 13, /*->28338*/ |
| 7246 | /* 28325*/ OPC_RecordChild1, // #1 = $index |
| 7247 | /* 28326*/ OPC_CheckChild1Type, MVT::i32, |
| 7248 | /* 28328*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7249 | /* 28330*/ OPC_MorphNodeTo1, TARGET_VAL(R600::R600_EXTRACT_ELT_V4), 0, |
| 7250 | MVT::i32, 2/*#Ops*/, 0, 1, |
| 7251 | // Src: (extractelt:{ *:[i32] } v4i32:{ *:[v4i32] }:$vec, i32:{ *:[i32] }:$index) - Complexity = 3 |
| 7252 | // Dst: (R600_EXTRACT_ELT_V4:{ *:[i32] } ?:{ *:[v4i32] }:$vec, ?:{ *:[i32] }:$index) |
| 7253 | /* 28338*/ 0, /*End of Scope*/ |
| 7254 | /* 28339*/ /*Scope*/ 50, /*->28390*/ |
| 7255 | /* 28340*/ OPC_CheckChild0Type, MVT::v2i32, |
| 7256 | /* 28342*/ OPC_Scope, 15, /*->28359*/ // 3 children in Scope |
| 7257 | /* 28344*/ OPC_CheckChild1Integer, 0, |
| 7258 | /* 28346*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7259 | /* 28348*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7260 | /* 28351*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7261 | MVT::i32, 2/*#Ops*/, 0, 1, |
| 7262 | // Src: (extractelt:{ *:[i32] } v2i32:{ *:[v2i32] }:$src, 0:{ *:[iPTR] }) - Complexity = 8 |
| 7263 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } ?:{ *:[v2i32] }:$src, sub0:{ *:[i32] }) |
| 7264 | /* 28359*/ /*Scope*/ 15, /*->28375*/ |
| 7265 | /* 28360*/ OPC_CheckChild1Integer, 1, |
| 7266 | /* 28362*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7267 | /* 28364*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7268 | /* 28367*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7269 | MVT::i32, 2/*#Ops*/, 0, 1, |
| 7270 | // Src: (extractelt:{ *:[i32] } v2i32:{ *:[v2i32] }:$src, 1:{ *:[iPTR] }) - Complexity = 8 |
| 7271 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } ?:{ *:[v2i32] }:$src, sub1:{ *:[i32] }) |
| 7272 | /* 28375*/ /*Scope*/ 13, /*->28389*/ |
| 7273 | /* 28376*/ OPC_RecordChild1, // #1 = $index |
| 7274 | /* 28377*/ OPC_CheckChild1Type, MVT::i32, |
| 7275 | /* 28379*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7276 | /* 28381*/ OPC_MorphNodeTo1, TARGET_VAL(R600::R600_EXTRACT_ELT_V2), 0, |
| 7277 | MVT::i32, 2/*#Ops*/, 0, 1, |
| 7278 | // Src: (extractelt:{ *:[i32] } v2i32:{ *:[v2i32] }:$vec, i32:{ *:[i32] }:$index) - Complexity = 3 |
| 7279 | // Dst: (R600_EXTRACT_ELT_V2:{ *:[i32] } ?:{ *:[v2i32] }:$vec, ?:{ *:[i32] }:$index) |
| 7280 | /* 28389*/ 0, /*End of Scope*/ |
| 7281 | /* 28390*/ 0, /*End of Scope*/ |
| 7282 | /* 28391*/ /*SwitchType*/ 8|128,1/*136*/, MVT::f32,// ->28530 |
| 7283 | /* 28394*/ OPC_Scope, 82, /*->28478*/ // 2 children in Scope |
| 7284 | /* 28396*/ OPC_CheckChild0Type, MVT::v4f32, |
| 7285 | /* 28398*/ OPC_Scope, 15, /*->28415*/ // 5 children in Scope |
| 7286 | /* 28400*/ OPC_CheckChild1Integer, 0, |
| 7287 | /* 28402*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7288 | /* 28404*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7289 | /* 28407*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7290 | MVT::f32, 2/*#Ops*/, 0, 1, |
| 7291 | // Src: (extractelt:{ *:[f32] } v4f32:{ *:[v4f32] }:$src, 0:{ *:[iPTR] }) - Complexity = 8 |
| 7292 | // Dst: (EXTRACT_SUBREG:{ *:[f32] } ?:{ *:[v4f32] }:$src, sub0:{ *:[i32] }) |
| 7293 | /* 28415*/ /*Scope*/ 15, /*->28431*/ |
| 7294 | /* 28416*/ OPC_CheckChild1Integer, 1, |
| 7295 | /* 28418*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7296 | /* 28420*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7297 | /* 28423*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7298 | MVT::f32, 2/*#Ops*/, 0, 1, |
| 7299 | // Src: (extractelt:{ *:[f32] } v4f32:{ *:[v4f32] }:$src, 1:{ *:[iPTR] }) - Complexity = 8 |
| 7300 | // Dst: (EXTRACT_SUBREG:{ *:[f32] } ?:{ *:[v4f32] }:$src, sub1:{ *:[i32] }) |
| 7301 | /* 28431*/ /*Scope*/ 15, /*->28447*/ |
| 7302 | /* 28432*/ OPC_CheckChild1Integer, 2, |
| 7303 | /* 28434*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7304 | /* 28436*/ OPC_EmitInteger, MVT::i32, R600::sub2, |
| 7305 | /* 28439*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7306 | MVT::f32, 2/*#Ops*/, 0, 1, |
| 7307 | // Src: (extractelt:{ *:[f32] } v4f32:{ *:[v4f32] }:$src, 2:{ *:[iPTR] }) - Complexity = 8 |
| 7308 | // Dst: (EXTRACT_SUBREG:{ *:[f32] } ?:{ *:[v4f32] }:$src, sub2:{ *:[i32] }) |
| 7309 | /* 28447*/ /*Scope*/ 15, /*->28463*/ |
| 7310 | /* 28448*/ OPC_CheckChild1Integer, 3, |
| 7311 | /* 28450*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7312 | /* 28452*/ OPC_EmitInteger, MVT::i32, R600::sub3, |
| 7313 | /* 28455*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7314 | MVT::f32, 2/*#Ops*/, 0, 1, |
| 7315 | // Src: (extractelt:{ *:[f32] } v4f32:{ *:[v4f32] }:$src, 3:{ *:[iPTR] }) - Complexity = 8 |
| 7316 | // Dst: (EXTRACT_SUBREG:{ *:[f32] } ?:{ *:[v4f32] }:$src, sub3:{ *:[i32] }) |
| 7317 | /* 28463*/ /*Scope*/ 13, /*->28477*/ |
| 7318 | /* 28464*/ OPC_RecordChild1, // #1 = $index |
| 7319 | /* 28465*/ OPC_CheckChild1Type, MVT::i32, |
| 7320 | /* 28467*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7321 | /* 28469*/ OPC_MorphNodeTo1, TARGET_VAL(R600::R600_EXTRACT_ELT_V4), 0, |
| 7322 | MVT::f32, 2/*#Ops*/, 0, 1, |
| 7323 | // Src: (extractelt:{ *:[f32] } v4f32:{ *:[v4f32] }:$vec, i32:{ *:[i32] }:$index) - Complexity = 3 |
| 7324 | // Dst: (R600_EXTRACT_ELT_V4:{ *:[f32] } ?:{ *:[v4f32] }:$vec, ?:{ *:[i32] }:$index) |
| 7325 | /* 28477*/ 0, /*End of Scope*/ |
| 7326 | /* 28478*/ /*Scope*/ 50, /*->28529*/ |
| 7327 | /* 28479*/ OPC_CheckChild0Type, MVT::v2f32, |
| 7328 | /* 28481*/ OPC_Scope, 15, /*->28498*/ // 3 children in Scope |
| 7329 | /* 28483*/ OPC_CheckChild1Integer, 0, |
| 7330 | /* 28485*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7331 | /* 28487*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7332 | /* 28490*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7333 | MVT::f32, 2/*#Ops*/, 0, 1, |
| 7334 | // Src: (extractelt:{ *:[f32] } v2f32:{ *:[v2f32] }:$src, 0:{ *:[iPTR] }) - Complexity = 8 |
| 7335 | // Dst: (EXTRACT_SUBREG:{ *:[f32] } ?:{ *:[v2f32] }:$src, sub0:{ *:[i32] }) |
| 7336 | /* 28498*/ /*Scope*/ 15, /*->28514*/ |
| 7337 | /* 28499*/ OPC_CheckChild1Integer, 1, |
| 7338 | /* 28501*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7339 | /* 28503*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7340 | /* 28506*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 7341 | MVT::f32, 2/*#Ops*/, 0, 1, |
| 7342 | // Src: (extractelt:{ *:[f32] } v2f32:{ *:[v2f32] }:$src, 1:{ *:[iPTR] }) - Complexity = 8 |
| 7343 | // Dst: (EXTRACT_SUBREG:{ *:[f32] } ?:{ *:[v2f32] }:$src, sub1:{ *:[i32] }) |
| 7344 | /* 28514*/ /*Scope*/ 13, /*->28528*/ |
| 7345 | /* 28515*/ OPC_RecordChild1, // #1 = $index |
| 7346 | /* 28516*/ OPC_CheckChild1Type, MVT::i32, |
| 7347 | /* 28518*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7348 | /* 28520*/ OPC_MorphNodeTo1, TARGET_VAL(R600::R600_EXTRACT_ELT_V2), 0, |
| 7349 | MVT::f32, 2/*#Ops*/, 0, 1, |
| 7350 | // Src: (extractelt:{ *:[f32] } v2f32:{ *:[v2f32] }:$vec, i32:{ *:[i32] }:$index) - Complexity = 3 |
| 7351 | // Dst: (R600_EXTRACT_ELT_V2:{ *:[f32] } ?:{ *:[v2f32] }:$vec, ?:{ *:[i32] }:$index) |
| 7352 | /* 28528*/ 0, /*End of Scope*/ |
| 7353 | /* 28529*/ 0, /*End of Scope*/ |
| 7354 | /* 28530*/ 0, // EndSwitchType |
| 7355 | /* 28531*/ /*SwitchOpcode*/ 72|128,12/*1608*/, TARGET_VAL(ISD::INTRINSIC_WO_CHAIN),// ->30143 |
| 7356 | /* 28535*/ OPC_Scope, 108, /*->28645*/ // 10 children in Scope |
| 7357 | /* 28537*/ OPC_CheckChild0Integer, 47|128,14/*1839*/, |
| 7358 | /* 28540*/ OPC_RecordChild1, // #0 = $src0 |
| 7359 | /* 28541*/ OPC_CheckChild1Type, MVT::i32, |
| 7360 | /* 28543*/ OPC_RecordChild2, // #1 = $src1 |
| 7361 | /* 28544*/ OPC_RecordChild3, // #2 = $src2 |
| 7362 | /* 28545*/ OPC_CheckType, MVT::i32, |
| 7363 | /* 28547*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7364 | /* 28549*/ OPC_EmitInteger, MVT::i32, 0, |
| 7365 | /* 28552*/ OPC_EmitInteger, MVT::i32, 0, |
| 7366 | /* 28555*/ OPC_EmitInteger, MVT::i32, 0, |
| 7367 | /* 28558*/ OPC_EmitInteger, MVT::i32, 0, |
| 7368 | /* 28561*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7369 | /* 28573*/ OPC_EmitInteger, MVT::i32, 0, |
| 7370 | /* 28576*/ OPC_EmitInteger, MVT::i32, 0, |
| 7371 | /* 28579*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7372 | /* 28591*/ OPC_EmitInteger, MVT::i32, 0, |
| 7373 | /* 28594*/ OPC_EmitInteger, MVT::i32, 0, |
| 7374 | /* 28597*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7375 | /* 28609*/ OPC_EmitInteger, MVT::i32, 1, |
| 7376 | /* 28612*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7377 | /* 28615*/ OPC_EmitInteger, MVT::i32, 0, |
| 7378 | /* 28618*/ OPC_EmitInteger, MVT::i32, 0, |
| 7379 | /* 28621*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_UINT_eg), 0, |
| 7380 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 7381 | // Src: (intrinsic_wo_chain:{ *:[i32] } 1839:{ *:[iPTR] }, i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) - Complexity = 8 |
| 7382 | // Dst: (BFE_UINT_eg:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 7383 | /* 28645*/ /*Scope*/ 108, /*->28754*/ |
| 7384 | /* 28646*/ OPC_CheckChild0Integer, 15|128,14/*1807*/, |
| 7385 | /* 28649*/ OPC_RecordChild1, // #0 = $src0 |
| 7386 | /* 28650*/ OPC_CheckChild1Type, MVT::i32, |
| 7387 | /* 28652*/ OPC_RecordChild2, // #1 = $src1 |
| 7388 | /* 28653*/ OPC_RecordChild3, // #2 = $src2 |
| 7389 | /* 28654*/ OPC_CheckType, MVT::i32, |
| 7390 | /* 28656*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7391 | /* 28658*/ OPC_EmitInteger, MVT::i32, 0, |
| 7392 | /* 28661*/ OPC_EmitInteger, MVT::i32, 0, |
| 7393 | /* 28664*/ OPC_EmitInteger, MVT::i32, 0, |
| 7394 | /* 28667*/ OPC_EmitInteger, MVT::i32, 0, |
| 7395 | /* 28670*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7396 | /* 28682*/ OPC_EmitInteger, MVT::i32, 0, |
| 7397 | /* 28685*/ OPC_EmitInteger, MVT::i32, 0, |
| 7398 | /* 28688*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7399 | /* 28700*/ OPC_EmitInteger, MVT::i32, 0, |
| 7400 | /* 28703*/ OPC_EmitInteger, MVT::i32, 0, |
| 7401 | /* 28706*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7402 | /* 28718*/ OPC_EmitInteger, MVT::i32, 1, |
| 7403 | /* 28721*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7404 | /* 28724*/ OPC_EmitInteger, MVT::i32, 0, |
| 7405 | /* 28727*/ OPC_EmitInteger, MVT::i32, 0, |
| 7406 | /* 28730*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_INT_eg), 0, |
| 7407 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 7408 | // Src: (intrinsic_wo_chain:{ *:[i32] } 1807:{ *:[iPTR] }, i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) - Complexity = 8 |
| 7409 | // Dst: (BFE_INT_eg:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 7410 | /* 28754*/ /*Scope*/ 105, /*->28860*/ |
| 7411 | /* 28755*/ OPC_CheckChild0Integer, 88|128,13/*1752*/, |
| 7412 | /* 28758*/ OPC_RecordChild1, // #0 = $src0 |
| 7413 | /* 28759*/ OPC_RecordChild2, // #1 = $src1 |
| 7414 | /* 28760*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7415 | /* 28762*/ OPC_EmitInteger, MVT::i32, 0, |
| 7416 | /* 28765*/ OPC_EmitInteger, MVT::i32, 0, |
| 7417 | /* 28768*/ OPC_EmitInteger, MVT::i32, 1, |
| 7418 | /* 28771*/ OPC_EmitInteger, MVT::i32, 0, |
| 7419 | /* 28774*/ OPC_EmitInteger, MVT::i32, 0, |
| 7420 | /* 28777*/ OPC_EmitInteger, MVT::i32, 0, |
| 7421 | /* 28780*/ OPC_EmitInteger, MVT::i32, 0, |
| 7422 | /* 28783*/ OPC_EmitInteger, MVT::i32, 0, |
| 7423 | /* 28786*/ OPC_EmitInteger, MVT::i32, 0, |
| 7424 | /* 28789*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7425 | /* 28801*/ OPC_EmitInteger, MVT::i32, 0, |
| 7426 | /* 28804*/ OPC_EmitInteger, MVT::i32, 0, |
| 7427 | /* 28807*/ OPC_EmitInteger, MVT::i32, 0, |
| 7428 | /* 28810*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7429 | /* 28822*/ OPC_EmitInteger, MVT::i32, 1, |
| 7430 | /* 28825*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7431 | /* 28828*/ OPC_EmitInteger, MVT::i32, 0, |
| 7432 | /* 28831*/ OPC_EmitInteger, MVT::i32, 0, |
| 7433 | /* 28834*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MUL_UINT24_eg), 0, |
| 7434 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 7435 | // Src: (intrinsic_wo_chain:{ *:[i32] } 1752:{ *:[iPTR] }, i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) - Complexity = 8 |
| 7436 | // Dst: (MUL_UINT24_eg:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 7437 | /* 28860*/ /*Scope*/ 105, /*->28966*/ |
| 7438 | /* 28861*/ OPC_CheckChild0Integer, 87|128,13/*1751*/, |
| 7439 | /* 28864*/ OPC_RecordChild1, // #0 = $src0 |
| 7440 | /* 28865*/ OPC_RecordChild2, // #1 = $src1 |
| 7441 | /* 28866*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 7442 | /* 28868*/ OPC_EmitInteger, MVT::i32, 0, |
| 7443 | /* 28871*/ OPC_EmitInteger, MVT::i32, 0, |
| 7444 | /* 28874*/ OPC_EmitInteger, MVT::i32, 1, |
| 7445 | /* 28877*/ OPC_EmitInteger, MVT::i32, 0, |
| 7446 | /* 28880*/ OPC_EmitInteger, MVT::i32, 0, |
| 7447 | /* 28883*/ OPC_EmitInteger, MVT::i32, 0, |
| 7448 | /* 28886*/ OPC_EmitInteger, MVT::i32, 0, |
| 7449 | /* 28889*/ OPC_EmitInteger, MVT::i32, 0, |
| 7450 | /* 28892*/ OPC_EmitInteger, MVT::i32, 0, |
| 7451 | /* 28895*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7452 | /* 28907*/ OPC_EmitInteger, MVT::i32, 0, |
| 7453 | /* 28910*/ OPC_EmitInteger, MVT::i32, 0, |
| 7454 | /* 28913*/ OPC_EmitInteger, MVT::i32, 0, |
| 7455 | /* 28916*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7456 | /* 28928*/ OPC_EmitInteger, MVT::i32, 1, |
| 7457 | /* 28931*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7458 | /* 28934*/ OPC_EmitInteger, MVT::i32, 0, |
| 7459 | /* 28937*/ OPC_EmitInteger, MVT::i32, 0, |
| 7460 | /* 28940*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MUL_INT24_cm), 0, |
| 7461 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 7462 | // Src: (intrinsic_wo_chain:{ *:[i32] } 1751:{ *:[iPTR] }, i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) - Complexity = 8 |
| 7463 | // Dst: (MUL_INT24_cm:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 7464 | /* 28966*/ /*Scope*/ 46|128,3/*430*/, /*->29398*/ |
| 7465 | /* 28968*/ OPC_CheckChild0Integer, 114|128,13/*1778*/, |
| 7466 | /* 28971*/ OPC_Scope, 85|128,1/*213*/, /*->29187*/ // 2 children in Scope |
| 7467 | /* 28974*/ OPC_MoveChild1, |
| 7468 | /* 28975*/ OPC_CheckOpcode, TARGET_VAL(ISD::FSQRT), |
| 7469 | /* 28978*/ OPC_RecordChild0, // #0 = $src |
| 7470 | /* 28979*/ OPC_CheckType, MVT::f32, |
| 7471 | /* 28981*/ OPC_MoveParent, |
| 7472 | /* 28982*/ OPC_CheckType, MVT::f32, |
| 7473 | /* 28984*/ OPC_Scope, 66, /*->29052*/ // 3 children in Scope |
| 7474 | /* 28986*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 7475 | /* 28988*/ OPC_EmitInteger, MVT::i32, 1, |
| 7476 | /* 28991*/ OPC_EmitInteger, MVT::i32, 0, |
| 7477 | /* 28994*/ OPC_EmitInteger, MVT::i32, 0, |
| 7478 | /* 28997*/ OPC_EmitInteger, MVT::i32, 0, |
| 7479 | /* 29000*/ OPC_EmitInteger, MVT::i32, 0, |
| 7480 | /* 29003*/ OPC_EmitInteger, MVT::i32, 0, |
| 7481 | /* 29006*/ OPC_EmitInteger, MVT::i32, 0, |
| 7482 | /* 29009*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7483 | /* 29021*/ OPC_EmitInteger, MVT::i32, 1, |
| 7484 | /* 29024*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7485 | /* 29027*/ OPC_EmitInteger, MVT::i32, 0, |
| 7486 | /* 29030*/ OPC_EmitInteger, MVT::i32, 0, |
| 7487 | /* 29033*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_r600), 0, |
| 7488 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7489 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1778:{ *:[iPTR] }, (fsqrt:{ *:[f32] } f32:{ *:[f32] }:$src)) - Complexity = 11 |
| 7490 | // Dst: (RECIPSQRT_IEEE_r600:{ *:[f32] } ?:{ *:[f32] }:$src) |
| 7491 | /* 29052*/ /*Scope*/ 66, /*->29119*/ |
| 7492 | /* 29053*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 7493 | /* 29055*/ OPC_EmitInteger, MVT::i32, 1, |
| 7494 | /* 29058*/ OPC_EmitInteger, MVT::i32, 0, |
| 7495 | /* 29061*/ OPC_EmitInteger, MVT::i32, 0, |
| 7496 | /* 29064*/ OPC_EmitInteger, MVT::i32, 0, |
| 7497 | /* 29067*/ OPC_EmitInteger, MVT::i32, 0, |
| 7498 | /* 29070*/ OPC_EmitInteger, MVT::i32, 0, |
| 7499 | /* 29073*/ OPC_EmitInteger, MVT::i32, 0, |
| 7500 | /* 29076*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7501 | /* 29088*/ OPC_EmitInteger, MVT::i32, 1, |
| 7502 | /* 29091*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7503 | /* 29094*/ OPC_EmitInteger, MVT::i32, 0, |
| 7504 | /* 29097*/ OPC_EmitInteger, MVT::i32, 0, |
| 7505 | /* 29100*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_eg), 0, |
| 7506 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7507 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1778:{ *:[iPTR] }, (fsqrt:{ *:[f32] } f32:{ *:[f32] }:$src)) - Complexity = 11 |
| 7508 | // Dst: (RECIPSQRT_IEEE_eg:{ *:[f32] } ?:{ *:[f32] }:$src) |
| 7509 | /* 29119*/ /*Scope*/ 66, /*->29186*/ |
| 7510 | /* 29120*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 7511 | /* 29122*/ OPC_EmitInteger, MVT::i32, 1, |
| 7512 | /* 29125*/ OPC_EmitInteger, MVT::i32, 0, |
| 7513 | /* 29128*/ OPC_EmitInteger, MVT::i32, 0, |
| 7514 | /* 29131*/ OPC_EmitInteger, MVT::i32, 0, |
| 7515 | /* 29134*/ OPC_EmitInteger, MVT::i32, 0, |
| 7516 | /* 29137*/ OPC_EmitInteger, MVT::i32, 0, |
| 7517 | /* 29140*/ OPC_EmitInteger, MVT::i32, 0, |
| 7518 | /* 29143*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7519 | /* 29155*/ OPC_EmitInteger, MVT::i32, 1, |
| 7520 | /* 29158*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7521 | /* 29161*/ OPC_EmitInteger, MVT::i32, 0, |
| 7522 | /* 29164*/ OPC_EmitInteger, MVT::i32, 0, |
| 7523 | /* 29167*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_cm), 0, |
| 7524 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7525 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1778:{ *:[iPTR] }, (fsqrt:{ *:[f32] } f32:{ *:[f32] }:$src)) - Complexity = 11 |
| 7526 | // Dst: (RECIPSQRT_IEEE_cm:{ *:[f32] } ?:{ *:[f32] }:$src) |
| 7527 | /* 29186*/ 0, /*End of Scope*/ |
| 7528 | /* 29187*/ /*Scope*/ 80|128,1/*208*/, /*->29397*/ |
| 7529 | /* 29189*/ OPC_RecordChild1, // #0 = $src0 |
| 7530 | /* 29190*/ OPC_CheckChild1Type, MVT::f32, |
| 7531 | /* 29192*/ OPC_CheckType, MVT::f32, |
| 7532 | /* 29194*/ OPC_Scope, 66, /*->29262*/ // 3 children in Scope |
| 7533 | /* 29196*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 7534 | /* 29198*/ OPC_EmitInteger, MVT::i32, 1, |
| 7535 | /* 29201*/ OPC_EmitInteger, MVT::i32, 0, |
| 7536 | /* 29204*/ OPC_EmitInteger, MVT::i32, 0, |
| 7537 | /* 29207*/ OPC_EmitInteger, MVT::i32, 0, |
| 7538 | /* 29210*/ OPC_EmitInteger, MVT::i32, 0, |
| 7539 | /* 29213*/ OPC_EmitInteger, MVT::i32, 0, |
| 7540 | /* 29216*/ OPC_EmitInteger, MVT::i32, 0, |
| 7541 | /* 29219*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7542 | /* 29231*/ OPC_EmitInteger, MVT::i32, 1, |
| 7543 | /* 29234*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7544 | /* 29237*/ OPC_EmitInteger, MVT::i32, 0, |
| 7545 | /* 29240*/ OPC_EmitInteger, MVT::i32, 0, |
| 7546 | /* 29243*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_r600), 0, |
| 7547 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7548 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1778:{ *:[iPTR] }, f32:{ *:[f32] }:$src0) - Complexity = 8 |
| 7549 | // Dst: (RECIP_IEEE_r600:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 7550 | /* 29262*/ /*Scope*/ 66, /*->29329*/ |
| 7551 | /* 29263*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 7552 | /* 29265*/ OPC_EmitInteger, MVT::i32, 1, |
| 7553 | /* 29268*/ OPC_EmitInteger, MVT::i32, 0, |
| 7554 | /* 29271*/ OPC_EmitInteger, MVT::i32, 0, |
| 7555 | /* 29274*/ OPC_EmitInteger, MVT::i32, 0, |
| 7556 | /* 29277*/ OPC_EmitInteger, MVT::i32, 0, |
| 7557 | /* 29280*/ OPC_EmitInteger, MVT::i32, 0, |
| 7558 | /* 29283*/ OPC_EmitInteger, MVT::i32, 0, |
| 7559 | /* 29286*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7560 | /* 29298*/ OPC_EmitInteger, MVT::i32, 1, |
| 7561 | /* 29301*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7562 | /* 29304*/ OPC_EmitInteger, MVT::i32, 0, |
| 7563 | /* 29307*/ OPC_EmitInteger, MVT::i32, 0, |
| 7564 | /* 29310*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_eg), 0, |
| 7565 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7566 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1778:{ *:[iPTR] }, f32:{ *:[f32] }:$src0) - Complexity = 8 |
| 7567 | // Dst: (RECIP_IEEE_eg:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 7568 | /* 29329*/ /*Scope*/ 66, /*->29396*/ |
| 7569 | /* 29330*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 7570 | /* 29332*/ OPC_EmitInteger, MVT::i32, 1, |
| 7571 | /* 29335*/ OPC_EmitInteger, MVT::i32, 0, |
| 7572 | /* 29338*/ OPC_EmitInteger, MVT::i32, 0, |
| 7573 | /* 29341*/ OPC_EmitInteger, MVT::i32, 0, |
| 7574 | /* 29344*/ OPC_EmitInteger, MVT::i32, 0, |
| 7575 | /* 29347*/ OPC_EmitInteger, MVT::i32, 0, |
| 7576 | /* 29350*/ OPC_EmitInteger, MVT::i32, 0, |
| 7577 | /* 29353*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7578 | /* 29365*/ OPC_EmitInteger, MVT::i32, 1, |
| 7579 | /* 29368*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7580 | /* 29371*/ OPC_EmitInteger, MVT::i32, 0, |
| 7581 | /* 29374*/ OPC_EmitInteger, MVT::i32, 0, |
| 7582 | /* 29377*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_cm), 0, |
| 7583 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7584 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1778:{ *:[iPTR] }, f32:{ *:[f32] }:$src0) - Complexity = 8 |
| 7585 | // Dst: (RECIP_IEEE_cm:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 7586 | /* 29396*/ 0, /*End of Scope*/ |
| 7587 | /* 29397*/ 0, /*End of Scope*/ |
| 7588 | /* 29398*/ /*Scope*/ 74, /*->29473*/ |
| 7589 | /* 29399*/ OPC_CheckChild0Integer, 79|128,9/*1231*/, |
| 7590 | /* 29402*/ OPC_RecordChild1, // #0 = $src0 |
| 7591 | /* 29403*/ OPC_CheckChild1Type, MVT::f32, |
| 7592 | /* 29405*/ OPC_CheckType, MVT::f32, |
| 7593 | /* 29407*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7594 | /* 29409*/ OPC_EmitInteger, MVT::i32, 1, |
| 7595 | /* 29412*/ OPC_EmitInteger, MVT::i32, 0, |
| 7596 | /* 29415*/ OPC_EmitInteger, MVT::i32, 0, |
| 7597 | /* 29418*/ OPC_EmitInteger, MVT::i32, 0, |
| 7598 | /* 29421*/ OPC_EmitInteger, MVT::i32, 0, |
| 7599 | /* 29424*/ OPC_EmitInteger, MVT::i32, 0, |
| 7600 | /* 29427*/ OPC_EmitInteger, MVT::i32, 0, |
| 7601 | /* 29430*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7602 | /* 29442*/ OPC_EmitInteger, MVT::i32, 1, |
| 7603 | /* 29445*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7604 | /* 29448*/ OPC_EmitInteger, MVT::i32, 0, |
| 7605 | /* 29451*/ OPC_EmitInteger, MVT::i32, 0, |
| 7606 | /* 29454*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FRACT), 0, |
| 7607 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7608 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1231:{ *:[iPTR] }, R600_Reg32:{ *:[f32] }:$src0) - Complexity = 8 |
| 7609 | // Dst: (FRACT:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 7610 | /* 29473*/ /*Scope*/ 86|128,1/*214*/, /*->29689*/ |
| 7611 | /* 29475*/ OPC_CheckChild0Integer, 76|128,9/*1228*/, |
| 7612 | /* 29478*/ OPC_RecordChild1, // #0 = $src0 |
| 7613 | /* 29479*/ OPC_CheckChild1Type, MVT::f32, |
| 7614 | /* 29481*/ OPC_RecordChild2, // #1 = $src1 |
| 7615 | /* 29482*/ OPC_CheckChild2Type, MVT::f32, |
| 7616 | /* 29484*/ OPC_RecordChild3, // #2 = $src2 |
| 7617 | /* 29485*/ OPC_CheckChild3Type, MVT::f32, |
| 7618 | /* 29487*/ OPC_CheckType, MVT::f32, |
| 7619 | /* 29489*/ OPC_Scope, 98, /*->29589*/ // 2 children in Scope |
| 7620 | /* 29491*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 7621 | /* 29493*/ OPC_EmitInteger, MVT::i32, 0, |
| 7622 | /* 29496*/ OPC_EmitInteger, MVT::i32, 0, |
| 7623 | /* 29499*/ OPC_EmitInteger, MVT::i32, 0, |
| 7624 | /* 29502*/ OPC_EmitInteger, MVT::i32, 0, |
| 7625 | /* 29505*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7626 | /* 29517*/ OPC_EmitInteger, MVT::i32, 0, |
| 7627 | /* 29520*/ OPC_EmitInteger, MVT::i32, 0, |
| 7628 | /* 29523*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7629 | /* 29535*/ OPC_EmitInteger, MVT::i32, 0, |
| 7630 | /* 29538*/ OPC_EmitInteger, MVT::i32, 0, |
| 7631 | /* 29541*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7632 | /* 29553*/ OPC_EmitInteger, MVT::i32, 1, |
| 7633 | /* 29556*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7634 | /* 29559*/ OPC_EmitInteger, MVT::i32, 0, |
| 7635 | /* 29562*/ OPC_EmitInteger, MVT::i32, 0, |
| 7636 | /* 29565*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_IEEE_r600), 0, |
| 7637 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 7638 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1228:{ *:[iPTR] }, f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) - Complexity = 8 |
| 7639 | // Dst: (MULADD_IEEE_r600:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 7640 | /* 29589*/ /*Scope*/ 98, /*->29688*/ |
| 7641 | /* 29590*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7642 | /* 29592*/ OPC_EmitInteger, MVT::i32, 0, |
| 7643 | /* 29595*/ OPC_EmitInteger, MVT::i32, 0, |
| 7644 | /* 29598*/ OPC_EmitInteger, MVT::i32, 0, |
| 7645 | /* 29601*/ OPC_EmitInteger, MVT::i32, 0, |
| 7646 | /* 29604*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7647 | /* 29616*/ OPC_EmitInteger, MVT::i32, 0, |
| 7648 | /* 29619*/ OPC_EmitInteger, MVT::i32, 0, |
| 7649 | /* 29622*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7650 | /* 29634*/ OPC_EmitInteger, MVT::i32, 0, |
| 7651 | /* 29637*/ OPC_EmitInteger, MVT::i32, 0, |
| 7652 | /* 29640*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7653 | /* 29652*/ OPC_EmitInteger, MVT::i32, 1, |
| 7654 | /* 29655*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7655 | /* 29658*/ OPC_EmitInteger, MVT::i32, 0, |
| 7656 | /* 29661*/ OPC_EmitInteger, MVT::i32, 0, |
| 7657 | /* 29664*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_IEEE_eg), 0, |
| 7658 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 7659 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1228:{ *:[iPTR] }, f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) - Complexity = 8 |
| 7660 | // Dst: (MULADD_IEEE_eg:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 7661 | /* 29688*/ 0, /*End of Scope*/ |
| 7662 | /* 29689*/ /*Scope*/ 83|128,1/*211*/, /*->29902*/ |
| 7663 | /* 29691*/ OPC_CheckChild0Integer, 120|128,13/*1784*/, |
| 7664 | /* 29694*/ OPC_RecordChild1, // #0 = $src0 |
| 7665 | /* 29695*/ OPC_CheckChild1Type, MVT::f32, |
| 7666 | /* 29697*/ OPC_CheckType, MVT::f32, |
| 7667 | /* 29699*/ OPC_Scope, 66, /*->29767*/ // 3 children in Scope |
| 7668 | /* 29701*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 7669 | /* 29703*/ OPC_EmitInteger, MVT::i32, 1, |
| 7670 | /* 29706*/ OPC_EmitInteger, MVT::i32, 0, |
| 7671 | /* 29709*/ OPC_EmitInteger, MVT::i32, 0, |
| 7672 | /* 29712*/ OPC_EmitInteger, MVT::i32, 0, |
| 7673 | /* 29715*/ OPC_EmitInteger, MVT::i32, 0, |
| 7674 | /* 29718*/ OPC_EmitInteger, MVT::i32, 0, |
| 7675 | /* 29721*/ OPC_EmitInteger, MVT::i32, 0, |
| 7676 | /* 29724*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7677 | /* 29736*/ OPC_EmitInteger, MVT::i32, 1, |
| 7678 | /* 29739*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7679 | /* 29742*/ OPC_EmitInteger, MVT::i32, 0, |
| 7680 | /* 29745*/ OPC_EmitInteger, MVT::i32, 0, |
| 7681 | /* 29748*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_CLAMPED_r600), 0, |
| 7682 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7683 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1784:{ *:[iPTR] }, R600_Reg32:{ *:[f32] }:$src0) - Complexity = 8 |
| 7684 | // Dst: (RECIPSQRT_CLAMPED_r600:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 7685 | /* 29767*/ /*Scope*/ 66, /*->29834*/ |
| 7686 | /* 29768*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 7687 | /* 29770*/ OPC_EmitInteger, MVT::i32, 1, |
| 7688 | /* 29773*/ OPC_EmitInteger, MVT::i32, 0, |
| 7689 | /* 29776*/ OPC_EmitInteger, MVT::i32, 0, |
| 7690 | /* 29779*/ OPC_EmitInteger, MVT::i32, 0, |
| 7691 | /* 29782*/ OPC_EmitInteger, MVT::i32, 0, |
| 7692 | /* 29785*/ OPC_EmitInteger, MVT::i32, 0, |
| 7693 | /* 29788*/ OPC_EmitInteger, MVT::i32, 0, |
| 7694 | /* 29791*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7695 | /* 29803*/ OPC_EmitInteger, MVT::i32, 1, |
| 7696 | /* 29806*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7697 | /* 29809*/ OPC_EmitInteger, MVT::i32, 0, |
| 7698 | /* 29812*/ OPC_EmitInteger, MVT::i32, 0, |
| 7699 | /* 29815*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_CLAMPED_eg), 0, |
| 7700 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7701 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1784:{ *:[iPTR] }, R600_Reg32:{ *:[f32] }:$src0) - Complexity = 8 |
| 7702 | // Dst: (RECIPSQRT_CLAMPED_eg:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 7703 | /* 29834*/ /*Scope*/ 66, /*->29901*/ |
| 7704 | /* 29835*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 7705 | /* 29837*/ OPC_EmitInteger, MVT::i32, 1, |
| 7706 | /* 29840*/ OPC_EmitInteger, MVT::i32, 0, |
| 7707 | /* 29843*/ OPC_EmitInteger, MVT::i32, 0, |
| 7708 | /* 29846*/ OPC_EmitInteger, MVT::i32, 0, |
| 7709 | /* 29849*/ OPC_EmitInteger, MVT::i32, 0, |
| 7710 | /* 29852*/ OPC_EmitInteger, MVT::i32, 0, |
| 7711 | /* 29855*/ OPC_EmitInteger, MVT::i32, 0, |
| 7712 | /* 29858*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7713 | /* 29870*/ OPC_EmitInteger, MVT::i32, 1, |
| 7714 | /* 29873*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7715 | /* 29876*/ OPC_EmitInteger, MVT::i32, 0, |
| 7716 | /* 29879*/ OPC_EmitInteger, MVT::i32, 0, |
| 7717 | /* 29882*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_CLAMPED_cm), 0, |
| 7718 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7719 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1784:{ *:[iPTR] }, R600_Reg32:{ *:[f32] }:$src0) - Complexity = 8 |
| 7720 | // Dst: (RECIPSQRT_CLAMPED_cm:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 7721 | /* 29901*/ 0, /*End of Scope*/ |
| 7722 | /* 29902*/ /*Scope*/ 83|128,1/*211*/, /*->30115*/ |
| 7723 | /* 29904*/ OPC_CheckChild0Integer, 119|128,13/*1783*/, |
| 7724 | /* 29907*/ OPC_RecordChild1, // #0 = $src0 |
| 7725 | /* 29908*/ OPC_CheckChild1Type, MVT::f32, |
| 7726 | /* 29910*/ OPC_CheckType, MVT::f32, |
| 7727 | /* 29912*/ OPC_Scope, 66, /*->29980*/ // 3 children in Scope |
| 7728 | /* 29914*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 7729 | /* 29916*/ OPC_EmitInteger, MVT::i32, 1, |
| 7730 | /* 29919*/ OPC_EmitInteger, MVT::i32, 0, |
| 7731 | /* 29922*/ OPC_EmitInteger, MVT::i32, 0, |
| 7732 | /* 29925*/ OPC_EmitInteger, MVT::i32, 0, |
| 7733 | /* 29928*/ OPC_EmitInteger, MVT::i32, 0, |
| 7734 | /* 29931*/ OPC_EmitInteger, MVT::i32, 0, |
| 7735 | /* 29934*/ OPC_EmitInteger, MVT::i32, 0, |
| 7736 | /* 29937*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7737 | /* 29949*/ OPC_EmitInteger, MVT::i32, 1, |
| 7738 | /* 29952*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7739 | /* 29955*/ OPC_EmitInteger, MVT::i32, 0, |
| 7740 | /* 29958*/ OPC_EmitInteger, MVT::i32, 0, |
| 7741 | /* 29961*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_r600), 0, |
| 7742 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7743 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1783:{ *:[iPTR] }, R600_Reg32:{ *:[f32] }:$src0) - Complexity = 8 |
| 7744 | // Dst: (RECIPSQRT_IEEE_r600:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 7745 | /* 29980*/ /*Scope*/ 66, /*->30047*/ |
| 7746 | /* 29981*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 7747 | /* 29983*/ OPC_EmitInteger, MVT::i32, 1, |
| 7748 | /* 29986*/ OPC_EmitInteger, MVT::i32, 0, |
| 7749 | /* 29989*/ OPC_EmitInteger, MVT::i32, 0, |
| 7750 | /* 29992*/ OPC_EmitInteger, MVT::i32, 0, |
| 7751 | /* 29995*/ OPC_EmitInteger, MVT::i32, 0, |
| 7752 | /* 29998*/ OPC_EmitInteger, MVT::i32, 0, |
| 7753 | /* 30001*/ OPC_EmitInteger, MVT::i32, 0, |
| 7754 | /* 30004*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7755 | /* 30016*/ OPC_EmitInteger, MVT::i32, 1, |
| 7756 | /* 30019*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7757 | /* 30022*/ OPC_EmitInteger, MVT::i32, 0, |
| 7758 | /* 30025*/ OPC_EmitInteger, MVT::i32, 0, |
| 7759 | /* 30028*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_eg), 0, |
| 7760 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7761 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1783:{ *:[iPTR] }, R600_Reg32:{ *:[f32] }:$src0) - Complexity = 8 |
| 7762 | // Dst: (RECIPSQRT_IEEE_eg:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 7763 | /* 30047*/ /*Scope*/ 66, /*->30114*/ |
| 7764 | /* 30048*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 7765 | /* 30050*/ OPC_EmitInteger, MVT::i32, 1, |
| 7766 | /* 30053*/ OPC_EmitInteger, MVT::i32, 0, |
| 7767 | /* 30056*/ OPC_EmitInteger, MVT::i32, 0, |
| 7768 | /* 30059*/ OPC_EmitInteger, MVT::i32, 0, |
| 7769 | /* 30062*/ OPC_EmitInteger, MVT::i32, 0, |
| 7770 | /* 30065*/ OPC_EmitInteger, MVT::i32, 0, |
| 7771 | /* 30068*/ OPC_EmitInteger, MVT::i32, 0, |
| 7772 | /* 30071*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7773 | /* 30083*/ OPC_EmitInteger, MVT::i32, 1, |
| 7774 | /* 30086*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7775 | /* 30089*/ OPC_EmitInteger, MVT::i32, 0, |
| 7776 | /* 30092*/ OPC_EmitInteger, MVT::i32, 0, |
| 7777 | /* 30095*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_cm), 0, |
| 7778 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 7779 | // Src: (intrinsic_wo_chain:{ *:[f32] } 1783:{ *:[iPTR] }, R600_Reg32:{ *:[f32] }:$src0) - Complexity = 8 |
| 7780 | // Dst: (RECIPSQRT_IEEE_cm:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 7781 | /* 30114*/ 0, /*End of Scope*/ |
| 7782 | /* 30115*/ /*Scope*/ 26, /*->30142*/ |
| 7783 | /* 30116*/ OPC_CheckChild0Integer, 59|128,51/*6587*/, |
| 7784 | /* 30119*/ OPC_RecordChild1, // #0 = $src0 |
| 7785 | /* 30120*/ OPC_Scope, 9, /*->30131*/ // 2 children in Scope |
| 7786 | /* 30122*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 7787 | /* 30124*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CUBE_r600_pseudo), 0, |
| 7788 | MVT::v4f32, 1/*#Ops*/, 0, |
| 7789 | // Src: (intrinsic_wo_chain:{ *:[v4f32] } 6587:{ *:[iPTR] }, v4f32:{ *:[v4f32] }:$src0) - Complexity = 8 |
| 7790 | // Dst: (CUBE_r600_pseudo:{ *:[v4f32] } v4f32:{ *:[v4f32] }:$src0) |
| 7791 | /* 30131*/ /*Scope*/ 9, /*->30141*/ |
| 7792 | /* 30132*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7793 | /* 30134*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CUBE_eg_pseudo), 0, |
| 7794 | MVT::v4f32, 1/*#Ops*/, 0, |
| 7795 | // Src: (intrinsic_wo_chain:{ *:[v4f32] } 6587:{ *:[iPTR] }, v4f32:{ *:[v4f32] }:$src0) - Complexity = 8 |
| 7796 | // Dst: (CUBE_eg_pseudo:{ *:[v4f32] } v4f32:{ *:[v4f32] }:$src0) |
| 7797 | /* 30141*/ 0, /*End of Scope*/ |
| 7798 | /* 30142*/ 0, /*End of Scope*/ |
| 7799 | /* 30143*/ /*SwitchOpcode*/ 15, TARGET_VAL(AMDGPUISD::CONST_DATA_PTR),// ->30161 |
| 7800 | /* 30146*/ OPC_RecordChild0, // #0 = $addr |
| 7801 | /* 30147*/ OPC_MoveChild0, |
| 7802 | /* 30148*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetGlobalAddress), |
| 7803 | /* 30151*/ OPC_MoveParent, |
| 7804 | /* 30152*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7805 | /* 30154*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MOV_IMM_GLOBAL_ADDR), 0, |
| 7806 | MVT::iPTR, 1/*#Ops*/, 0, |
| 7807 | // Src: (AMDGPUconstdata_ptr:{ *:[iPTR] } (tglobaladdr:{ *:[iPTR] }):$addr) - Complexity = 6 |
| 7808 | // Dst: (MOV_IMM_GLOBAL_ADDR:{ *:[iPTR] } (tglobaladdr:{ *:[i32] }):$addr) |
| 7809 | /* 30161*/ /*SwitchOpcode*/ 20, TARGET_VAL(AMDGPUISD::STORE_MSKOR),// ->30184 |
| 7810 | /* 30164*/ OPC_RecordMemRef, |
| 7811 | /* 30165*/ OPC_RecordNode, // #0 = 'AMDGPUstore_mskor' chained node |
| 7812 | /* 30166*/ OPC_RecordChild1, // #1 = $rw_gpr |
| 7813 | /* 30167*/ OPC_CheckChild1Type, MVT::v4i32, |
| 7814 | /* 30169*/ OPC_RecordChild2, // #2 = $index_gpr |
| 7815 | /* 30170*/ OPC_CheckChild2Type, MVT::i32, |
| 7816 | /* 30172*/ OPC_CheckPredicate, 24, // Predicate_mskor_global |
| 7817 | /* 30174*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7818 | /* 30176*/ OPC_EmitMergeInputChains1_0, |
| 7819 | /* 30177*/ OPC_MorphNodeTo0, TARGET_VAL(R600::RAT_MSKOR), 0|OPFL_Chain|OPFL_MemRefs, |
| 7820 | 2/*#Ops*/, 1, 2, |
| 7821 | // Src: (AMDGPUstore_mskor v4i32:{ *:[v4i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr)<<P:Predicate_mskor_global>> - Complexity = 4 |
| 7822 | // Dst: (RAT_MSKOR v4i32:{ *:[v4i32] }:$rw_gpr, i32:{ *:[i32] }:$index_gpr) |
| 7823 | /* 30184*/ /*SwitchOpcode*/ 113, TARGET_VAL(ISD::ATOMIC_SWAP),// ->30300 |
| 7824 | /* 30187*/ OPC_RecordMemRef, |
| 7825 | /* 30188*/ OPC_RecordNode, // #0 = 'atomic_swap' chained node |
| 7826 | /* 30189*/ OPC_RecordChild1, // #1 = $ptr |
| 7827 | /* 30190*/ OPC_CheckChild1Type, MVT::i32, |
| 7828 | /* 30192*/ OPC_RecordChild2, // #2 = $data |
| 7829 | /* 30193*/ OPC_CheckType, MVT::i32, |
| 7830 | /* 30195*/ OPC_Scope, 42, /*->30239*/ // 2 children in Scope |
| 7831 | /* 30197*/ OPC_CheckPredicate, 22, // Predicate_atomic_swap_global_noret_32 |
| 7832 | /* 30199*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7833 | /* 30201*/ OPC_EmitMergeInputChains1_0, |
| 7834 | /* 30202*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7835 | MVT::v4i32, 0/*#Ops*/, // Results = #3 |
| 7836 | /* 30208*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7837 | /* 30211*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7838 | MVT::v4i32, 3/*#Ops*/, 3, 2, 4, // Results = #5 |
| 7839 | /* 30220*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_XCHG_INT_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7840 | MVT::v4i32, 2/*#Ops*/, 5, 1, // Results = #6 |
| 7841 | /* 30228*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7842 | /* 30231*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7843 | MVT::i32, 2/*#Ops*/, 6, 7, |
| 7844 | // Src: (atomic_swap:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_swap_global_noret_32>> - Complexity = 4 |
| 7845 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_XCHG_INT_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 7846 | /* 30239*/ /*Scope*/ 59, /*->30299*/ |
| 7847 | /* 30240*/ OPC_CheckPredicate, 23, // Predicate_atomic_swap_local_32 |
| 7848 | /* 30242*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7849 | /* 30244*/ OPC_EmitMergeInputChains1_0, |
| 7850 | /* 30245*/ OPC_EmitInteger, MVT::i32, 0, |
| 7851 | /* 30248*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7852 | /* 30260*/ OPC_EmitInteger, MVT::i32, 0, |
| 7853 | /* 30263*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7854 | /* 30275*/ OPC_EmitInteger, MVT::i32, 1, |
| 7855 | /* 30278*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7856 | /* 30281*/ OPC_EmitInteger, MVT::i32, 0, |
| 7857 | /* 30284*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_WRXCHG_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7858 | MVT::i32, 9/*#Ops*/, 1, 3, 4, 2, 5, 6, 7, 8, 9, |
| 7859 | // Src: (atomic_swap:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_swap_local_32>> - Complexity = 4 |
| 7860 | // Dst: (LDS_WRXCHG_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 7861 | /* 30299*/ 0, /*End of Scope*/ |
| 7862 | /* 30300*/ /*SwitchOpcode*/ 113, TARGET_VAL(ISD::ATOMIC_LOAD_MIN),// ->30416 |
| 7863 | /* 30303*/ OPC_RecordMemRef, |
| 7864 | /* 30304*/ OPC_RecordNode, // #0 = 'atomic_load_min' chained node |
| 7865 | /* 30305*/ OPC_RecordChild1, // #1 = $ptr |
| 7866 | /* 30306*/ OPC_CheckChild1Type, MVT::i32, |
| 7867 | /* 30308*/ OPC_RecordChild2, // #2 = $data |
| 7868 | /* 30309*/ OPC_CheckType, MVT::i32, |
| 7869 | /* 30311*/ OPC_Scope, 42, /*->30355*/ // 2 children in Scope |
| 7870 | /* 30313*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_min_global_noret_32 |
| 7871 | /* 30315*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7872 | /* 30317*/ OPC_EmitMergeInputChains1_0, |
| 7873 | /* 30318*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7874 | MVT::v4i32, 0/*#Ops*/, // Results = #3 |
| 7875 | /* 30324*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7876 | /* 30327*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7877 | MVT::v4i32, 3/*#Ops*/, 3, 2, 4, // Results = #5 |
| 7878 | /* 30336*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_MIN_INT_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7879 | MVT::v4i32, 2/*#Ops*/, 5, 1, // Results = #6 |
| 7880 | /* 30344*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7881 | /* 30347*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7882 | MVT::i32, 2/*#Ops*/, 6, 7, |
| 7883 | // Src: (atomic_load_min:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_load_min_global_noret_32>> - Complexity = 4 |
| 7884 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_MIN_INT_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 7885 | /* 30355*/ /*Scope*/ 59, /*->30415*/ |
| 7886 | /* 30356*/ OPC_CheckPredicate, 23, // Predicate_atomic_load_min_local_32 |
| 7887 | /* 30358*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7888 | /* 30360*/ OPC_EmitMergeInputChains1_0, |
| 7889 | /* 30361*/ OPC_EmitInteger, MVT::i32, 0, |
| 7890 | /* 30364*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7891 | /* 30376*/ OPC_EmitInteger, MVT::i32, 0, |
| 7892 | /* 30379*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7893 | /* 30391*/ OPC_EmitInteger, MVT::i32, 1, |
| 7894 | /* 30394*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7895 | /* 30397*/ OPC_EmitInteger, MVT::i32, 0, |
| 7896 | /* 30400*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_MIN_INT_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7897 | MVT::i32, 9/*#Ops*/, 1, 3, 4, 2, 5, 6, 7, 8, 9, |
| 7898 | // Src: (atomic_load_min:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_load_min_local_32>> - Complexity = 4 |
| 7899 | // Dst: (LDS_MIN_INT_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 7900 | /* 30415*/ 0, /*End of Scope*/ |
| 7901 | /* 30416*/ /*SwitchOpcode*/ 113, TARGET_VAL(ISD::ATOMIC_LOAD_UMIN),// ->30532 |
| 7902 | /* 30419*/ OPC_RecordMemRef, |
| 7903 | /* 30420*/ OPC_RecordNode, // #0 = 'atomic_load_umin' chained node |
| 7904 | /* 30421*/ OPC_RecordChild1, // #1 = $ptr |
| 7905 | /* 30422*/ OPC_CheckChild1Type, MVT::i32, |
| 7906 | /* 30424*/ OPC_RecordChild2, // #2 = $data |
| 7907 | /* 30425*/ OPC_CheckType, MVT::i32, |
| 7908 | /* 30427*/ OPC_Scope, 42, /*->30471*/ // 2 children in Scope |
| 7909 | /* 30429*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_umin_global_noret_32 |
| 7910 | /* 30431*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7911 | /* 30433*/ OPC_EmitMergeInputChains1_0, |
| 7912 | /* 30434*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7913 | MVT::v4i32, 0/*#Ops*/, // Results = #3 |
| 7914 | /* 30440*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7915 | /* 30443*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7916 | MVT::v4i32, 3/*#Ops*/, 3, 2, 4, // Results = #5 |
| 7917 | /* 30452*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_MIN_UINT_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7918 | MVT::v4i32, 2/*#Ops*/, 5, 1, // Results = #6 |
| 7919 | /* 30460*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7920 | /* 30463*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7921 | MVT::i32, 2/*#Ops*/, 6, 7, |
| 7922 | // Src: (atomic_load_umin:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_load_umin_global_noret_32>> - Complexity = 4 |
| 7923 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_MIN_UINT_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 7924 | /* 30471*/ /*Scope*/ 59, /*->30531*/ |
| 7925 | /* 30472*/ OPC_CheckPredicate, 23, // Predicate_atomic_load_umin_local_32 |
| 7926 | /* 30474*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7927 | /* 30476*/ OPC_EmitMergeInputChains1_0, |
| 7928 | /* 30477*/ OPC_EmitInteger, MVT::i32, 0, |
| 7929 | /* 30480*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7930 | /* 30492*/ OPC_EmitInteger, MVT::i32, 0, |
| 7931 | /* 30495*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7932 | /* 30507*/ OPC_EmitInteger, MVT::i32, 1, |
| 7933 | /* 30510*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7934 | /* 30513*/ OPC_EmitInteger, MVT::i32, 0, |
| 7935 | /* 30516*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_MIN_UINT_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7936 | MVT::i32, 9/*#Ops*/, 1, 3, 4, 2, 5, 6, 7, 8, 9, |
| 7937 | // Src: (atomic_load_umin:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_load_umin_local_32>> - Complexity = 4 |
| 7938 | // Dst: (LDS_MIN_UINT_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 7939 | /* 30531*/ 0, /*End of Scope*/ |
| 7940 | /* 30532*/ /*SwitchOpcode*/ 113, TARGET_VAL(ISD::ATOMIC_LOAD_MAX),// ->30648 |
| 7941 | /* 30535*/ OPC_RecordMemRef, |
| 7942 | /* 30536*/ OPC_RecordNode, // #0 = 'atomic_load_max' chained node |
| 7943 | /* 30537*/ OPC_RecordChild1, // #1 = $ptr |
| 7944 | /* 30538*/ OPC_CheckChild1Type, MVT::i32, |
| 7945 | /* 30540*/ OPC_RecordChild2, // #2 = $data |
| 7946 | /* 30541*/ OPC_CheckType, MVT::i32, |
| 7947 | /* 30543*/ OPC_Scope, 42, /*->30587*/ // 2 children in Scope |
| 7948 | /* 30545*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_max_global_noret_32 |
| 7949 | /* 30547*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7950 | /* 30549*/ OPC_EmitMergeInputChains1_0, |
| 7951 | /* 30550*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7952 | MVT::v4i32, 0/*#Ops*/, // Results = #3 |
| 7953 | /* 30556*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7954 | /* 30559*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7955 | MVT::v4i32, 3/*#Ops*/, 3, 2, 4, // Results = #5 |
| 7956 | /* 30568*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_MAX_INT_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7957 | MVT::v4i32, 2/*#Ops*/, 5, 1, // Results = #6 |
| 7958 | /* 30576*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7959 | /* 30579*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7960 | MVT::i32, 2/*#Ops*/, 6, 7, |
| 7961 | // Src: (atomic_load_max:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_load_max_global_noret_32>> - Complexity = 4 |
| 7962 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_MAX_INT_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 7963 | /* 30587*/ /*Scope*/ 59, /*->30647*/ |
| 7964 | /* 30588*/ OPC_CheckPredicate, 23, // Predicate_atomic_load_max_local_32 |
| 7965 | /* 30590*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7966 | /* 30592*/ OPC_EmitMergeInputChains1_0, |
| 7967 | /* 30593*/ OPC_EmitInteger, MVT::i32, 0, |
| 7968 | /* 30596*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7969 | /* 30608*/ OPC_EmitInteger, MVT::i32, 0, |
| 7970 | /* 30611*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 7971 | /* 30623*/ OPC_EmitInteger, MVT::i32, 1, |
| 7972 | /* 30626*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 7973 | /* 30629*/ OPC_EmitInteger, MVT::i32, 0, |
| 7974 | /* 30632*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_MAX_INT_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7975 | MVT::i32, 9/*#Ops*/, 1, 3, 4, 2, 5, 6, 7, 8, 9, |
| 7976 | // Src: (atomic_load_max:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_load_max_local_32>> - Complexity = 4 |
| 7977 | // Dst: (LDS_MAX_INT_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 7978 | /* 30647*/ 0, /*End of Scope*/ |
| 7979 | /* 30648*/ /*SwitchOpcode*/ 113, TARGET_VAL(ISD::ATOMIC_LOAD_UMAX),// ->30764 |
| 7980 | /* 30651*/ OPC_RecordMemRef, |
| 7981 | /* 30652*/ OPC_RecordNode, // #0 = 'atomic_load_umax' chained node |
| 7982 | /* 30653*/ OPC_RecordChild1, // #1 = $ptr |
| 7983 | /* 30654*/ OPC_CheckChild1Type, MVT::i32, |
| 7984 | /* 30656*/ OPC_RecordChild2, // #2 = $data |
| 7985 | /* 30657*/ OPC_CheckType, MVT::i32, |
| 7986 | /* 30659*/ OPC_Scope, 42, /*->30703*/ // 2 children in Scope |
| 7987 | /* 30661*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_umax_global_noret_32 |
| 7988 | /* 30663*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 7989 | /* 30665*/ OPC_EmitMergeInputChains1_0, |
| 7990 | /* 30666*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 7991 | MVT::v4i32, 0/*#Ops*/, // Results = #3 |
| 7992 | /* 30672*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 7993 | /* 30675*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 7994 | MVT::v4i32, 3/*#Ops*/, 3, 2, 4, // Results = #5 |
| 7995 | /* 30684*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_MAX_UINT_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 7996 | MVT::v4i32, 2/*#Ops*/, 5, 1, // Results = #6 |
| 7997 | /* 30692*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 7998 | /* 30695*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 7999 | MVT::i32, 2/*#Ops*/, 6, 7, |
| 8000 | // Src: (atomic_load_umax:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_load_umax_global_noret_32>> - Complexity = 4 |
| 8001 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_MAX_UINT_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 8002 | /* 30703*/ /*Scope*/ 59, /*->30763*/ |
| 8003 | /* 30704*/ OPC_CheckPredicate, 23, // Predicate_atomic_load_umax_local_32 |
| 8004 | /* 30706*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8005 | /* 30708*/ OPC_EmitMergeInputChains1_0, |
| 8006 | /* 30709*/ OPC_EmitInteger, MVT::i32, 0, |
| 8007 | /* 30712*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8008 | /* 30724*/ OPC_EmitInteger, MVT::i32, 0, |
| 8009 | /* 30727*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8010 | /* 30739*/ OPC_EmitInteger, MVT::i32, 1, |
| 8011 | /* 30742*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8012 | /* 30745*/ OPC_EmitInteger, MVT::i32, 0, |
| 8013 | /* 30748*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_MAX_UINT_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 8014 | MVT::i32, 9/*#Ops*/, 1, 3, 4, 2, 5, 6, 7, 8, 9, |
| 8015 | // Src: (atomic_load_umax:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_load_umax_local_32>> - Complexity = 4 |
| 8016 | // Dst: (LDS_MAX_UINT_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 8017 | /* 30763*/ 0, /*End of Scope*/ |
| 8018 | /* 30764*/ /*SwitchOpcode*/ 113, TARGET_VAL(ISD::ATOMIC_LOAD_AND),// ->30880 |
| 8019 | /* 30767*/ OPC_RecordMemRef, |
| 8020 | /* 30768*/ OPC_RecordNode, // #0 = 'atomic_load_and' chained node |
| 8021 | /* 30769*/ OPC_RecordChild1, // #1 = $ptr |
| 8022 | /* 30770*/ OPC_CheckChild1Type, MVT::i32, |
| 8023 | /* 30772*/ OPC_RecordChild2, // #2 = $data |
| 8024 | /* 30773*/ OPC_CheckType, MVT::i32, |
| 8025 | /* 30775*/ OPC_Scope, 42, /*->30819*/ // 2 children in Scope |
| 8026 | /* 30777*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_and_global_noret_32 |
| 8027 | /* 30779*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8028 | /* 30781*/ OPC_EmitMergeInputChains1_0, |
| 8029 | /* 30782*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 8030 | MVT::v4i32, 0/*#Ops*/, // Results = #3 |
| 8031 | /* 30788*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 8032 | /* 30791*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 8033 | MVT::v4i32, 3/*#Ops*/, 3, 2, 4, // Results = #5 |
| 8034 | /* 30800*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_AND_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 8035 | MVT::v4i32, 2/*#Ops*/, 5, 1, // Results = #6 |
| 8036 | /* 30808*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 8037 | /* 30811*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 8038 | MVT::i32, 2/*#Ops*/, 6, 7, |
| 8039 | // Src: (atomic_load_and:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_load_and_global_noret_32>> - Complexity = 4 |
| 8040 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_AND_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 8041 | /* 30819*/ /*Scope*/ 59, /*->30879*/ |
| 8042 | /* 30820*/ OPC_CheckPredicate, 23, // Predicate_atomic_load_and_local_32 |
| 8043 | /* 30822*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8044 | /* 30824*/ OPC_EmitMergeInputChains1_0, |
| 8045 | /* 30825*/ OPC_EmitInteger, MVT::i32, 0, |
| 8046 | /* 30828*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8047 | /* 30840*/ OPC_EmitInteger, MVT::i32, 0, |
| 8048 | /* 30843*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8049 | /* 30855*/ OPC_EmitInteger, MVT::i32, 1, |
| 8050 | /* 30858*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8051 | /* 30861*/ OPC_EmitInteger, MVT::i32, 0, |
| 8052 | /* 30864*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_AND_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 8053 | MVT::i32, 9/*#Ops*/, 1, 3, 4, 2, 5, 6, 7, 8, 9, |
| 8054 | // Src: (atomic_load_and:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_load_and_local_32>> - Complexity = 4 |
| 8055 | // Dst: (LDS_AND_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 8056 | /* 30879*/ 0, /*End of Scope*/ |
| 8057 | /* 30880*/ /*SwitchOpcode*/ 113, TARGET_VAL(ISD::ATOMIC_LOAD_OR),// ->30996 |
| 8058 | /* 30883*/ OPC_RecordMemRef, |
| 8059 | /* 30884*/ OPC_RecordNode, // #0 = 'atomic_load_or' chained node |
| 8060 | /* 30885*/ OPC_RecordChild1, // #1 = $ptr |
| 8061 | /* 30886*/ OPC_CheckChild1Type, MVT::i32, |
| 8062 | /* 30888*/ OPC_RecordChild2, // #2 = $data |
| 8063 | /* 30889*/ OPC_CheckType, MVT::i32, |
| 8064 | /* 30891*/ OPC_Scope, 42, /*->30935*/ // 2 children in Scope |
| 8065 | /* 30893*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_or_global_noret_32 |
| 8066 | /* 30895*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8067 | /* 30897*/ OPC_EmitMergeInputChains1_0, |
| 8068 | /* 30898*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 8069 | MVT::v4i32, 0/*#Ops*/, // Results = #3 |
| 8070 | /* 30904*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 8071 | /* 30907*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 8072 | MVT::v4i32, 3/*#Ops*/, 3, 2, 4, // Results = #5 |
| 8073 | /* 30916*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_OR_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 8074 | MVT::v4i32, 2/*#Ops*/, 5, 1, // Results = #6 |
| 8075 | /* 30924*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 8076 | /* 30927*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 8077 | MVT::i32, 2/*#Ops*/, 6, 7, |
| 8078 | // Src: (atomic_load_or:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_load_or_global_noret_32>> - Complexity = 4 |
| 8079 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_OR_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 8080 | /* 30935*/ /*Scope*/ 59, /*->30995*/ |
| 8081 | /* 30936*/ OPC_CheckPredicate, 23, // Predicate_atomic_load_or_local_32 |
| 8082 | /* 30938*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8083 | /* 30940*/ OPC_EmitMergeInputChains1_0, |
| 8084 | /* 30941*/ OPC_EmitInteger, MVT::i32, 0, |
| 8085 | /* 30944*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8086 | /* 30956*/ OPC_EmitInteger, MVT::i32, 0, |
| 8087 | /* 30959*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8088 | /* 30971*/ OPC_EmitInteger, MVT::i32, 1, |
| 8089 | /* 30974*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8090 | /* 30977*/ OPC_EmitInteger, MVT::i32, 0, |
| 8091 | /* 30980*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_OR_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 8092 | MVT::i32, 9/*#Ops*/, 1, 3, 4, 2, 5, 6, 7, 8, 9, |
| 8093 | // Src: (atomic_load_or:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_load_or_local_32>> - Complexity = 4 |
| 8094 | // Dst: (LDS_OR_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 8095 | /* 30995*/ 0, /*End of Scope*/ |
| 8096 | /* 30996*/ /*SwitchOpcode*/ 113, TARGET_VAL(ISD::ATOMIC_LOAD_XOR),// ->31112 |
| 8097 | /* 30999*/ OPC_RecordMemRef, |
| 8098 | /* 31000*/ OPC_RecordNode, // #0 = 'atomic_load_xor' chained node |
| 8099 | /* 31001*/ OPC_RecordChild1, // #1 = $ptr |
| 8100 | /* 31002*/ OPC_CheckChild1Type, MVT::i32, |
| 8101 | /* 31004*/ OPC_RecordChild2, // #2 = $data |
| 8102 | /* 31005*/ OPC_CheckType, MVT::i32, |
| 8103 | /* 31007*/ OPC_Scope, 42, /*->31051*/ // 2 children in Scope |
| 8104 | /* 31009*/ OPC_CheckPredicate, 22, // Predicate_atomic_load_xor_global_noret_32 |
| 8105 | /* 31011*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8106 | /* 31013*/ OPC_EmitMergeInputChains1_0, |
| 8107 | /* 31014*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 8108 | MVT::v4i32, 0/*#Ops*/, // Results = #3 |
| 8109 | /* 31020*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 8110 | /* 31023*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 8111 | MVT::v4i32, 3/*#Ops*/, 3, 2, 4, // Results = #5 |
| 8112 | /* 31032*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_XOR_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 8113 | MVT::v4i32, 2/*#Ops*/, 5, 1, // Results = #6 |
| 8114 | /* 31040*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 8115 | /* 31043*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 8116 | MVT::i32, 2/*#Ops*/, 6, 7, |
| 8117 | // Src: (atomic_load_xor:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_load_xor_global_noret_32>> - Complexity = 4 |
| 8118 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_XOR_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 8119 | /* 31051*/ /*Scope*/ 59, /*->31111*/ |
| 8120 | /* 31052*/ OPC_CheckPredicate, 23, // Predicate_atomic_load_xor_local_32 |
| 8121 | /* 31054*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8122 | /* 31056*/ OPC_EmitMergeInputChains1_0, |
| 8123 | /* 31057*/ OPC_EmitInteger, MVT::i32, 0, |
| 8124 | /* 31060*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8125 | /* 31072*/ OPC_EmitInteger, MVT::i32, 0, |
| 8126 | /* 31075*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8127 | /* 31087*/ OPC_EmitInteger, MVT::i32, 1, |
| 8128 | /* 31090*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8129 | /* 31093*/ OPC_EmitInteger, MVT::i32, 0, |
| 8130 | /* 31096*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_XOR_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 8131 | MVT::i32, 9/*#Ops*/, 1, 3, 4, 2, 5, 6, 7, 8, 9, |
| 8132 | // Src: (atomic_load_xor:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1)<<P:Predicate_atomic_load_xor_local_32>> - Complexity = 4 |
| 8133 | // Dst: (LDS_XOR_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 8134 | /* 31111*/ 0, /*End of Scope*/ |
| 8135 | /* 31112*/ /*SwitchOpcode*/ 16|128,1/*144*/, TARGET_VAL(ISD::ATOMIC_CMP_SWAP),// ->31260 |
| 8136 | /* 31116*/ OPC_RecordMemRef, |
| 8137 | /* 31117*/ OPC_RecordNode, // #0 = 'atomic_cmp_swap' chained node |
| 8138 | /* 31118*/ OPC_RecordChild1, // #1 = $ptr |
| 8139 | /* 31119*/ OPC_CheckChild1Type, MVT::i32, |
| 8140 | /* 31121*/ OPC_RecordChild2, // #2 = $cmp |
| 8141 | /* 31122*/ OPC_RecordChild3, // #3 = $data |
| 8142 | /* 31123*/ OPC_CheckType, MVT::i32, |
| 8143 | /* 31125*/ OPC_Scope, 54, /*->31181*/ // 2 children in Scope |
| 8144 | /* 31127*/ OPC_CheckPredicate, 25, // Predicate_atomic_cmp_swap_global_noret |
| 8145 | /* 31129*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8146 | /* 31131*/ OPC_EmitMergeInputChains1_0, |
| 8147 | /* 31132*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::IMPLICIT_DEF), 0, |
| 8148 | MVT::v4i32, 0/*#Ops*/, // Results = #4 |
| 8149 | /* 31138*/ OPC_EmitInteger, MVT::i32, R600::sub3, |
| 8150 | /* 31141*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 8151 | MVT::v4i32, 3/*#Ops*/, 4, 2, 5, // Results = #6 |
| 8152 | /* 31150*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 8153 | /* 31153*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 8154 | MVT::v4i32, 3/*#Ops*/, 6, 3, 7, // Results = #8 |
| 8155 | /* 31162*/ OPC_EmitNode1, TARGET_VAL(R600::RAT_ATOMIC_CMPXCHG_INT_NORET), 0|OPFL_Chain|OPFL_MemRefs, |
| 8156 | MVT::v4i32, 2/*#Ops*/, 8, 1, // Results = #9 |
| 8157 | /* 31170*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 8158 | /* 31173*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0|OPFL_Chain, |
| 8159 | MVT::i32, 2/*#Ops*/, 9, 10, |
| 8160 | // Src: (atomic_cmp_swap:{ *:[i32] } i32:{ *:[i32] }:$ptr, i32:{ *:[i32] }:$cmp, i32:{ *:[i32] }:$data)<<P:Predicate_atomic_cmp_swap_global_noret>> - Complexity = 4 |
| 8161 | // Dst: (EXTRACT_SUBREG:{ *:[i32] } (RAT_ATOMIC_CMPXCHG_INT_NORET:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (INSERT_SUBREG:{ *:[v4i32] } (IMPLICIT_DEF:{ *:[v4i32] }), ?:{ *:[i32] }:$cmp, sub3:{ *:[i32] }), ?:{ *:[i32] }:$data, sub0:{ *:[i32] }), ?:{ *:[i32] }:$ptr), sub1:{ *:[i32] }) |
| 8162 | /* 31181*/ /*Scope*/ 77, /*->31259*/ |
| 8163 | /* 31182*/ OPC_CheckPredicate, 23, // Predicate_atomic_cmp_swap_local_32 |
| 8164 | /* 31184*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8165 | /* 31186*/ OPC_EmitMergeInputChains1_0, |
| 8166 | /* 31187*/ OPC_EmitInteger, MVT::i32, 0, |
| 8167 | /* 31190*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8168 | /* 31202*/ OPC_EmitInteger, MVT::i32, 0, |
| 8169 | /* 31205*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8170 | /* 31217*/ OPC_EmitInteger, MVT::i32, 0, |
| 8171 | /* 31220*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8172 | /* 31232*/ OPC_EmitInteger, MVT::i32, 1, |
| 8173 | /* 31235*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8174 | /* 31238*/ OPC_EmitInteger, MVT::i32, 0, |
| 8175 | /* 31241*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LDS_CMPST_RET), 0|OPFL_Chain|OPFL_MemRefs, |
| 8176 | MVT::i32, 12/*#Ops*/, 1, 4, 5, 2, 6, 7, 3, 8, 9, 10, 11, 12, |
| 8177 | // Src: (atomic_cmp_swap:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2)<<P:Predicate_atomic_cmp_swap_local_32>> - Complexity = 4 |
| 8178 | // Dst: (LDS_CMPST_RET:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 8179 | /* 31259*/ 0, /*End of Scope*/ |
| 8180 | /* 31260*/ /*SwitchOpcode*/ 57, TARGET_VAL(ISD::BITCAST),// ->31320 |
| 8181 | /* 31263*/ OPC_RecordChild0, // #0 = $src0 |
| 8182 | /* 31264*/ OPC_SwitchType /*6 cases */, 7, MVT::i32,// ->31274 |
| 8183 | /* 31267*/ OPC_CheckChild0Type, MVT::f32, |
| 8184 | /* 31269*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8185 | /* 31271*/ OPC_CompleteMatch, 1, 0, |
| 8186 | // Src: (bitconvert:{ *:[i32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 8187 | // Dst: R600_Reg32:{ *:[i32] }:$src0 |
| 8188 | /* 31274*/ /*SwitchType*/ 7, MVT::f32,// ->31283 |
| 8189 | /* 31276*/ OPC_CheckChild0Type, MVT::i32, |
| 8190 | /* 31278*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8191 | /* 31280*/ OPC_CompleteMatch, 1, 0, |
| 8192 | // Src: (bitconvert:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 8193 | // Dst: R600_Reg32:{ *:[f32] }:$src0 |
| 8194 | /* 31283*/ /*SwitchType*/ 7, MVT::v2i32,// ->31292 |
| 8195 | /* 31285*/ OPC_CheckChild0Type, MVT::v2f32, |
| 8196 | /* 31287*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8197 | /* 31289*/ OPC_CompleteMatch, 1, 0, |
| 8198 | // Src: (bitconvert:{ *:[v2i32] } R600_Reg64:{ *:[v2f32] }:$src0) - Complexity = 3 |
| 8199 | // Dst: R600_Reg64:{ *:[v2i32] }:$src0 |
| 8200 | /* 31292*/ /*SwitchType*/ 7, MVT::v4i32,// ->31301 |
| 8201 | /* 31294*/ OPC_CheckChild0Type, MVT::v4f32, |
| 8202 | /* 31296*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8203 | /* 31298*/ OPC_CompleteMatch, 1, 0, |
| 8204 | // Src: (bitconvert:{ *:[v4i32] } R600_Reg128:{ *:[v4f32] }:$src0) - Complexity = 3 |
| 8205 | // Dst: R600_Reg128:{ *:[v4i32] }:$src0 |
| 8206 | /* 31301*/ /*SwitchType*/ 7, MVT::v2f32,// ->31310 |
| 8207 | /* 31303*/ OPC_CheckChild0Type, MVT::v2i32, |
| 8208 | /* 31305*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8209 | /* 31307*/ OPC_CompleteMatch, 1, 0, |
| 8210 | // Src: (bitconvert:{ *:[v2f32] } R600_Reg64:{ *:[v2i32] }:$src0) - Complexity = 3 |
| 8211 | // Dst: R600_Reg64:{ *:[v2f32] }:$src0 |
| 8212 | /* 31310*/ /*SwitchType*/ 7, MVT::v4f32,// ->31319 |
| 8213 | /* 31312*/ OPC_CheckChild0Type, MVT::v4i32, |
| 8214 | /* 31314*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8215 | /* 31316*/ OPC_CompleteMatch, 1, 0, |
| 8216 | // Src: (bitconvert:{ *:[v4f32] } R600_Reg128:{ *:[v4i32] }:$src0) - Complexity = 3 |
| 8217 | // Dst: R600_Reg128:{ *:[v4f32] }:$src0 |
| 8218 | /* 31319*/ 0, // EndSwitchType |
| 8219 | /* 31320*/ /*SwitchOpcode*/ 8, TARGET_VAL(AMDGPUISD::DWORDADDR),// ->31331 |
| 8220 | /* 31323*/ OPC_RecordChild0, // #0 = $addr |
| 8221 | /* 31324*/ OPC_CheckType, MVT::i32, |
| 8222 | /* 31326*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8223 | /* 31328*/ OPC_CompleteMatch, 1, 0, |
| 8224 | // Src: (AMDGPUdwordaddr:{ *:[i32] } R600_Reg32:{ *:[i32] }:$addr) - Complexity = 3 |
| 8225 | // Dst: R600_Reg32:{ *:[i32] }:$addr |
| 8226 | /* 31331*/ /*SwitchOpcode*/ 9, TARGET_VAL(AMDGPUISD::DUMMY_CHAIN),// ->31343 |
| 8227 | /* 31334*/ OPC_RecordNode, // #0 = 'R600dummy_chain' chained node |
| 8228 | /* 31335*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8229 | /* 31337*/ OPC_EmitMergeInputChains1_0, |
| 8230 | /* 31338*/ OPC_MorphNodeTo0, TARGET_VAL(R600::DUMMY_CHAIN), 0|OPFL_Chain, |
| 8231 | 0/*#Ops*/, |
| 8232 | // Src: (R600dummy_chain) - Complexity = 3 |
| 8233 | // Dst: (DUMMY_CHAIN) |
| 8234 | /* 31343*/ /*SwitchOpcode*/ 104, TARGET_VAL(ISD::SUB),// ->31450 |
| 8235 | /* 31346*/ OPC_RecordChild0, // #0 = $src0 |
| 8236 | /* 31347*/ OPC_RecordChild1, // #1 = $src1 |
| 8237 | /* 31348*/ OPC_CheckType, MVT::i32, |
| 8238 | /* 31350*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8239 | /* 31352*/ OPC_EmitInteger, MVT::i32, 0, |
| 8240 | /* 31355*/ OPC_EmitInteger, MVT::i32, 0, |
| 8241 | /* 31358*/ OPC_EmitInteger, MVT::i32, 1, |
| 8242 | /* 31361*/ OPC_EmitInteger, MVT::i32, 0, |
| 8243 | /* 31364*/ OPC_EmitInteger, MVT::i32, 0, |
| 8244 | /* 31367*/ OPC_EmitInteger, MVT::i32, 0, |
| 8245 | /* 31370*/ OPC_EmitInteger, MVT::i32, 0, |
| 8246 | /* 31373*/ OPC_EmitInteger, MVT::i32, 0, |
| 8247 | /* 31376*/ OPC_EmitInteger, MVT::i32, 0, |
| 8248 | /* 31379*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8249 | /* 31391*/ OPC_EmitInteger, MVT::i32, 0, |
| 8250 | /* 31394*/ OPC_EmitInteger, MVT::i32, 0, |
| 8251 | /* 31397*/ OPC_EmitInteger, MVT::i32, 0, |
| 8252 | /* 31400*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8253 | /* 31412*/ OPC_EmitInteger, MVT::i32, 1, |
| 8254 | /* 31415*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8255 | /* 31418*/ OPC_EmitInteger, MVT::i32, 0, |
| 8256 | /* 31421*/ OPC_EmitInteger, MVT::i32, 0, |
| 8257 | /* 31424*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SUB_INT), 0, |
| 8258 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8259 | // Src: (sub:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8260 | // Dst: (SUB_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8261 | /* 31450*/ /*SwitchOpcode*/ 104, TARGET_VAL(ISD::SMAX),// ->31557 |
| 8262 | /* 31453*/ OPC_RecordChild0, // #0 = $src0 |
| 8263 | /* 31454*/ OPC_RecordChild1, // #1 = $src1 |
| 8264 | /* 31455*/ OPC_CheckType, MVT::i32, |
| 8265 | /* 31457*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8266 | /* 31459*/ OPC_EmitInteger, MVT::i32, 0, |
| 8267 | /* 31462*/ OPC_EmitInteger, MVT::i32, 0, |
| 8268 | /* 31465*/ OPC_EmitInteger, MVT::i32, 1, |
| 8269 | /* 31468*/ OPC_EmitInteger, MVT::i32, 0, |
| 8270 | /* 31471*/ OPC_EmitInteger, MVT::i32, 0, |
| 8271 | /* 31474*/ OPC_EmitInteger, MVT::i32, 0, |
| 8272 | /* 31477*/ OPC_EmitInteger, MVT::i32, 0, |
| 8273 | /* 31480*/ OPC_EmitInteger, MVT::i32, 0, |
| 8274 | /* 31483*/ OPC_EmitInteger, MVT::i32, 0, |
| 8275 | /* 31486*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8276 | /* 31498*/ OPC_EmitInteger, MVT::i32, 0, |
| 8277 | /* 31501*/ OPC_EmitInteger, MVT::i32, 0, |
| 8278 | /* 31504*/ OPC_EmitInteger, MVT::i32, 0, |
| 8279 | /* 31507*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8280 | /* 31519*/ OPC_EmitInteger, MVT::i32, 1, |
| 8281 | /* 31522*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8282 | /* 31525*/ OPC_EmitInteger, MVT::i32, 0, |
| 8283 | /* 31528*/ OPC_EmitInteger, MVT::i32, 0, |
| 8284 | /* 31531*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MAX_INT), 0, |
| 8285 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8286 | // Src: (smax:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8287 | // Dst: (MAX_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8288 | /* 31557*/ /*SwitchOpcode*/ 104, TARGET_VAL(ISD::SMIN),// ->31664 |
| 8289 | /* 31560*/ OPC_RecordChild0, // #0 = $src0 |
| 8290 | /* 31561*/ OPC_RecordChild1, // #1 = $src1 |
| 8291 | /* 31562*/ OPC_CheckType, MVT::i32, |
| 8292 | /* 31564*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8293 | /* 31566*/ OPC_EmitInteger, MVT::i32, 0, |
| 8294 | /* 31569*/ OPC_EmitInteger, MVT::i32, 0, |
| 8295 | /* 31572*/ OPC_EmitInteger, MVT::i32, 1, |
| 8296 | /* 31575*/ OPC_EmitInteger, MVT::i32, 0, |
| 8297 | /* 31578*/ OPC_EmitInteger, MVT::i32, 0, |
| 8298 | /* 31581*/ OPC_EmitInteger, MVT::i32, 0, |
| 8299 | /* 31584*/ OPC_EmitInteger, MVT::i32, 0, |
| 8300 | /* 31587*/ OPC_EmitInteger, MVT::i32, 0, |
| 8301 | /* 31590*/ OPC_EmitInteger, MVT::i32, 0, |
| 8302 | /* 31593*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8303 | /* 31605*/ OPC_EmitInteger, MVT::i32, 0, |
| 8304 | /* 31608*/ OPC_EmitInteger, MVT::i32, 0, |
| 8305 | /* 31611*/ OPC_EmitInteger, MVT::i32, 0, |
| 8306 | /* 31614*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8307 | /* 31626*/ OPC_EmitInteger, MVT::i32, 1, |
| 8308 | /* 31629*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8309 | /* 31632*/ OPC_EmitInteger, MVT::i32, 0, |
| 8310 | /* 31635*/ OPC_EmitInteger, MVT::i32, 0, |
| 8311 | /* 31638*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MIN_INT), 0, |
| 8312 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8313 | // Src: (smin:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8314 | // Dst: (MIN_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8315 | /* 31664*/ /*SwitchOpcode*/ 104, TARGET_VAL(ISD::UMAX),// ->31771 |
| 8316 | /* 31667*/ OPC_RecordChild0, // #0 = $src0 |
| 8317 | /* 31668*/ OPC_RecordChild1, // #1 = $src1 |
| 8318 | /* 31669*/ OPC_CheckType, MVT::i32, |
| 8319 | /* 31671*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8320 | /* 31673*/ OPC_EmitInteger, MVT::i32, 0, |
| 8321 | /* 31676*/ OPC_EmitInteger, MVT::i32, 0, |
| 8322 | /* 31679*/ OPC_EmitInteger, MVT::i32, 1, |
| 8323 | /* 31682*/ OPC_EmitInteger, MVT::i32, 0, |
| 8324 | /* 31685*/ OPC_EmitInteger, MVT::i32, 0, |
| 8325 | /* 31688*/ OPC_EmitInteger, MVT::i32, 0, |
| 8326 | /* 31691*/ OPC_EmitInteger, MVT::i32, 0, |
| 8327 | /* 31694*/ OPC_EmitInteger, MVT::i32, 0, |
| 8328 | /* 31697*/ OPC_EmitInteger, MVT::i32, 0, |
| 8329 | /* 31700*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8330 | /* 31712*/ OPC_EmitInteger, MVT::i32, 0, |
| 8331 | /* 31715*/ OPC_EmitInteger, MVT::i32, 0, |
| 8332 | /* 31718*/ OPC_EmitInteger, MVT::i32, 0, |
| 8333 | /* 31721*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8334 | /* 31733*/ OPC_EmitInteger, MVT::i32, 1, |
| 8335 | /* 31736*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8336 | /* 31739*/ OPC_EmitInteger, MVT::i32, 0, |
| 8337 | /* 31742*/ OPC_EmitInteger, MVT::i32, 0, |
| 8338 | /* 31745*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MAX_UINT), 0, |
| 8339 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8340 | // Src: (umax:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8341 | // Dst: (MAX_UINT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8342 | /* 31771*/ /*SwitchOpcode*/ 104, TARGET_VAL(ISD::UMIN),// ->31878 |
| 8343 | /* 31774*/ OPC_RecordChild0, // #0 = $src0 |
| 8344 | /* 31775*/ OPC_RecordChild1, // #1 = $src1 |
| 8345 | /* 31776*/ OPC_CheckType, MVT::i32, |
| 8346 | /* 31778*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8347 | /* 31780*/ OPC_EmitInteger, MVT::i32, 0, |
| 8348 | /* 31783*/ OPC_EmitInteger, MVT::i32, 0, |
| 8349 | /* 31786*/ OPC_EmitInteger, MVT::i32, 1, |
| 8350 | /* 31789*/ OPC_EmitInteger, MVT::i32, 0, |
| 8351 | /* 31792*/ OPC_EmitInteger, MVT::i32, 0, |
| 8352 | /* 31795*/ OPC_EmitInteger, MVT::i32, 0, |
| 8353 | /* 31798*/ OPC_EmitInteger, MVT::i32, 0, |
| 8354 | /* 31801*/ OPC_EmitInteger, MVT::i32, 0, |
| 8355 | /* 31804*/ OPC_EmitInteger, MVT::i32, 0, |
| 8356 | /* 31807*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8357 | /* 31819*/ OPC_EmitInteger, MVT::i32, 0, |
| 8358 | /* 31822*/ OPC_EmitInteger, MVT::i32, 0, |
| 8359 | /* 31825*/ OPC_EmitInteger, MVT::i32, 0, |
| 8360 | /* 31828*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8361 | /* 31840*/ OPC_EmitInteger, MVT::i32, 1, |
| 8362 | /* 31843*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8363 | /* 31846*/ OPC_EmitInteger, MVT::i32, 0, |
| 8364 | /* 31849*/ OPC_EmitInteger, MVT::i32, 0, |
| 8365 | /* 31852*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MIN_UINT), 0, |
| 8366 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8367 | // Src: (umin:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8368 | // Dst: (MIN_UINT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8369 | /* 31878*/ /*SwitchOpcode*/ 78|128,1/*206*/, TARGET_VAL(ISD::FP_TO_SINT),// ->32088 |
| 8370 | /* 31882*/ OPC_RecordChild0, // #0 = $src0 |
| 8371 | /* 31883*/ OPC_CheckChild0Type, MVT::f32, |
| 8372 | /* 31885*/ OPC_CheckType, MVT::i32, |
| 8373 | /* 31887*/ OPC_Scope, 66, /*->31955*/ // 2 children in Scope |
| 8374 | /* 31889*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 8375 | /* 31891*/ OPC_EmitInteger, MVT::i32, 1, |
| 8376 | /* 31894*/ OPC_EmitInteger, MVT::i32, 0, |
| 8377 | /* 31897*/ OPC_EmitInteger, MVT::i32, 0, |
| 8378 | /* 31900*/ OPC_EmitInteger, MVT::i32, 0, |
| 8379 | /* 31903*/ OPC_EmitInteger, MVT::i32, 0, |
| 8380 | /* 31906*/ OPC_EmitInteger, MVT::i32, 0, |
| 8381 | /* 31909*/ OPC_EmitInteger, MVT::i32, 0, |
| 8382 | /* 31912*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8383 | /* 31924*/ OPC_EmitInteger, MVT::i32, 1, |
| 8384 | /* 31927*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8385 | /* 31930*/ OPC_EmitInteger, MVT::i32, 0, |
| 8386 | /* 31933*/ OPC_EmitInteger, MVT::i32, 0, |
| 8387 | /* 31936*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FLT_TO_INT_r600), 0, |
| 8388 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 8389 | // Src: (fp_to_sint:{ *:[i32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 8390 | // Dst: (FLT_TO_INT_r600:{ *:[i32] } R600_Reg32:{ *:[f32] }:$src0) |
| 8391 | /* 31955*/ /*Scope*/ 2|128,1/*130*/, /*->32087*/ |
| 8392 | /* 31957*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8393 | /* 31959*/ OPC_EmitInteger, MVT::i32, 1, |
| 8394 | /* 31962*/ OPC_EmitInteger, MVT::i32, 0, |
| 8395 | /* 31965*/ OPC_EmitInteger, MVT::i32, 0, |
| 8396 | /* 31968*/ OPC_EmitInteger, MVT::i32, 0, |
| 8397 | /* 31971*/ OPC_EmitInteger, MVT::i32, 1, |
| 8398 | /* 31974*/ OPC_EmitInteger, MVT::i32, 0, |
| 8399 | /* 31977*/ OPC_EmitInteger, MVT::i32, 0, |
| 8400 | /* 31980*/ OPC_EmitInteger, MVT::i32, 0, |
| 8401 | /* 31983*/ OPC_EmitInteger, MVT::i32, 0, |
| 8402 | /* 31986*/ OPC_EmitInteger, MVT::i32, 0, |
| 8403 | /* 31989*/ OPC_EmitInteger, MVT::i32, 0, |
| 8404 | /* 31992*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8405 | /* 32004*/ OPC_EmitInteger, MVT::i32, 1, |
| 8406 | /* 32007*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8407 | /* 32010*/ OPC_EmitInteger, MVT::i32, 0, |
| 8408 | /* 32013*/ OPC_EmitInteger, MVT::i32, 0, |
| 8409 | /* 32016*/ OPC_EmitNode1, TARGET_VAL(R600::TRUNC), 0, |
| 8410 | MVT::i32, 13/*#Ops*/, 5, 6, 7, 8, 0, 9, 10, 11, 12, 13, 14, 15, 16, // Results = #17 |
| 8411 | /* 32035*/ OPC_EmitInteger, MVT::i32, 0, |
| 8412 | /* 32038*/ OPC_EmitInteger, MVT::i32, 0, |
| 8413 | /* 32041*/ OPC_EmitInteger, MVT::i32, 0, |
| 8414 | /* 32044*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8415 | /* 32056*/ OPC_EmitInteger, MVT::i32, 1, |
| 8416 | /* 32059*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8417 | /* 32062*/ OPC_EmitInteger, MVT::i32, 0, |
| 8418 | /* 32065*/ OPC_EmitInteger, MVT::i32, 0, |
| 8419 | /* 32068*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FLT_TO_INT_eg), 0, |
| 8420 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 17, 18, 19, 20, 21, 22, 23, 24, 25, |
| 8421 | // Src: (fp_to_sint:{ *:[i32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 8422 | // Dst: (FLT_TO_INT_eg:{ *:[i32] } (TRUNC:{ *:[i32] } ?:{ *:[f32] }:$src0)) |
| 8423 | /* 32087*/ 0, /*End of Scope*/ |
| 8424 | /* 32088*/ /*SwitchOpcode*/ 78|128,1/*206*/, TARGET_VAL(ISD::FP_TO_UINT),// ->32298 |
| 8425 | /* 32092*/ OPC_RecordChild0, // #0 = $src0 |
| 8426 | /* 32093*/ OPC_CheckChild0Type, MVT::f32, |
| 8427 | /* 32095*/ OPC_CheckType, MVT::i32, |
| 8428 | /* 32097*/ OPC_Scope, 66, /*->32165*/ // 2 children in Scope |
| 8429 | /* 32099*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 8430 | /* 32101*/ OPC_EmitInteger, MVT::i32, 1, |
| 8431 | /* 32104*/ OPC_EmitInteger, MVT::i32, 0, |
| 8432 | /* 32107*/ OPC_EmitInteger, MVT::i32, 0, |
| 8433 | /* 32110*/ OPC_EmitInteger, MVT::i32, 0, |
| 8434 | /* 32113*/ OPC_EmitInteger, MVT::i32, 0, |
| 8435 | /* 32116*/ OPC_EmitInteger, MVT::i32, 0, |
| 8436 | /* 32119*/ OPC_EmitInteger, MVT::i32, 0, |
| 8437 | /* 32122*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8438 | /* 32134*/ OPC_EmitInteger, MVT::i32, 1, |
| 8439 | /* 32137*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8440 | /* 32140*/ OPC_EmitInteger, MVT::i32, 0, |
| 8441 | /* 32143*/ OPC_EmitInteger, MVT::i32, 0, |
| 8442 | /* 32146*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FLT_TO_UINT_r600), 0, |
| 8443 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 8444 | // Src: (fp_to_uint:{ *:[i32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 8445 | // Dst: (FLT_TO_UINT_r600:{ *:[i32] } R600_Reg32:{ *:[f32] }:$src0) |
| 8446 | /* 32165*/ /*Scope*/ 2|128,1/*130*/, /*->32297*/ |
| 8447 | /* 32167*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8448 | /* 32169*/ OPC_EmitInteger, MVT::i32, 1, |
| 8449 | /* 32172*/ OPC_EmitInteger, MVT::i32, 0, |
| 8450 | /* 32175*/ OPC_EmitInteger, MVT::i32, 0, |
| 8451 | /* 32178*/ OPC_EmitInteger, MVT::i32, 0, |
| 8452 | /* 32181*/ OPC_EmitInteger, MVT::i32, 1, |
| 8453 | /* 32184*/ OPC_EmitInteger, MVT::i32, 0, |
| 8454 | /* 32187*/ OPC_EmitInteger, MVT::i32, 0, |
| 8455 | /* 32190*/ OPC_EmitInteger, MVT::i32, 0, |
| 8456 | /* 32193*/ OPC_EmitInteger, MVT::i32, 0, |
| 8457 | /* 32196*/ OPC_EmitInteger, MVT::i32, 0, |
| 8458 | /* 32199*/ OPC_EmitInteger, MVT::i32, 0, |
| 8459 | /* 32202*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8460 | /* 32214*/ OPC_EmitInteger, MVT::i32, 1, |
| 8461 | /* 32217*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8462 | /* 32220*/ OPC_EmitInteger, MVT::i32, 0, |
| 8463 | /* 32223*/ OPC_EmitInteger, MVT::i32, 0, |
| 8464 | /* 32226*/ OPC_EmitNode1, TARGET_VAL(R600::TRUNC), 0, |
| 8465 | MVT::i32, 13/*#Ops*/, 5, 6, 7, 8, 0, 9, 10, 11, 12, 13, 14, 15, 16, // Results = #17 |
| 8466 | /* 32245*/ OPC_EmitInteger, MVT::i32, 0, |
| 8467 | /* 32248*/ OPC_EmitInteger, MVT::i32, 0, |
| 8468 | /* 32251*/ OPC_EmitInteger, MVT::i32, 0, |
| 8469 | /* 32254*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8470 | /* 32266*/ OPC_EmitInteger, MVT::i32, 1, |
| 8471 | /* 32269*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8472 | /* 32272*/ OPC_EmitInteger, MVT::i32, 0, |
| 8473 | /* 32275*/ OPC_EmitInteger, MVT::i32, 0, |
| 8474 | /* 32278*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FLT_TO_UINT_eg), 0, |
| 8475 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 17, 18, 19, 20, 21, 22, 23, 24, 25, |
| 8476 | // Src: (fp_to_uint:{ *:[i32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 8477 | // Dst: (FLT_TO_UINT_eg:{ *:[i32] } (TRUNC:{ *:[i32] } ?:{ *:[f32] }:$src0)) |
| 8478 | /* 32297*/ 0, /*End of Scope*/ |
| 8479 | /* 32298*/ /*SwitchOpcode*/ 82|128,1/*210*/, TARGET_VAL(ISD::SHL),// ->32512 |
| 8480 | /* 32302*/ OPC_RecordChild0, // #0 = $src0 |
| 8481 | /* 32303*/ OPC_RecordChild1, // #1 = $src1 |
| 8482 | /* 32304*/ OPC_CheckChild1Type, MVT::i32, |
| 8483 | /* 32306*/ OPC_CheckType, MVT::i32, |
| 8484 | /* 32308*/ OPC_Scope, 100, /*->32410*/ // 2 children in Scope |
| 8485 | /* 32310*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 8486 | /* 32312*/ OPC_EmitInteger, MVT::i32, 0, |
| 8487 | /* 32315*/ OPC_EmitInteger, MVT::i32, 0, |
| 8488 | /* 32318*/ OPC_EmitInteger, MVT::i32, 1, |
| 8489 | /* 32321*/ OPC_EmitInteger, MVT::i32, 0, |
| 8490 | /* 32324*/ OPC_EmitInteger, MVT::i32, 0, |
| 8491 | /* 32327*/ OPC_EmitInteger, MVT::i32, 0, |
| 8492 | /* 32330*/ OPC_EmitInteger, MVT::i32, 0, |
| 8493 | /* 32333*/ OPC_EmitInteger, MVT::i32, 0, |
| 8494 | /* 32336*/ OPC_EmitInteger, MVT::i32, 0, |
| 8495 | /* 32339*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8496 | /* 32351*/ OPC_EmitInteger, MVT::i32, 0, |
| 8497 | /* 32354*/ OPC_EmitInteger, MVT::i32, 0, |
| 8498 | /* 32357*/ OPC_EmitInteger, MVT::i32, 0, |
| 8499 | /* 32360*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8500 | /* 32372*/ OPC_EmitInteger, MVT::i32, 1, |
| 8501 | /* 32375*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8502 | /* 32378*/ OPC_EmitInteger, MVT::i32, 0, |
| 8503 | /* 32381*/ OPC_EmitInteger, MVT::i32, 0, |
| 8504 | /* 32384*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LSHL_r600), 0, |
| 8505 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8506 | // Src: (shl:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8507 | // Dst: (LSHL_r600:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8508 | /* 32410*/ /*Scope*/ 100, /*->32511*/ |
| 8509 | /* 32411*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8510 | /* 32413*/ OPC_EmitInteger, MVT::i32, 0, |
| 8511 | /* 32416*/ OPC_EmitInteger, MVT::i32, 0, |
| 8512 | /* 32419*/ OPC_EmitInteger, MVT::i32, 1, |
| 8513 | /* 32422*/ OPC_EmitInteger, MVT::i32, 0, |
| 8514 | /* 32425*/ OPC_EmitInteger, MVT::i32, 0, |
| 8515 | /* 32428*/ OPC_EmitInteger, MVT::i32, 0, |
| 8516 | /* 32431*/ OPC_EmitInteger, MVT::i32, 0, |
| 8517 | /* 32434*/ OPC_EmitInteger, MVT::i32, 0, |
| 8518 | /* 32437*/ OPC_EmitInteger, MVT::i32, 0, |
| 8519 | /* 32440*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8520 | /* 32452*/ OPC_EmitInteger, MVT::i32, 0, |
| 8521 | /* 32455*/ OPC_EmitInteger, MVT::i32, 0, |
| 8522 | /* 32458*/ OPC_EmitInteger, MVT::i32, 0, |
| 8523 | /* 32461*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8524 | /* 32473*/ OPC_EmitInteger, MVT::i32, 1, |
| 8525 | /* 32476*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8526 | /* 32479*/ OPC_EmitInteger, MVT::i32, 0, |
| 8527 | /* 32482*/ OPC_EmitInteger, MVT::i32, 0, |
| 8528 | /* 32485*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LSHL_eg), 0, |
| 8529 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8530 | // Src: (shl:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8531 | // Dst: (LSHL_eg:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8532 | /* 32511*/ 0, /*End of Scope*/ |
| 8533 | /* 32512*/ /*SwitchOpcode*/ 53|128,2/*309*/, TARGET_VAL(ISD::MUL),// ->32825 |
| 8534 | /* 32516*/ OPC_RecordChild0, // #0 = $src0 |
| 8535 | /* 32517*/ OPC_RecordChild1, // #1 = $src1 |
| 8536 | /* 32518*/ OPC_CheckType, MVT::i32, |
| 8537 | /* 32520*/ OPC_Scope, 100, /*->32622*/ // 3 children in Scope |
| 8538 | /* 32522*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 8539 | /* 32524*/ OPC_EmitInteger, MVT::i32, 0, |
| 8540 | /* 32527*/ OPC_EmitInteger, MVT::i32, 0, |
| 8541 | /* 32530*/ OPC_EmitInteger, MVT::i32, 1, |
| 8542 | /* 32533*/ OPC_EmitInteger, MVT::i32, 0, |
| 8543 | /* 32536*/ OPC_EmitInteger, MVT::i32, 0, |
| 8544 | /* 32539*/ OPC_EmitInteger, MVT::i32, 0, |
| 8545 | /* 32542*/ OPC_EmitInteger, MVT::i32, 0, |
| 8546 | /* 32545*/ OPC_EmitInteger, MVT::i32, 0, |
| 8547 | /* 32548*/ OPC_EmitInteger, MVT::i32, 0, |
| 8548 | /* 32551*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8549 | /* 32563*/ OPC_EmitInteger, MVT::i32, 0, |
| 8550 | /* 32566*/ OPC_EmitInteger, MVT::i32, 0, |
| 8551 | /* 32569*/ OPC_EmitInteger, MVT::i32, 0, |
| 8552 | /* 32572*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8553 | /* 32584*/ OPC_EmitInteger, MVT::i32, 1, |
| 8554 | /* 32587*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8555 | /* 32590*/ OPC_EmitInteger, MVT::i32, 0, |
| 8556 | /* 32593*/ OPC_EmitInteger, MVT::i32, 0, |
| 8557 | /* 32596*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULLO_INT_r600), 0, |
| 8558 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8559 | // Src: (mul:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8560 | // Dst: (MULLO_INT_r600:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8561 | /* 32622*/ /*Scope*/ 100, /*->32723*/ |
| 8562 | /* 32623*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 8563 | /* 32625*/ OPC_EmitInteger, MVT::i32, 0, |
| 8564 | /* 32628*/ OPC_EmitInteger, MVT::i32, 0, |
| 8565 | /* 32631*/ OPC_EmitInteger, MVT::i32, 1, |
| 8566 | /* 32634*/ OPC_EmitInteger, MVT::i32, 0, |
| 8567 | /* 32637*/ OPC_EmitInteger, MVT::i32, 0, |
| 8568 | /* 32640*/ OPC_EmitInteger, MVT::i32, 0, |
| 8569 | /* 32643*/ OPC_EmitInteger, MVT::i32, 0, |
| 8570 | /* 32646*/ OPC_EmitInteger, MVT::i32, 0, |
| 8571 | /* 32649*/ OPC_EmitInteger, MVT::i32, 0, |
| 8572 | /* 32652*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8573 | /* 32664*/ OPC_EmitInteger, MVT::i32, 0, |
| 8574 | /* 32667*/ OPC_EmitInteger, MVT::i32, 0, |
| 8575 | /* 32670*/ OPC_EmitInteger, MVT::i32, 0, |
| 8576 | /* 32673*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8577 | /* 32685*/ OPC_EmitInteger, MVT::i32, 1, |
| 8578 | /* 32688*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8579 | /* 32691*/ OPC_EmitInteger, MVT::i32, 0, |
| 8580 | /* 32694*/ OPC_EmitInteger, MVT::i32, 0, |
| 8581 | /* 32697*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULLO_INT_eg), 0, |
| 8582 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8583 | // Src: (mul:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8584 | // Dst: (MULLO_INT_eg:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8585 | /* 32723*/ /*Scope*/ 100, /*->32824*/ |
| 8586 | /* 32724*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 8587 | /* 32726*/ OPC_EmitInteger, MVT::i32, 0, |
| 8588 | /* 32729*/ OPC_EmitInteger, MVT::i32, 0, |
| 8589 | /* 32732*/ OPC_EmitInteger, MVT::i32, 1, |
| 8590 | /* 32735*/ OPC_EmitInteger, MVT::i32, 0, |
| 8591 | /* 32738*/ OPC_EmitInteger, MVT::i32, 0, |
| 8592 | /* 32741*/ OPC_EmitInteger, MVT::i32, 0, |
| 8593 | /* 32744*/ OPC_EmitInteger, MVT::i32, 0, |
| 8594 | /* 32747*/ OPC_EmitInteger, MVT::i32, 0, |
| 8595 | /* 32750*/ OPC_EmitInteger, MVT::i32, 0, |
| 8596 | /* 32753*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8597 | /* 32765*/ OPC_EmitInteger, MVT::i32, 0, |
| 8598 | /* 32768*/ OPC_EmitInteger, MVT::i32, 0, |
| 8599 | /* 32771*/ OPC_EmitInteger, MVT::i32, 0, |
| 8600 | /* 32774*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8601 | /* 32786*/ OPC_EmitInteger, MVT::i32, 1, |
| 8602 | /* 32789*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8603 | /* 32792*/ OPC_EmitInteger, MVT::i32, 0, |
| 8604 | /* 32795*/ OPC_EmitInteger, MVT::i32, 0, |
| 8605 | /* 32798*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULLO_INT_cm), 0, |
| 8606 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8607 | // Src: (mul:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8608 | // Dst: (MULLO_INT_cm:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8609 | /* 32824*/ 0, /*End of Scope*/ |
| 8610 | /* 32825*/ /*SwitchOpcode*/ 53|128,2/*309*/, TARGET_VAL(ISD::MULHS),// ->33138 |
| 8611 | /* 32829*/ OPC_RecordChild0, // #0 = $src0 |
| 8612 | /* 32830*/ OPC_RecordChild1, // #1 = $src1 |
| 8613 | /* 32831*/ OPC_CheckType, MVT::i32, |
| 8614 | /* 32833*/ OPC_Scope, 100, /*->32935*/ // 3 children in Scope |
| 8615 | /* 32835*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 8616 | /* 32837*/ OPC_EmitInteger, MVT::i32, 0, |
| 8617 | /* 32840*/ OPC_EmitInteger, MVT::i32, 0, |
| 8618 | /* 32843*/ OPC_EmitInteger, MVT::i32, 1, |
| 8619 | /* 32846*/ OPC_EmitInteger, MVT::i32, 0, |
| 8620 | /* 32849*/ OPC_EmitInteger, MVT::i32, 0, |
| 8621 | /* 32852*/ OPC_EmitInteger, MVT::i32, 0, |
| 8622 | /* 32855*/ OPC_EmitInteger, MVT::i32, 0, |
| 8623 | /* 32858*/ OPC_EmitInteger, MVT::i32, 0, |
| 8624 | /* 32861*/ OPC_EmitInteger, MVT::i32, 0, |
| 8625 | /* 32864*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8626 | /* 32876*/ OPC_EmitInteger, MVT::i32, 0, |
| 8627 | /* 32879*/ OPC_EmitInteger, MVT::i32, 0, |
| 8628 | /* 32882*/ OPC_EmitInteger, MVT::i32, 0, |
| 8629 | /* 32885*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8630 | /* 32897*/ OPC_EmitInteger, MVT::i32, 1, |
| 8631 | /* 32900*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8632 | /* 32903*/ OPC_EmitInteger, MVT::i32, 0, |
| 8633 | /* 32906*/ OPC_EmitInteger, MVT::i32, 0, |
| 8634 | /* 32909*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULHI_INT_r600), 0, |
| 8635 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8636 | // Src: (mulhs:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8637 | // Dst: (MULHI_INT_r600:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8638 | /* 32935*/ /*Scope*/ 100, /*->33036*/ |
| 8639 | /* 32936*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 8640 | /* 32938*/ OPC_EmitInteger, MVT::i32, 0, |
| 8641 | /* 32941*/ OPC_EmitInteger, MVT::i32, 0, |
| 8642 | /* 32944*/ OPC_EmitInteger, MVT::i32, 1, |
| 8643 | /* 32947*/ OPC_EmitInteger, MVT::i32, 0, |
| 8644 | /* 32950*/ OPC_EmitInteger, MVT::i32, 0, |
| 8645 | /* 32953*/ OPC_EmitInteger, MVT::i32, 0, |
| 8646 | /* 32956*/ OPC_EmitInteger, MVT::i32, 0, |
| 8647 | /* 32959*/ OPC_EmitInteger, MVT::i32, 0, |
| 8648 | /* 32962*/ OPC_EmitInteger, MVT::i32, 0, |
| 8649 | /* 32965*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8650 | /* 32977*/ OPC_EmitInteger, MVT::i32, 0, |
| 8651 | /* 32980*/ OPC_EmitInteger, MVT::i32, 0, |
| 8652 | /* 32983*/ OPC_EmitInteger, MVT::i32, 0, |
| 8653 | /* 32986*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8654 | /* 32998*/ OPC_EmitInteger, MVT::i32, 1, |
| 8655 | /* 33001*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8656 | /* 33004*/ OPC_EmitInteger, MVT::i32, 0, |
| 8657 | /* 33007*/ OPC_EmitInteger, MVT::i32, 0, |
| 8658 | /* 33010*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULHI_INT_eg), 0, |
| 8659 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8660 | // Src: (mulhs:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8661 | // Dst: (MULHI_INT_eg:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8662 | /* 33036*/ /*Scope*/ 100, /*->33137*/ |
| 8663 | /* 33037*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 8664 | /* 33039*/ OPC_EmitInteger, MVT::i32, 0, |
| 8665 | /* 33042*/ OPC_EmitInteger, MVT::i32, 0, |
| 8666 | /* 33045*/ OPC_EmitInteger, MVT::i32, 1, |
| 8667 | /* 33048*/ OPC_EmitInteger, MVT::i32, 0, |
| 8668 | /* 33051*/ OPC_EmitInteger, MVT::i32, 0, |
| 8669 | /* 33054*/ OPC_EmitInteger, MVT::i32, 0, |
| 8670 | /* 33057*/ OPC_EmitInteger, MVT::i32, 0, |
| 8671 | /* 33060*/ OPC_EmitInteger, MVT::i32, 0, |
| 8672 | /* 33063*/ OPC_EmitInteger, MVT::i32, 0, |
| 8673 | /* 33066*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8674 | /* 33078*/ OPC_EmitInteger, MVT::i32, 0, |
| 8675 | /* 33081*/ OPC_EmitInteger, MVT::i32, 0, |
| 8676 | /* 33084*/ OPC_EmitInteger, MVT::i32, 0, |
| 8677 | /* 33087*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8678 | /* 33099*/ OPC_EmitInteger, MVT::i32, 1, |
| 8679 | /* 33102*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8680 | /* 33105*/ OPC_EmitInteger, MVT::i32, 0, |
| 8681 | /* 33108*/ OPC_EmitInteger, MVT::i32, 0, |
| 8682 | /* 33111*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULHI_INT_cm), 0, |
| 8683 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8684 | // Src: (mulhs:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8685 | // Dst: (MULHI_INT_cm:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8686 | /* 33137*/ 0, /*End of Scope*/ |
| 8687 | /* 33138*/ /*SwitchOpcode*/ 53|128,2/*309*/, TARGET_VAL(ISD::MULHU),// ->33451 |
| 8688 | /* 33142*/ OPC_RecordChild0, // #0 = $src0 |
| 8689 | /* 33143*/ OPC_RecordChild1, // #1 = $src1 |
| 8690 | /* 33144*/ OPC_CheckType, MVT::i32, |
| 8691 | /* 33146*/ OPC_Scope, 100, /*->33248*/ // 3 children in Scope |
| 8692 | /* 33148*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 8693 | /* 33150*/ OPC_EmitInteger, MVT::i32, 0, |
| 8694 | /* 33153*/ OPC_EmitInteger, MVT::i32, 0, |
| 8695 | /* 33156*/ OPC_EmitInteger, MVT::i32, 1, |
| 8696 | /* 33159*/ OPC_EmitInteger, MVT::i32, 0, |
| 8697 | /* 33162*/ OPC_EmitInteger, MVT::i32, 0, |
| 8698 | /* 33165*/ OPC_EmitInteger, MVT::i32, 0, |
| 8699 | /* 33168*/ OPC_EmitInteger, MVT::i32, 0, |
| 8700 | /* 33171*/ OPC_EmitInteger, MVT::i32, 0, |
| 8701 | /* 33174*/ OPC_EmitInteger, MVT::i32, 0, |
| 8702 | /* 33177*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8703 | /* 33189*/ OPC_EmitInteger, MVT::i32, 0, |
| 8704 | /* 33192*/ OPC_EmitInteger, MVT::i32, 0, |
| 8705 | /* 33195*/ OPC_EmitInteger, MVT::i32, 0, |
| 8706 | /* 33198*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8707 | /* 33210*/ OPC_EmitInteger, MVT::i32, 1, |
| 8708 | /* 33213*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8709 | /* 33216*/ OPC_EmitInteger, MVT::i32, 0, |
| 8710 | /* 33219*/ OPC_EmitInteger, MVT::i32, 0, |
| 8711 | /* 33222*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULHI_UINT_r600), 0, |
| 8712 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8713 | // Src: (mulhu:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8714 | // Dst: (MULHI_UINT_r600:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8715 | /* 33248*/ /*Scope*/ 100, /*->33349*/ |
| 8716 | /* 33249*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 8717 | /* 33251*/ OPC_EmitInteger, MVT::i32, 0, |
| 8718 | /* 33254*/ OPC_EmitInteger, MVT::i32, 0, |
| 8719 | /* 33257*/ OPC_EmitInteger, MVT::i32, 1, |
| 8720 | /* 33260*/ OPC_EmitInteger, MVT::i32, 0, |
| 8721 | /* 33263*/ OPC_EmitInteger, MVT::i32, 0, |
| 8722 | /* 33266*/ OPC_EmitInteger, MVT::i32, 0, |
| 8723 | /* 33269*/ OPC_EmitInteger, MVT::i32, 0, |
| 8724 | /* 33272*/ OPC_EmitInteger, MVT::i32, 0, |
| 8725 | /* 33275*/ OPC_EmitInteger, MVT::i32, 0, |
| 8726 | /* 33278*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8727 | /* 33290*/ OPC_EmitInteger, MVT::i32, 0, |
| 8728 | /* 33293*/ OPC_EmitInteger, MVT::i32, 0, |
| 8729 | /* 33296*/ OPC_EmitInteger, MVT::i32, 0, |
| 8730 | /* 33299*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8731 | /* 33311*/ OPC_EmitInteger, MVT::i32, 1, |
| 8732 | /* 33314*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8733 | /* 33317*/ OPC_EmitInteger, MVT::i32, 0, |
| 8734 | /* 33320*/ OPC_EmitInteger, MVT::i32, 0, |
| 8735 | /* 33323*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULHI_UINT_eg), 0, |
| 8736 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8737 | // Src: (mulhu:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8738 | // Dst: (MULHI_UINT_eg:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8739 | /* 33349*/ /*Scope*/ 100, /*->33450*/ |
| 8740 | /* 33350*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 8741 | /* 33352*/ OPC_EmitInteger, MVT::i32, 0, |
| 8742 | /* 33355*/ OPC_EmitInteger, MVT::i32, 0, |
| 8743 | /* 33358*/ OPC_EmitInteger, MVT::i32, 1, |
| 8744 | /* 33361*/ OPC_EmitInteger, MVT::i32, 0, |
| 8745 | /* 33364*/ OPC_EmitInteger, MVT::i32, 0, |
| 8746 | /* 33367*/ OPC_EmitInteger, MVT::i32, 0, |
| 8747 | /* 33370*/ OPC_EmitInteger, MVT::i32, 0, |
| 8748 | /* 33373*/ OPC_EmitInteger, MVT::i32, 0, |
| 8749 | /* 33376*/ OPC_EmitInteger, MVT::i32, 0, |
| 8750 | /* 33379*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8751 | /* 33391*/ OPC_EmitInteger, MVT::i32, 0, |
| 8752 | /* 33394*/ OPC_EmitInteger, MVT::i32, 0, |
| 8753 | /* 33397*/ OPC_EmitInteger, MVT::i32, 0, |
| 8754 | /* 33400*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8755 | /* 33412*/ OPC_EmitInteger, MVT::i32, 1, |
| 8756 | /* 33415*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8757 | /* 33418*/ OPC_EmitInteger, MVT::i32, 0, |
| 8758 | /* 33421*/ OPC_EmitInteger, MVT::i32, 0, |
| 8759 | /* 33424*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULHI_UINT_cm), 0, |
| 8760 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8761 | // Src: (mulhu:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8762 | // Dst: (MULHI_UINT_cm:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8763 | /* 33450*/ 0, /*End of Scope*/ |
| 8764 | /* 33451*/ /*SwitchOpcode*/ 63|128,3/*447*/, TARGET_VAL(AMDGPUISD::URECIP),// ->33902 |
| 8765 | /* 33455*/ OPC_RecordChild0, // #0 = $src0 |
| 8766 | /* 33456*/ OPC_CheckType, MVT::i32, |
| 8767 | /* 33458*/ OPC_Scope, 66, /*->33526*/ // 3 children in Scope |
| 8768 | /* 33460*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 8769 | /* 33462*/ OPC_EmitInteger, MVT::i32, 1, |
| 8770 | /* 33465*/ OPC_EmitInteger, MVT::i32, 0, |
| 8771 | /* 33468*/ OPC_EmitInteger, MVT::i32, 0, |
| 8772 | /* 33471*/ OPC_EmitInteger, MVT::i32, 0, |
| 8773 | /* 33474*/ OPC_EmitInteger, MVT::i32, 0, |
| 8774 | /* 33477*/ OPC_EmitInteger, MVT::i32, 0, |
| 8775 | /* 33480*/ OPC_EmitInteger, MVT::i32, 0, |
| 8776 | /* 33483*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8777 | /* 33495*/ OPC_EmitInteger, MVT::i32, 1, |
| 8778 | /* 33498*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8779 | /* 33501*/ OPC_EmitInteger, MVT::i32, 0, |
| 8780 | /* 33504*/ OPC_EmitInteger, MVT::i32, 0, |
| 8781 | /* 33507*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_UINT_r600), 0, |
| 8782 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 8783 | // Src: (AMDGPUurecip:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 8784 | // Dst: (RECIP_UINT_r600:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) |
| 8785 | /* 33526*/ /*Scope*/ 66, /*->33593*/ |
| 8786 | /* 33527*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 8787 | /* 33529*/ OPC_EmitInteger, MVT::i32, 1, |
| 8788 | /* 33532*/ OPC_EmitInteger, MVT::i32, 0, |
| 8789 | /* 33535*/ OPC_EmitInteger, MVT::i32, 0, |
| 8790 | /* 33538*/ OPC_EmitInteger, MVT::i32, 0, |
| 8791 | /* 33541*/ OPC_EmitInteger, MVT::i32, 0, |
| 8792 | /* 33544*/ OPC_EmitInteger, MVT::i32, 0, |
| 8793 | /* 33547*/ OPC_EmitInteger, MVT::i32, 0, |
| 8794 | /* 33550*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8795 | /* 33562*/ OPC_EmitInteger, MVT::i32, 1, |
| 8796 | /* 33565*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8797 | /* 33568*/ OPC_EmitInteger, MVT::i32, 0, |
| 8798 | /* 33571*/ OPC_EmitInteger, MVT::i32, 0, |
| 8799 | /* 33574*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_UINT_eg), 0, |
| 8800 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 8801 | // Src: (AMDGPUurecip:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 8802 | // Dst: (RECIP_UINT_eg:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) |
| 8803 | /* 33593*/ /*Scope*/ 50|128,2/*306*/, /*->33901*/ |
| 8804 | /* 33595*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 8805 | /* 33597*/ OPC_EmitInteger, MVT::i32, 1, |
| 8806 | /* 33600*/ OPC_EmitInteger, MVT::i32, 0, |
| 8807 | /* 33603*/ OPC_EmitInteger, MVT::i32, 0, |
| 8808 | /* 33606*/ OPC_EmitInteger, MVT::i32, 0, |
| 8809 | /* 33609*/ OPC_EmitInteger, MVT::i32, 0, |
| 8810 | /* 33612*/ OPC_EmitInteger, MVT::i32, 0, |
| 8811 | /* 33615*/ OPC_EmitInteger, MVT::i32, 1, |
| 8812 | /* 33618*/ OPC_EmitInteger, MVT::i32, 0, |
| 8813 | /* 33621*/ OPC_EmitInteger, MVT::i32, 0, |
| 8814 | /* 33624*/ OPC_EmitInteger, MVT::i32, 0, |
| 8815 | /* 33627*/ OPC_EmitInteger, MVT::i32, 1, |
| 8816 | /* 33630*/ OPC_EmitInteger, MVT::i32, 0, |
| 8817 | /* 33633*/ OPC_EmitInteger, MVT::i32, 0, |
| 8818 | /* 33636*/ OPC_EmitInteger, MVT::i32, 0, |
| 8819 | /* 33639*/ OPC_EmitInteger, MVT::i32, 1, |
| 8820 | /* 33642*/ OPC_EmitInteger, MVT::i32, 0, |
| 8821 | /* 33645*/ OPC_EmitInteger, MVT::i32, 0, |
| 8822 | /* 33648*/ OPC_EmitInteger, MVT::i32, 0, |
| 8823 | /* 33651*/ OPC_EmitInteger, MVT::i32, 0, |
| 8824 | /* 33654*/ OPC_EmitInteger, MVT::i32, 0, |
| 8825 | /* 33657*/ OPC_EmitInteger, MVT::i32, 0, |
| 8826 | /* 33660*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8827 | /* 33672*/ OPC_EmitInteger, MVT::i32, 1, |
| 8828 | /* 33675*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8829 | /* 33678*/ OPC_EmitInteger, MVT::i32, 0, |
| 8830 | /* 33681*/ OPC_EmitInteger, MVT::i32, 0, |
| 8831 | /* 33684*/ OPC_EmitNode1, TARGET_VAL(R600::UINT_TO_FLT_eg), 0, |
| 8832 | MVT::i32, 13/*#Ops*/, 15, 16, 17, 18, 0, 19, 20, 21, 22, 23, 24, 25, 26, // Results = #27 |
| 8833 | /* 33703*/ OPC_EmitInteger, MVT::i32, 0, |
| 8834 | /* 33706*/ OPC_EmitInteger, MVT::i32, 0, |
| 8835 | /* 33709*/ OPC_EmitInteger, MVT::i32, 0, |
| 8836 | /* 33712*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8837 | /* 33724*/ OPC_EmitInteger, MVT::i32, 1, |
| 8838 | /* 33727*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8839 | /* 33730*/ OPC_EmitInteger, MVT::i32, 0, |
| 8840 | /* 33733*/ OPC_EmitInteger, MVT::i32, 0, |
| 8841 | /* 33736*/ OPC_EmitNode1, TARGET_VAL(R600::RECIP_IEEE_cm), 0, |
| 8842 | MVT::i32, 13/*#Ops*/, 11, 12, 13, 14, 27, 28, 29, 30, 31, 32, 33, 34, 35, // Results = #36 |
| 8843 | /* 33755*/ OPC_EmitInteger, MVT::i32, 0, |
| 8844 | /* 33758*/ OPC_EmitInteger, MVT::i32, 0, |
| 8845 | /* 33761*/ OPC_EmitInteger, MVT::i32, 0, |
| 8846 | /* 33764*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8847 | /* 33776*/ OPC_EmitInteger, MVT::i32, 126|128,127|128,127|128,123|128,4/*1333788670*/, |
| 8848 | /* 33783*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 8849 | MVT::i32, 1/*#Ops*/, 41, // Results = #42 |
| 8850 | /* 33790*/ OPC_EmitInteger, MVT::i32, 0, |
| 8851 | /* 33793*/ OPC_EmitInteger, MVT::i32, 0, |
| 8852 | /* 33796*/ OPC_EmitInteger, MVT::i32, 0, |
| 8853 | /* 33799*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8854 | /* 33811*/ OPC_EmitInteger, MVT::i32, 1, |
| 8855 | /* 33814*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8856 | /* 33817*/ OPC_EmitInteger, MVT::i32, 0, |
| 8857 | /* 33820*/ OPC_EmitInteger, MVT::i32, 0, |
| 8858 | /* 33823*/ OPC_EmitNode1, TARGET_VAL(R600::MUL_IEEE), 0, |
| 8859 | MVT::i32, 20/*#Ops*/, 5, 6, 7, 8, 9, 10, 36, 37, 38, 39, 40, 42, 43, 44, 45, 46, 47, 48, 49, 50, // Results = #51 |
| 8860 | /* 33849*/ OPC_EmitInteger, MVT::i32, 0, |
| 8861 | /* 33852*/ OPC_EmitInteger, MVT::i32, 0, |
| 8862 | /* 33855*/ OPC_EmitInteger, MVT::i32, 0, |
| 8863 | /* 33858*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8864 | /* 33870*/ OPC_EmitInteger, MVT::i32, 1, |
| 8865 | /* 33873*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8866 | /* 33876*/ OPC_EmitInteger, MVT::i32, 0, |
| 8867 | /* 33879*/ OPC_EmitInteger, MVT::i32, 0, |
| 8868 | /* 33882*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FLT_TO_UINT_eg), 0, |
| 8869 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 51, 52, 53, 54, 55, 56, 57, 58, 59, |
| 8870 | // Src: (AMDGPUurecip:{ *:[i32] } i32:{ *:[i32] }:$src0) - Complexity = 3 |
| 8871 | // Dst: (FLT_TO_UINT_eg:{ *:[i32] } (MUL_IEEE:{ *:[i32] } (RECIP_IEEE_cm:{ *:[i32] } (UINT_TO_FLT_eg:{ *:[i32] } ?:{ *:[i32] }:$src0)), (MOV_IMM_I32:{ *:[i32] } 1333788670:{ *:[i32] }))) |
| 8872 | /* 33901*/ 0, /*End of Scope*/ |
| 8873 | /* 33902*/ /*SwitchOpcode*/ 80|128,1/*208*/, TARGET_VAL(AMDGPUISD::MULHI_U24),// ->34114 |
| 8874 | /* 33906*/ OPC_RecordChild0, // #0 = $src0 |
| 8875 | /* 33907*/ OPC_RecordChild1, // #1 = $src1 |
| 8876 | /* 33908*/ OPC_CheckType, MVT::i32, |
| 8877 | /* 33910*/ OPC_Scope, 100, /*->34012*/ // 2 children in Scope |
| 8878 | /* 33912*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 8879 | /* 33914*/ OPC_EmitInteger, MVT::i32, 0, |
| 8880 | /* 33917*/ OPC_EmitInteger, MVT::i32, 0, |
| 8881 | /* 33920*/ OPC_EmitInteger, MVT::i32, 1, |
| 8882 | /* 33923*/ OPC_EmitInteger, MVT::i32, 0, |
| 8883 | /* 33926*/ OPC_EmitInteger, MVT::i32, 0, |
| 8884 | /* 33929*/ OPC_EmitInteger, MVT::i32, 0, |
| 8885 | /* 33932*/ OPC_EmitInteger, MVT::i32, 0, |
| 8886 | /* 33935*/ OPC_EmitInteger, MVT::i32, 0, |
| 8887 | /* 33938*/ OPC_EmitInteger, MVT::i32, 0, |
| 8888 | /* 33941*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8889 | /* 33953*/ OPC_EmitInteger, MVT::i32, 0, |
| 8890 | /* 33956*/ OPC_EmitInteger, MVT::i32, 0, |
| 8891 | /* 33959*/ OPC_EmitInteger, MVT::i32, 0, |
| 8892 | /* 33962*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8893 | /* 33974*/ OPC_EmitInteger, MVT::i32, 1, |
| 8894 | /* 33977*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8895 | /* 33980*/ OPC_EmitInteger, MVT::i32, 0, |
| 8896 | /* 33983*/ OPC_EmitInteger, MVT::i32, 0, |
| 8897 | /* 33986*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULHI_UINT24_eg), 0, |
| 8898 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8899 | // Src: (AMDGPUmulhi_u24:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8900 | // Dst: (MULHI_UINT24_eg:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8901 | /* 34012*/ /*Scope*/ 100, /*->34113*/ |
| 8902 | /* 34013*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 8903 | /* 34015*/ OPC_EmitInteger, MVT::i32, 0, |
| 8904 | /* 34018*/ OPC_EmitInteger, MVT::i32, 0, |
| 8905 | /* 34021*/ OPC_EmitInteger, MVT::i32, 1, |
| 8906 | /* 34024*/ OPC_EmitInteger, MVT::i32, 0, |
| 8907 | /* 34027*/ OPC_EmitInteger, MVT::i32, 0, |
| 8908 | /* 34030*/ OPC_EmitInteger, MVT::i32, 0, |
| 8909 | /* 34033*/ OPC_EmitInteger, MVT::i32, 0, |
| 8910 | /* 34036*/ OPC_EmitInteger, MVT::i32, 0, |
| 8911 | /* 34039*/ OPC_EmitInteger, MVT::i32, 0, |
| 8912 | /* 34042*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8913 | /* 34054*/ OPC_EmitInteger, MVT::i32, 0, |
| 8914 | /* 34057*/ OPC_EmitInteger, MVT::i32, 0, |
| 8915 | /* 34060*/ OPC_EmitInteger, MVT::i32, 0, |
| 8916 | /* 34063*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8917 | /* 34075*/ OPC_EmitInteger, MVT::i32, 1, |
| 8918 | /* 34078*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8919 | /* 34081*/ OPC_EmitInteger, MVT::i32, 0, |
| 8920 | /* 34084*/ OPC_EmitInteger, MVT::i32, 0, |
| 8921 | /* 34087*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULHI_UINT_cm24), 0, |
| 8922 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 8923 | // Src: (AMDGPUmulhi_u24:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 8924 | // Dst: (MULHI_UINT_cm24:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 8925 | /* 34113*/ 0, /*End of Scope*/ |
| 8926 | /* 34114*/ /*SwitchOpcode*/ 105, TARGET_VAL(AMDGPUISD::BFE_U32),// ->34222 |
| 8927 | /* 34117*/ OPC_RecordChild0, // #0 = $src0 |
| 8928 | /* 34118*/ OPC_RecordChild1, // #1 = $src1 |
| 8929 | /* 34119*/ OPC_RecordChild2, // #2 = $src2 |
| 8930 | /* 34120*/ OPC_CheckChild2Type, MVT::i32, |
| 8931 | /* 34122*/ OPC_CheckType, MVT::i32, |
| 8932 | /* 34124*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8933 | /* 34126*/ OPC_EmitInteger, MVT::i32, 0, |
| 8934 | /* 34129*/ OPC_EmitInteger, MVT::i32, 0, |
| 8935 | /* 34132*/ OPC_EmitInteger, MVT::i32, 0, |
| 8936 | /* 34135*/ OPC_EmitInteger, MVT::i32, 0, |
| 8937 | /* 34138*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8938 | /* 34150*/ OPC_EmitInteger, MVT::i32, 0, |
| 8939 | /* 34153*/ OPC_EmitInteger, MVT::i32, 0, |
| 8940 | /* 34156*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8941 | /* 34168*/ OPC_EmitInteger, MVT::i32, 0, |
| 8942 | /* 34171*/ OPC_EmitInteger, MVT::i32, 0, |
| 8943 | /* 34174*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8944 | /* 34186*/ OPC_EmitInteger, MVT::i32, 1, |
| 8945 | /* 34189*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8946 | /* 34192*/ OPC_EmitInteger, MVT::i32, 0, |
| 8947 | /* 34195*/ OPC_EmitInteger, MVT::i32, 0, |
| 8948 | /* 34198*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_UINT_eg), 0, |
| 8949 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 8950 | // Src: (AMDGPUbfe_u32_impl:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) - Complexity = 3 |
| 8951 | // Dst: (BFE_UINT_eg:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 8952 | /* 34222*/ /*SwitchOpcode*/ 105, TARGET_VAL(AMDGPUISD::BFE_I32),// ->34330 |
| 8953 | /* 34225*/ OPC_RecordChild0, // #0 = $src0 |
| 8954 | /* 34226*/ OPC_RecordChild1, // #1 = $src1 |
| 8955 | /* 34227*/ OPC_RecordChild2, // #2 = $src2 |
| 8956 | /* 34228*/ OPC_CheckChild2Type, MVT::i32, |
| 8957 | /* 34230*/ OPC_CheckType, MVT::i32, |
| 8958 | /* 34232*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8959 | /* 34234*/ OPC_EmitInteger, MVT::i32, 0, |
| 8960 | /* 34237*/ OPC_EmitInteger, MVT::i32, 0, |
| 8961 | /* 34240*/ OPC_EmitInteger, MVT::i32, 0, |
| 8962 | /* 34243*/ OPC_EmitInteger, MVT::i32, 0, |
| 8963 | /* 34246*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8964 | /* 34258*/ OPC_EmitInteger, MVT::i32, 0, |
| 8965 | /* 34261*/ OPC_EmitInteger, MVT::i32, 0, |
| 8966 | /* 34264*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8967 | /* 34276*/ OPC_EmitInteger, MVT::i32, 0, |
| 8968 | /* 34279*/ OPC_EmitInteger, MVT::i32, 0, |
| 8969 | /* 34282*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8970 | /* 34294*/ OPC_EmitInteger, MVT::i32, 1, |
| 8971 | /* 34297*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8972 | /* 34300*/ OPC_EmitInteger, MVT::i32, 0, |
| 8973 | /* 34303*/ OPC_EmitInteger, MVT::i32, 0, |
| 8974 | /* 34306*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_INT_eg), 0, |
| 8975 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 8976 | // Src: (AMDGPUbfe_i32_impl:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) - Complexity = 3 |
| 8977 | // Dst: (BFE_INT_eg:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 8978 | /* 34330*/ /*SwitchOpcode*/ 105, TARGET_VAL(AMDGPUISD::BFI),// ->34438 |
| 8979 | /* 34333*/ OPC_RecordChild0, // #0 = $src0 |
| 8980 | /* 34334*/ OPC_RecordChild1, // #1 = $src1 |
| 8981 | /* 34335*/ OPC_RecordChild2, // #2 = $src2 |
| 8982 | /* 34336*/ OPC_CheckChild2Type, MVT::i32, |
| 8983 | /* 34338*/ OPC_CheckType, MVT::i32, |
| 8984 | /* 34340*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 8985 | /* 34342*/ OPC_EmitInteger, MVT::i32, 0, |
| 8986 | /* 34345*/ OPC_EmitInteger, MVT::i32, 0, |
| 8987 | /* 34348*/ OPC_EmitInteger, MVT::i32, 0, |
| 8988 | /* 34351*/ OPC_EmitInteger, MVT::i32, 0, |
| 8989 | /* 34354*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8990 | /* 34366*/ OPC_EmitInteger, MVT::i32, 0, |
| 8991 | /* 34369*/ OPC_EmitInteger, MVT::i32, 0, |
| 8992 | /* 34372*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8993 | /* 34384*/ OPC_EmitInteger, MVT::i32, 0, |
| 8994 | /* 34387*/ OPC_EmitInteger, MVT::i32, 0, |
| 8995 | /* 34390*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 8996 | /* 34402*/ OPC_EmitInteger, MVT::i32, 1, |
| 8997 | /* 34405*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 8998 | /* 34408*/ OPC_EmitInteger, MVT::i32, 0, |
| 8999 | /* 34411*/ OPC_EmitInteger, MVT::i32, 0, |
| 9000 | /* 34414*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 9001 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 9002 | // Src: (AMDGPUbfi:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) - Complexity = 3 |
| 9003 | // Dst: (BFI_INT_eg:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 9004 | /* 34438*/ /*SwitchOpcode*/ 92|128,2/*348*/, TARGET_VAL(ISD::SIGN_EXTEND_INREG),// ->34790 |
| 9005 | /* 34442*/ OPC_RecordChild0, // #0 = $src |
| 9006 | /* 34443*/ OPC_MoveChild1, |
| 9007 | /* 34444*/ OPC_Scope, 109, /*->34555*/ // 3 children in Scope |
| 9008 | /* 34446*/ OPC_CheckValueType, MVT::i1, |
| 9009 | /* 34448*/ OPC_MoveParent, |
| 9010 | /* 34449*/ OPC_CheckType, MVT::i32, |
| 9011 | /* 34451*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9012 | /* 34453*/ OPC_EmitInteger, MVT::i32, 0, |
| 9013 | /* 34456*/ OPC_EmitInteger, MVT::i32, 0, |
| 9014 | /* 34459*/ OPC_EmitInteger, MVT::i32, 0, |
| 9015 | /* 34462*/ OPC_EmitInteger, MVT::i32, 0, |
| 9016 | /* 34465*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9017 | /* 34477*/ OPC_EmitRegister, MVT::i32, R600::ZERO, |
| 9018 | /* 34480*/ OPC_EmitInteger, MVT::i32, 0, |
| 9019 | /* 34483*/ OPC_EmitInteger, MVT::i32, 0, |
| 9020 | /* 34486*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9021 | /* 34498*/ OPC_EmitRegister, MVT::i32, R600::ONE_INT, |
| 9022 | /* 34501*/ OPC_EmitInteger, MVT::i32, 0, |
| 9023 | /* 34504*/ OPC_EmitInteger, MVT::i32, 0, |
| 9024 | /* 34507*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9025 | /* 34519*/ OPC_EmitInteger, MVT::i32, 1, |
| 9026 | /* 34522*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9027 | /* 34525*/ OPC_EmitInteger, MVT::i32, 0, |
| 9028 | /* 34528*/ OPC_EmitInteger, MVT::i32, 0, |
| 9029 | /* 34531*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_INT_eg), 0, |
| 9030 | MVT::i32, 18/*#Ops*/, 1, 2, 0, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, |
| 9031 | // Src: (sext_inreg:{ *:[i32] } i32:{ *:[i32] }:$src, i1:{ *:[Other] }) - Complexity = 3 |
| 9032 | // Dst: (BFE_INT_eg:{ *:[i32] } i32:{ *:[i32] }:$src, ZERO:{ *:[i32] }, ONE_INT:{ *:[i32] }) |
| 9033 | /* 34555*/ /*Scope*/ 116, /*->34672*/ |
| 9034 | /* 34556*/ OPC_CheckValueType, MVT::i8, |
| 9035 | /* 34558*/ OPC_MoveParent, |
| 9036 | /* 34559*/ OPC_CheckType, MVT::i32, |
| 9037 | /* 34561*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9038 | /* 34563*/ OPC_EmitInteger, MVT::i32, 0, |
| 9039 | /* 34566*/ OPC_EmitInteger, MVT::i32, 0, |
| 9040 | /* 34569*/ OPC_EmitInteger, MVT::i32, 0, |
| 9041 | /* 34572*/ OPC_EmitInteger, MVT::i32, 0, |
| 9042 | /* 34575*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9043 | /* 34587*/ OPC_EmitRegister, MVT::i32, R600::ZERO, |
| 9044 | /* 34590*/ OPC_EmitInteger, MVT::i32, 0, |
| 9045 | /* 34593*/ OPC_EmitInteger, MVT::i32, 0, |
| 9046 | /* 34596*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9047 | /* 34608*/ OPC_EmitInteger, MVT::i32, 8, |
| 9048 | /* 34611*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 9049 | MVT::i32, 1/*#Ops*/, 10, // Results = #11 |
| 9050 | /* 34618*/ OPC_EmitInteger, MVT::i32, 0, |
| 9051 | /* 34621*/ OPC_EmitInteger, MVT::i32, 0, |
| 9052 | /* 34624*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9053 | /* 34636*/ OPC_EmitInteger, MVT::i32, 1, |
| 9054 | /* 34639*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9055 | /* 34642*/ OPC_EmitInteger, MVT::i32, 0, |
| 9056 | /* 34645*/ OPC_EmitInteger, MVT::i32, 0, |
| 9057 | /* 34648*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_INT_eg), 0, |
| 9058 | MVT::i32, 18/*#Ops*/, 1, 2, 0, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18, |
| 9059 | // Src: (sext_inreg:{ *:[i32] } i32:{ *:[i32] }:$src, i8:{ *:[Other] }) - Complexity = 3 |
| 9060 | // Dst: (BFE_INT_eg:{ *:[i32] } i32:{ *:[i32] }:$src, ZERO:{ *:[i32] }, (MOV_IMM_I32:{ *:[i32] } 8:{ *:[i32] })) |
| 9061 | /* 34672*/ /*Scope*/ 116, /*->34789*/ |
| 9062 | /* 34673*/ OPC_CheckValueType, MVT::i16, |
| 9063 | /* 34675*/ OPC_MoveParent, |
| 9064 | /* 34676*/ OPC_CheckType, MVT::i32, |
| 9065 | /* 34678*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9066 | /* 34680*/ OPC_EmitInteger, MVT::i32, 0, |
| 9067 | /* 34683*/ OPC_EmitInteger, MVT::i32, 0, |
| 9068 | /* 34686*/ OPC_EmitInteger, MVT::i32, 0, |
| 9069 | /* 34689*/ OPC_EmitInteger, MVT::i32, 0, |
| 9070 | /* 34692*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9071 | /* 34704*/ OPC_EmitRegister, MVT::i32, R600::ZERO, |
| 9072 | /* 34707*/ OPC_EmitInteger, MVT::i32, 0, |
| 9073 | /* 34710*/ OPC_EmitInteger, MVT::i32, 0, |
| 9074 | /* 34713*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9075 | /* 34725*/ OPC_EmitInteger, MVT::i32, 16, |
| 9076 | /* 34728*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 9077 | MVT::i32, 1/*#Ops*/, 10, // Results = #11 |
| 9078 | /* 34735*/ OPC_EmitInteger, MVT::i32, 0, |
| 9079 | /* 34738*/ OPC_EmitInteger, MVT::i32, 0, |
| 9080 | /* 34741*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9081 | /* 34753*/ OPC_EmitInteger, MVT::i32, 1, |
| 9082 | /* 34756*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9083 | /* 34759*/ OPC_EmitInteger, MVT::i32, 0, |
| 9084 | /* 34762*/ OPC_EmitInteger, MVT::i32, 0, |
| 9085 | /* 34765*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFE_INT_eg), 0, |
| 9086 | MVT::i32, 18/*#Ops*/, 1, 2, 0, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18, |
| 9087 | // Src: (sext_inreg:{ *:[i32] } i32:{ *:[i32] }:$src, i16:{ *:[Other] }) - Complexity = 3 |
| 9088 | // Dst: (BFE_INT_eg:{ *:[i32] } i32:{ *:[i32] }:$src, ZERO:{ *:[i32] }, (MOV_IMM_I32:{ *:[i32] } 16:{ *:[i32] })) |
| 9089 | /* 34789*/ 0, /*End of Scope*/ |
| 9090 | /* 34790*/ /*SwitchOpcode*/ 104, TARGET_VAL(AMDGPUISD::BFM),// ->34897 |
| 9091 | /* 34793*/ OPC_RecordChild0, // #0 = $src0 |
| 9092 | /* 34794*/ OPC_RecordChild1, // #1 = $src1 |
| 9093 | /* 34795*/ OPC_CheckType, MVT::i32, |
| 9094 | /* 34797*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9095 | /* 34799*/ OPC_EmitInteger, MVT::i32, 0, |
| 9096 | /* 34802*/ OPC_EmitInteger, MVT::i32, 0, |
| 9097 | /* 34805*/ OPC_EmitInteger, MVT::i32, 1, |
| 9098 | /* 34808*/ OPC_EmitInteger, MVT::i32, 0, |
| 9099 | /* 34811*/ OPC_EmitInteger, MVT::i32, 0, |
| 9100 | /* 34814*/ OPC_EmitInteger, MVT::i32, 0, |
| 9101 | /* 34817*/ OPC_EmitInteger, MVT::i32, 0, |
| 9102 | /* 34820*/ OPC_EmitInteger, MVT::i32, 0, |
| 9103 | /* 34823*/ OPC_EmitInteger, MVT::i32, 0, |
| 9104 | /* 34826*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9105 | /* 34838*/ OPC_EmitInteger, MVT::i32, 0, |
| 9106 | /* 34841*/ OPC_EmitInteger, MVT::i32, 0, |
| 9107 | /* 34844*/ OPC_EmitInteger, MVT::i32, 0, |
| 9108 | /* 34847*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9109 | /* 34859*/ OPC_EmitInteger, MVT::i32, 1, |
| 9110 | /* 34862*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9111 | /* 34865*/ OPC_EmitInteger, MVT::i32, 0, |
| 9112 | /* 34868*/ OPC_EmitInteger, MVT::i32, 0, |
| 9113 | /* 34871*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFM_INT_eg), 0, |
| 9114 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9115 | // Src: (AMDGPUbfm:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) - Complexity = 3 |
| 9116 | // Dst: (BFM_INT_eg:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 9117 | /* 34897*/ /*SwitchOpcode*/ 105, TARGET_VAL(AMDGPUISD::MAD_U24),// ->35005 |
| 9118 | /* 34900*/ OPC_RecordChild0, // #0 = $src0 |
| 9119 | /* 34901*/ OPC_RecordChild1, // #1 = $src1 |
| 9120 | /* 34902*/ OPC_RecordChild2, // #2 = $src2 |
| 9121 | /* 34903*/ OPC_CheckChild2Type, MVT::i32, |
| 9122 | /* 34905*/ OPC_CheckType, MVT::i32, |
| 9123 | /* 34907*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9124 | /* 34909*/ OPC_EmitInteger, MVT::i32, 0, |
| 9125 | /* 34912*/ OPC_EmitInteger, MVT::i32, 0, |
| 9126 | /* 34915*/ OPC_EmitInteger, MVT::i32, 0, |
| 9127 | /* 34918*/ OPC_EmitInteger, MVT::i32, 0, |
| 9128 | /* 34921*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9129 | /* 34933*/ OPC_EmitInteger, MVT::i32, 0, |
| 9130 | /* 34936*/ OPC_EmitInteger, MVT::i32, 0, |
| 9131 | /* 34939*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9132 | /* 34951*/ OPC_EmitInteger, MVT::i32, 0, |
| 9133 | /* 34954*/ OPC_EmitInteger, MVT::i32, 0, |
| 9134 | /* 34957*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9135 | /* 34969*/ OPC_EmitInteger, MVT::i32, 1, |
| 9136 | /* 34972*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9137 | /* 34975*/ OPC_EmitInteger, MVT::i32, 0, |
| 9138 | /* 34978*/ OPC_EmitInteger, MVT::i32, 0, |
| 9139 | /* 34981*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_UINT24_eg), 0, |
| 9140 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 9141 | // Src: (AMDGPUmad_u24:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) - Complexity = 3 |
| 9142 | // Dst: (MULADD_UINT24_eg:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 9143 | /* 35005*/ /*SwitchOpcode*/ 105, TARGET_VAL(ISD::FSHR),// ->35113 |
| 9144 | /* 35008*/ OPC_RecordChild0, // #0 = $src0 |
| 9145 | /* 35009*/ OPC_RecordChild1, // #1 = $src1 |
| 9146 | /* 35010*/ OPC_RecordChild2, // #2 = $src2 |
| 9147 | /* 35011*/ OPC_CheckChild2Type, MVT::i32, |
| 9148 | /* 35013*/ OPC_CheckType, MVT::i32, |
| 9149 | /* 35015*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9150 | /* 35017*/ OPC_EmitInteger, MVT::i32, 0, |
| 9151 | /* 35020*/ OPC_EmitInteger, MVT::i32, 0, |
| 9152 | /* 35023*/ OPC_EmitInteger, MVT::i32, 0, |
| 9153 | /* 35026*/ OPC_EmitInteger, MVT::i32, 0, |
| 9154 | /* 35029*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9155 | /* 35041*/ OPC_EmitInteger, MVT::i32, 0, |
| 9156 | /* 35044*/ OPC_EmitInteger, MVT::i32, 0, |
| 9157 | /* 35047*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9158 | /* 35059*/ OPC_EmitInteger, MVT::i32, 0, |
| 9159 | /* 35062*/ OPC_EmitInteger, MVT::i32, 0, |
| 9160 | /* 35065*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9161 | /* 35077*/ OPC_EmitInteger, MVT::i32, 1, |
| 9162 | /* 35080*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9163 | /* 35083*/ OPC_EmitInteger, MVT::i32, 0, |
| 9164 | /* 35086*/ OPC_EmitInteger, MVT::i32, 0, |
| 9165 | /* 35089*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BIT_ALIGN_INT_eg), 0, |
| 9166 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 9167 | // Src: (fshr:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) - Complexity = 3 |
| 9168 | // Dst: (BIT_ALIGN_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1, ?:{ *:[i32] }:$src2) |
| 9169 | /* 35113*/ /*SwitchOpcode*/ 104, TARGET_VAL(ISD::ROTR),// ->35220 |
| 9170 | /* 35116*/ OPC_RecordChild0, // #0 = $src0 |
| 9171 | /* 35117*/ OPC_RecordChild1, // #1 = $src1 |
| 9172 | /* 35118*/ OPC_CheckChild1Type, MVT::i32, |
| 9173 | /* 35120*/ OPC_CheckType, MVT::i32, |
| 9174 | /* 35122*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9175 | /* 35124*/ OPC_EmitInteger, MVT::i32, 0, |
| 9176 | /* 35127*/ OPC_EmitInteger, MVT::i32, 0, |
| 9177 | /* 35130*/ OPC_EmitInteger, MVT::i32, 0, |
| 9178 | /* 35133*/ OPC_EmitInteger, MVT::i32, 0, |
| 9179 | /* 35136*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9180 | /* 35148*/ OPC_EmitInteger, MVT::i32, 0, |
| 9181 | /* 35151*/ OPC_EmitInteger, MVT::i32, 0, |
| 9182 | /* 35154*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9183 | /* 35166*/ OPC_EmitInteger, MVT::i32, 0, |
| 9184 | /* 35169*/ OPC_EmitInteger, MVT::i32, 0, |
| 9185 | /* 35172*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9186 | /* 35184*/ OPC_EmitInteger, MVT::i32, 1, |
| 9187 | /* 35187*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9188 | /* 35190*/ OPC_EmitInteger, MVT::i32, 0, |
| 9189 | /* 35193*/ OPC_EmitInteger, MVT::i32, 0, |
| 9190 | /* 35196*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BIT_ALIGN_INT_eg), 0, |
| 9191 | MVT::i32, 18/*#Ops*/, 2, 3, 0, 4, 5, 6, 0, 7, 8, 9, 1, 10, 11, 12, 13, 14, 15, 16, |
| 9192 | // Src: (rotr:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) - Complexity = 3 |
| 9193 | // Dst: (BIT_ALIGN_INT_eg:{ *:[i32] } ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src0, ?:{ *:[i32] }:$src1) |
| 9194 | /* 35220*/ /*SwitchOpcode*/ 104, TARGET_VAL(AMDGPUISD::MUL_U24),// ->35327 |
| 9195 | /* 35223*/ OPC_RecordChild0, // #0 = $src0 |
| 9196 | /* 35224*/ OPC_RecordChild1, // #1 = $src1 |
| 9197 | /* 35225*/ OPC_CheckType, MVT::i32, |
| 9198 | /* 35227*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9199 | /* 35229*/ OPC_EmitInteger, MVT::i32, 0, |
| 9200 | /* 35232*/ OPC_EmitInteger, MVT::i32, 0, |
| 9201 | /* 35235*/ OPC_EmitInteger, MVT::i32, 1, |
| 9202 | /* 35238*/ OPC_EmitInteger, MVT::i32, 0, |
| 9203 | /* 35241*/ OPC_EmitInteger, MVT::i32, 0, |
| 9204 | /* 35244*/ OPC_EmitInteger, MVT::i32, 0, |
| 9205 | /* 35247*/ OPC_EmitInteger, MVT::i32, 0, |
| 9206 | /* 35250*/ OPC_EmitInteger, MVT::i32, 0, |
| 9207 | /* 35253*/ OPC_EmitInteger, MVT::i32, 0, |
| 9208 | /* 35256*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9209 | /* 35268*/ OPC_EmitInteger, MVT::i32, 0, |
| 9210 | /* 35271*/ OPC_EmitInteger, MVT::i32, 0, |
| 9211 | /* 35274*/ OPC_EmitInteger, MVT::i32, 0, |
| 9212 | /* 35277*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9213 | /* 35289*/ OPC_EmitInteger, MVT::i32, 1, |
| 9214 | /* 35292*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9215 | /* 35295*/ OPC_EmitInteger, MVT::i32, 0, |
| 9216 | /* 35298*/ OPC_EmitInteger, MVT::i32, 0, |
| 9217 | /* 35301*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MUL_UINT24_eg), 0, |
| 9218 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9219 | // Src: (AMDGPUmul_u24_impl:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) - Complexity = 3 |
| 9220 | // Dst: (MUL_UINT24_eg:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 9221 | /* 35327*/ /*SwitchOpcode*/ 104, TARGET_VAL(AMDGPUISD::CARRY),// ->35434 |
| 9222 | /* 35330*/ OPC_RecordChild0, // #0 = $src0 |
| 9223 | /* 35331*/ OPC_RecordChild1, // #1 = $src1 |
| 9224 | /* 35332*/ OPC_CheckType, MVT::i32, |
| 9225 | /* 35334*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9226 | /* 35336*/ OPC_EmitInteger, MVT::i32, 0, |
| 9227 | /* 35339*/ OPC_EmitInteger, MVT::i32, 0, |
| 9228 | /* 35342*/ OPC_EmitInteger, MVT::i32, 1, |
| 9229 | /* 35345*/ OPC_EmitInteger, MVT::i32, 0, |
| 9230 | /* 35348*/ OPC_EmitInteger, MVT::i32, 0, |
| 9231 | /* 35351*/ OPC_EmitInteger, MVT::i32, 0, |
| 9232 | /* 35354*/ OPC_EmitInteger, MVT::i32, 0, |
| 9233 | /* 35357*/ OPC_EmitInteger, MVT::i32, 0, |
| 9234 | /* 35360*/ OPC_EmitInteger, MVT::i32, 0, |
| 9235 | /* 35363*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9236 | /* 35375*/ OPC_EmitInteger, MVT::i32, 0, |
| 9237 | /* 35378*/ OPC_EmitInteger, MVT::i32, 0, |
| 9238 | /* 35381*/ OPC_EmitInteger, MVT::i32, 0, |
| 9239 | /* 35384*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9240 | /* 35396*/ OPC_EmitInteger, MVT::i32, 1, |
| 9241 | /* 35399*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9242 | /* 35402*/ OPC_EmitInteger, MVT::i32, 0, |
| 9243 | /* 35405*/ OPC_EmitInteger, MVT::i32, 0, |
| 9244 | /* 35408*/ OPC_MorphNodeTo1, TARGET_VAL(R600::ADDC_UINT), 0, |
| 9245 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9246 | // Src: (AMDGPUcarry:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 9247 | // Dst: (ADDC_UINT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 9248 | /* 35434*/ /*SwitchOpcode*/ 104, TARGET_VAL(AMDGPUISD::BORROW),// ->35541 |
| 9249 | /* 35437*/ OPC_RecordChild0, // #0 = $src0 |
| 9250 | /* 35438*/ OPC_RecordChild1, // #1 = $src1 |
| 9251 | /* 35439*/ OPC_CheckType, MVT::i32, |
| 9252 | /* 35441*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9253 | /* 35443*/ OPC_EmitInteger, MVT::i32, 0, |
| 9254 | /* 35446*/ OPC_EmitInteger, MVT::i32, 0, |
| 9255 | /* 35449*/ OPC_EmitInteger, MVT::i32, 1, |
| 9256 | /* 35452*/ OPC_EmitInteger, MVT::i32, 0, |
| 9257 | /* 35455*/ OPC_EmitInteger, MVT::i32, 0, |
| 9258 | /* 35458*/ OPC_EmitInteger, MVT::i32, 0, |
| 9259 | /* 35461*/ OPC_EmitInteger, MVT::i32, 0, |
| 9260 | /* 35464*/ OPC_EmitInteger, MVT::i32, 0, |
| 9261 | /* 35467*/ OPC_EmitInteger, MVT::i32, 0, |
| 9262 | /* 35470*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9263 | /* 35482*/ OPC_EmitInteger, MVT::i32, 0, |
| 9264 | /* 35485*/ OPC_EmitInteger, MVT::i32, 0, |
| 9265 | /* 35488*/ OPC_EmitInteger, MVT::i32, 0, |
| 9266 | /* 35491*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9267 | /* 35503*/ OPC_EmitInteger, MVT::i32, 1, |
| 9268 | /* 35506*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9269 | /* 35509*/ OPC_EmitInteger, MVT::i32, 0, |
| 9270 | /* 35512*/ OPC_EmitInteger, MVT::i32, 0, |
| 9271 | /* 35515*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SUBB_UINT), 0, |
| 9272 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9273 | // Src: (AMDGPUborrow:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 9274 | // Dst: (SUBB_UINT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 9275 | /* 35541*/ /*SwitchOpcode*/ 71, TARGET_VAL(AMDGPUISD::FP_TO_FP16),// ->35615 |
| 9276 | /* 35544*/ OPC_RecordChild0, // #0 = $src0 |
| 9277 | /* 35545*/ OPC_CheckChild0Type, MVT::f32, |
| 9278 | /* 35547*/ OPC_CheckType, MVT::i32, |
| 9279 | /* 35549*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9280 | /* 35551*/ OPC_EmitInteger, MVT::i32, 1, |
| 9281 | /* 35554*/ OPC_EmitInteger, MVT::i32, 0, |
| 9282 | /* 35557*/ OPC_EmitInteger, MVT::i32, 0, |
| 9283 | /* 35560*/ OPC_EmitInteger, MVT::i32, 0, |
| 9284 | /* 35563*/ OPC_EmitInteger, MVT::i32, 0, |
| 9285 | /* 35566*/ OPC_EmitInteger, MVT::i32, 0, |
| 9286 | /* 35569*/ OPC_EmitInteger, MVT::i32, 0, |
| 9287 | /* 35572*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9288 | /* 35584*/ OPC_EmitInteger, MVT::i32, 1, |
| 9289 | /* 35587*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9290 | /* 35590*/ OPC_EmitInteger, MVT::i32, 0, |
| 9291 | /* 35593*/ OPC_EmitInteger, MVT::i32, 0, |
| 9292 | /* 35596*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FLT32_TO_FLT16), 0, |
| 9293 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9294 | // Src: (AMDGPUfp_to_f16:{ *:[i32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 9295 | // Dst: (FLT32_TO_FLT16:{ *:[i32] } R600_Reg32:{ *:[f32] }:$src0) |
| 9296 | /* 35615*/ /*SwitchOpcode*/ 71, TARGET_VAL(ISD::CTPOP),// ->35689 |
| 9297 | /* 35618*/ OPC_RecordChild0, // #0 = $src0 |
| 9298 | /* 35619*/ OPC_CheckChild0Type, MVT::i32, |
| 9299 | /* 35621*/ OPC_CheckType, MVT::i32, |
| 9300 | /* 35623*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9301 | /* 35625*/ OPC_EmitInteger, MVT::i32, 1, |
| 9302 | /* 35628*/ OPC_EmitInteger, MVT::i32, 0, |
| 9303 | /* 35631*/ OPC_EmitInteger, MVT::i32, 0, |
| 9304 | /* 35634*/ OPC_EmitInteger, MVT::i32, 0, |
| 9305 | /* 35637*/ OPC_EmitInteger, MVT::i32, 0, |
| 9306 | /* 35640*/ OPC_EmitInteger, MVT::i32, 0, |
| 9307 | /* 35643*/ OPC_EmitInteger, MVT::i32, 0, |
| 9308 | /* 35646*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9309 | /* 35658*/ OPC_EmitInteger, MVT::i32, 1, |
| 9310 | /* 35661*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9311 | /* 35664*/ OPC_EmitInteger, MVT::i32, 0, |
| 9312 | /* 35667*/ OPC_EmitInteger, MVT::i32, 0, |
| 9313 | /* 35670*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BCNT_INT), 0, |
| 9314 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9315 | // Src: (ctpop:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 9316 | // Dst: (BCNT_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) |
| 9317 | /* 35689*/ /*SwitchOpcode*/ 71, TARGET_VAL(ISD::CTLZ_ZERO_UNDEF),// ->35763 |
| 9318 | /* 35692*/ OPC_RecordChild0, // #0 = $src0 |
| 9319 | /* 35693*/ OPC_CheckChild0Type, MVT::i32, |
| 9320 | /* 35695*/ OPC_CheckType, MVT::i32, |
| 9321 | /* 35697*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9322 | /* 35699*/ OPC_EmitInteger, MVT::i32, 1, |
| 9323 | /* 35702*/ OPC_EmitInteger, MVT::i32, 0, |
| 9324 | /* 35705*/ OPC_EmitInteger, MVT::i32, 0, |
| 9325 | /* 35708*/ OPC_EmitInteger, MVT::i32, 0, |
| 9326 | /* 35711*/ OPC_EmitInteger, MVT::i32, 0, |
| 9327 | /* 35714*/ OPC_EmitInteger, MVT::i32, 0, |
| 9328 | /* 35717*/ OPC_EmitInteger, MVT::i32, 0, |
| 9329 | /* 35720*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9330 | /* 35732*/ OPC_EmitInteger, MVT::i32, 1, |
| 9331 | /* 35735*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9332 | /* 35738*/ OPC_EmitInteger, MVT::i32, 0, |
| 9333 | /* 35741*/ OPC_EmitInteger, MVT::i32, 0, |
| 9334 | /* 35744*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FFBH_UINT), 0, |
| 9335 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9336 | // Src: (ctlz_zero_undef:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 9337 | // Dst: (FFBH_UINT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) |
| 9338 | /* 35763*/ /*SwitchOpcode*/ 71, TARGET_VAL(AMDGPUISD::FFBH_U32),// ->35837 |
| 9339 | /* 35766*/ OPC_RecordChild0, // #0 = $src0 |
| 9340 | /* 35767*/ OPC_CheckChild0Type, MVT::i32, |
| 9341 | /* 35769*/ OPC_CheckType, MVT::i32, |
| 9342 | /* 35771*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9343 | /* 35773*/ OPC_EmitInteger, MVT::i32, 1, |
| 9344 | /* 35776*/ OPC_EmitInteger, MVT::i32, 0, |
| 9345 | /* 35779*/ OPC_EmitInteger, MVT::i32, 0, |
| 9346 | /* 35782*/ OPC_EmitInteger, MVT::i32, 0, |
| 9347 | /* 35785*/ OPC_EmitInteger, MVT::i32, 0, |
| 9348 | /* 35788*/ OPC_EmitInteger, MVT::i32, 0, |
| 9349 | /* 35791*/ OPC_EmitInteger, MVT::i32, 0, |
| 9350 | /* 35794*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9351 | /* 35806*/ OPC_EmitInteger, MVT::i32, 1, |
| 9352 | /* 35809*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9353 | /* 35812*/ OPC_EmitInteger, MVT::i32, 0, |
| 9354 | /* 35815*/ OPC_EmitInteger, MVT::i32, 0, |
| 9355 | /* 35818*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FFBH_UINT), 0, |
| 9356 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9357 | // Src: (AMDGPUffbh_u32_impl:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 9358 | // Dst: (FFBH_UINT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) |
| 9359 | /* 35837*/ /*SwitchOpcode*/ 71, TARGET_VAL(ISD::CTTZ_ZERO_UNDEF),// ->35911 |
| 9360 | /* 35840*/ OPC_RecordChild0, // #0 = $src0 |
| 9361 | /* 35841*/ OPC_CheckChild0Type, MVT::i32, |
| 9362 | /* 35843*/ OPC_CheckType, MVT::i32, |
| 9363 | /* 35845*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9364 | /* 35847*/ OPC_EmitInteger, MVT::i32, 1, |
| 9365 | /* 35850*/ OPC_EmitInteger, MVT::i32, 0, |
| 9366 | /* 35853*/ OPC_EmitInteger, MVT::i32, 0, |
| 9367 | /* 35856*/ OPC_EmitInteger, MVT::i32, 0, |
| 9368 | /* 35859*/ OPC_EmitInteger, MVT::i32, 0, |
| 9369 | /* 35862*/ OPC_EmitInteger, MVT::i32, 0, |
| 9370 | /* 35865*/ OPC_EmitInteger, MVT::i32, 0, |
| 9371 | /* 35868*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9372 | /* 35880*/ OPC_EmitInteger, MVT::i32, 1, |
| 9373 | /* 35883*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9374 | /* 35886*/ OPC_EmitInteger, MVT::i32, 0, |
| 9375 | /* 35889*/ OPC_EmitInteger, MVT::i32, 0, |
| 9376 | /* 35892*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FFBL_INT), 0, |
| 9377 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9378 | // Src: (cttz_zero_undef:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 9379 | // Dst: (FFBL_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) |
| 9380 | /* 35911*/ /*SwitchOpcode*/ 71, TARGET_VAL(AMDGPUISD::FFBL_B32),// ->35985 |
| 9381 | /* 35914*/ OPC_RecordChild0, // #0 = $src0 |
| 9382 | /* 35915*/ OPC_CheckChild0Type, MVT::i32, |
| 9383 | /* 35917*/ OPC_CheckType, MVT::i32, |
| 9384 | /* 35919*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9385 | /* 35921*/ OPC_EmitInteger, MVT::i32, 1, |
| 9386 | /* 35924*/ OPC_EmitInteger, MVT::i32, 0, |
| 9387 | /* 35927*/ OPC_EmitInteger, MVT::i32, 0, |
| 9388 | /* 35930*/ OPC_EmitInteger, MVT::i32, 0, |
| 9389 | /* 35933*/ OPC_EmitInteger, MVT::i32, 0, |
| 9390 | /* 35936*/ OPC_EmitInteger, MVT::i32, 0, |
| 9391 | /* 35939*/ OPC_EmitInteger, MVT::i32, 0, |
| 9392 | /* 35942*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9393 | /* 35954*/ OPC_EmitInteger, MVT::i32, 1, |
| 9394 | /* 35957*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9395 | /* 35960*/ OPC_EmitInteger, MVT::i32, 0, |
| 9396 | /* 35963*/ OPC_EmitInteger, MVT::i32, 0, |
| 9397 | /* 35966*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FFBL_INT), 0, |
| 9398 | MVT::i32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9399 | // Src: (AMDGPUffbl_b32_impl:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 9400 | // Dst: (FFBL_INT:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0) |
| 9401 | /* 35985*/ /*SwitchOpcode*/ 105, TARGET_VAL(AMDGPUISD::MAD_I24),// ->36093 |
| 9402 | /* 35988*/ OPC_RecordChild0, // #0 = $src0 |
| 9403 | /* 35989*/ OPC_RecordChild1, // #1 = $src1 |
| 9404 | /* 35990*/ OPC_RecordChild2, // #2 = $src2 |
| 9405 | /* 35991*/ OPC_CheckChild2Type, MVT::i32, |
| 9406 | /* 35993*/ OPC_CheckType, MVT::i32, |
| 9407 | /* 35995*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 9408 | /* 35997*/ OPC_EmitInteger, MVT::i32, 0, |
| 9409 | /* 36000*/ OPC_EmitInteger, MVT::i32, 0, |
| 9410 | /* 36003*/ OPC_EmitInteger, MVT::i32, 0, |
| 9411 | /* 36006*/ OPC_EmitInteger, MVT::i32, 0, |
| 9412 | /* 36009*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9413 | /* 36021*/ OPC_EmitInteger, MVT::i32, 0, |
| 9414 | /* 36024*/ OPC_EmitInteger, MVT::i32, 0, |
| 9415 | /* 36027*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9416 | /* 36039*/ OPC_EmitInteger, MVT::i32, 0, |
| 9417 | /* 36042*/ OPC_EmitInteger, MVT::i32, 0, |
| 9418 | /* 36045*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9419 | /* 36057*/ OPC_EmitInteger, MVT::i32, 1, |
| 9420 | /* 36060*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9421 | /* 36063*/ OPC_EmitInteger, MVT::i32, 0, |
| 9422 | /* 36066*/ OPC_EmitInteger, MVT::i32, 0, |
| 9423 | /* 36069*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_INT24_cm), 0, |
| 9424 | MVT::i32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 9425 | // Src: (AMDGPUmad_i24:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) - Complexity = 3 |
| 9426 | // Dst: (MULADD_INT24_cm:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1, i32:{ *:[i32] }:$src2) |
| 9427 | /* 36093*/ /*SwitchOpcode*/ 104, TARGET_VAL(AMDGPUISD::MUL_I24),// ->36200 |
| 9428 | /* 36096*/ OPC_RecordChild0, // #0 = $src0 |
| 9429 | /* 36097*/ OPC_RecordChild1, // #1 = $src1 |
| 9430 | /* 36098*/ OPC_CheckType, MVT::i32, |
| 9431 | /* 36100*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 9432 | /* 36102*/ OPC_EmitInteger, MVT::i32, 0, |
| 9433 | /* 36105*/ OPC_EmitInteger, MVT::i32, 0, |
| 9434 | /* 36108*/ OPC_EmitInteger, MVT::i32, 1, |
| 9435 | /* 36111*/ OPC_EmitInteger, MVT::i32, 0, |
| 9436 | /* 36114*/ OPC_EmitInteger, MVT::i32, 0, |
| 9437 | /* 36117*/ OPC_EmitInteger, MVT::i32, 0, |
| 9438 | /* 36120*/ OPC_EmitInteger, MVT::i32, 0, |
| 9439 | /* 36123*/ OPC_EmitInteger, MVT::i32, 0, |
| 9440 | /* 36126*/ OPC_EmitInteger, MVT::i32, 0, |
| 9441 | /* 36129*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9442 | /* 36141*/ OPC_EmitInteger, MVT::i32, 0, |
| 9443 | /* 36144*/ OPC_EmitInteger, MVT::i32, 0, |
| 9444 | /* 36147*/ OPC_EmitInteger, MVT::i32, 0, |
| 9445 | /* 36150*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9446 | /* 36162*/ OPC_EmitInteger, MVT::i32, 1, |
| 9447 | /* 36165*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9448 | /* 36168*/ OPC_EmitInteger, MVT::i32, 0, |
| 9449 | /* 36171*/ OPC_EmitInteger, MVT::i32, 0, |
| 9450 | /* 36174*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MUL_INT24_cm), 0, |
| 9451 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9452 | // Src: (AMDGPUmul_i24_impl:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) - Complexity = 3 |
| 9453 | // Dst: (MUL_INT24_cm:{ *:[i32] } i32:{ *:[i32] }:$src0, i32:{ *:[i32] }:$src1) |
| 9454 | /* 36200*/ /*SwitchOpcode*/ 104, TARGET_VAL(AMDGPUISD::MULHI_I24),// ->36307 |
| 9455 | /* 36203*/ OPC_RecordChild0, // #0 = $src0 |
| 9456 | /* 36204*/ OPC_RecordChild1, // #1 = $src1 |
| 9457 | /* 36205*/ OPC_CheckType, MVT::i32, |
| 9458 | /* 36207*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 9459 | /* 36209*/ OPC_EmitInteger, MVT::i32, 0, |
| 9460 | /* 36212*/ OPC_EmitInteger, MVT::i32, 0, |
| 9461 | /* 36215*/ OPC_EmitInteger, MVT::i32, 1, |
| 9462 | /* 36218*/ OPC_EmitInteger, MVT::i32, 0, |
| 9463 | /* 36221*/ OPC_EmitInteger, MVT::i32, 0, |
| 9464 | /* 36224*/ OPC_EmitInteger, MVT::i32, 0, |
| 9465 | /* 36227*/ OPC_EmitInteger, MVT::i32, 0, |
| 9466 | /* 36230*/ OPC_EmitInteger, MVT::i32, 0, |
| 9467 | /* 36233*/ OPC_EmitInteger, MVT::i32, 0, |
| 9468 | /* 36236*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9469 | /* 36248*/ OPC_EmitInteger, MVT::i32, 0, |
| 9470 | /* 36251*/ OPC_EmitInteger, MVT::i32, 0, |
| 9471 | /* 36254*/ OPC_EmitInteger, MVT::i32, 0, |
| 9472 | /* 36257*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9473 | /* 36269*/ OPC_EmitInteger, MVT::i32, 1, |
| 9474 | /* 36272*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9475 | /* 36275*/ OPC_EmitInteger, MVT::i32, 0, |
| 9476 | /* 36278*/ OPC_EmitInteger, MVT::i32, 0, |
| 9477 | /* 36281*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULHI_INT_cm24), 0, |
| 9478 | MVT::i32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9479 | // Src: (AMDGPUmulhi_i24:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) - Complexity = 3 |
| 9480 | // Dst: (MULHI_INT_cm24:{ *:[i32] } R600_Reg32:{ *:[i32] }:$src0, R600_Reg32:{ *:[i32] }:$src1) |
| 9481 | /* 36307*/ /*SwitchOpcode*/ 8, TARGET_VAL(AMDGPUISD::ENDPGM),// ->36318 |
| 9482 | /* 36310*/ OPC_RecordNode, // #0 = 'AMDGPUendpgm' chained node |
| 9483 | /* 36311*/ OPC_CaptureGlueInput, |
| 9484 | /* 36312*/ OPC_EmitMergeInputChains1_0, |
| 9485 | /* 36313*/ OPC_MorphNodeTo0, TARGET_VAL(R600::RETURN), 0|OPFL_Chain|OPFL_GlueInput, |
| 9486 | 0/*#Ops*/, |
| 9487 | // Src: (AMDGPUendpgm) - Complexity = 3 |
| 9488 | // Dst: (RETURN) |
| 9489 | /* 36318*/ /*SwitchOpcode*/ 14, TARGET_VAL(ISD::Constant),// ->36335 |
| 9490 | /* 36321*/ OPC_RecordNode, // #0 = $val |
| 9491 | /* 36322*/ OPC_CheckType, MVT::i32, |
| 9492 | /* 36324*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9493 | /* 36326*/ OPC_EmitConvertToTarget, 0, |
| 9494 | /* 36328*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 9495 | MVT::i32, 1/*#Ops*/, 1, |
| 9496 | // Src: (imm:{ *:[i32] }):$val - Complexity = 3 |
| 9497 | // Dst: (MOV_IMM_I32:{ *:[i32] } (imm:{ *:[i32] }):$val) |
| 9498 | /* 36335*/ /*SwitchOpcode*/ 14, TARGET_VAL(ISD::BR),// ->36352 |
| 9499 | /* 36338*/ OPC_RecordNode, // #0 = 'br' chained node |
| 9500 | /* 36339*/ OPC_RecordChild1, // #1 = $target |
| 9501 | /* 36340*/ OPC_MoveChild1, |
| 9502 | /* 36341*/ OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock), |
| 9503 | /* 36344*/ OPC_MoveParent, |
| 9504 | /* 36345*/ OPC_EmitMergeInputChains1_0, |
| 9505 | /* 36346*/ OPC_MorphNodeTo0, TARGET_VAL(R600::BRANCH), 0|OPFL_Chain, |
| 9506 | 1/*#Ops*/, 1, |
| 9507 | // Src: (br (bb:{ *:[Other] }):$target) - Complexity = 3 |
| 9508 | // Dst: (BRANCH (bb:{ *:[Other] }):$target) |
| 9509 | /* 36352*/ /*SwitchOpcode*/ 32, TARGET_VAL(AMDGPUISD::BRANCH_COND),// ->36387 |
| 9510 | /* 36355*/ OPC_RecordNode, // #0 = 'IL_brcond' chained node |
| 9511 | /* 36356*/ OPC_RecordChild1, // #1 = $target |
| 9512 | /* 36357*/ OPC_MoveChild1, |
| 9513 | /* 36358*/ OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock), |
| 9514 | /* 36361*/ OPC_MoveParent, |
| 9515 | /* 36362*/ OPC_RecordChild2, // #2 = $src0 |
| 9516 | /* 36363*/ OPC_Scope, 10, /*->36375*/ // 2 children in Scope |
| 9517 | /* 36365*/ OPC_CheckChild2Type, MVT::i32, |
| 9518 | /* 36367*/ OPC_EmitMergeInputChains1_0, |
| 9519 | /* 36368*/ OPC_MorphNodeTo0, TARGET_VAL(R600::BRANCH_COND_i32), 0|OPFL_Chain, |
| 9520 | 2/*#Ops*/, 1, 2, |
| 9521 | // Src: (IL_brcond (bb:{ *:[Other] }):$target, R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 9522 | // Dst: (BRANCH_COND_i32 (bb:{ *:[Other] }):$target, R600_Reg32:{ *:[i32] }:$src0) |
| 9523 | /* 36375*/ /*Scope*/ 10, /*->36386*/ |
| 9524 | /* 36376*/ OPC_CheckChild2Type, MVT::f32, |
| 9525 | /* 36378*/ OPC_EmitMergeInputChains1_0, |
| 9526 | /* 36379*/ OPC_MorphNodeTo0, TARGET_VAL(R600::BRANCH_COND_f32), 0|OPFL_Chain, |
| 9527 | 2/*#Ops*/, 1, 2, |
| 9528 | // Src: (IL_brcond (bb:{ *:[Other] }):$target, R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 9529 | // Dst: (BRANCH_COND_f32 (bb:{ *:[Other] }):$target, R600_Reg32:{ *:[f32] }:$src0) |
| 9530 | /* 36386*/ 0, /*End of Scope*/ |
| 9531 | /* 36387*/ /*SwitchOpcode*/ 83|128,5/*723*/, TARGET_VAL(ISD::FDIV),// ->37114 |
| 9532 | /* 36391*/ OPC_Scope, 85|128,1/*213*/, /*->36607*/ // 2 children in Scope |
| 9533 | /* 36394*/ OPC_MoveChild0, |
| 9534 | /* 36395*/ OPC_CheckOpcode, TARGET_VAL(ISD::ConstantFP), |
| 9535 | /* 36398*/ OPC_CheckPredicate, 2, // Predicate_FP_ONE |
| 9536 | /* 36400*/ OPC_MoveParent, |
| 9537 | /* 36401*/ OPC_RecordChild1, // #0 = $src |
| 9538 | /* 36402*/ OPC_CheckType, MVT::f32, |
| 9539 | /* 36404*/ OPC_Scope, 66, /*->36472*/ // 3 children in Scope |
| 9540 | /* 36406*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 9541 | /* 36408*/ OPC_EmitInteger, MVT::i32, 1, |
| 9542 | /* 36411*/ OPC_EmitInteger, MVT::i32, 0, |
| 9543 | /* 36414*/ OPC_EmitInteger, MVT::i32, 0, |
| 9544 | /* 36417*/ OPC_EmitInteger, MVT::i32, 0, |
| 9545 | /* 36420*/ OPC_EmitInteger, MVT::i32, 0, |
| 9546 | /* 36423*/ OPC_EmitInteger, MVT::i32, 0, |
| 9547 | /* 36426*/ OPC_EmitInteger, MVT::i32, 0, |
| 9548 | /* 36429*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9549 | /* 36441*/ OPC_EmitInteger, MVT::i32, 1, |
| 9550 | /* 36444*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9551 | /* 36447*/ OPC_EmitInteger, MVT::i32, 0, |
| 9552 | /* 36450*/ OPC_EmitInteger, MVT::i32, 0, |
| 9553 | /* 36453*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_r600), 0, |
| 9554 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9555 | // Src: (fdiv:{ *:[f32] } (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, f32:{ *:[f32] }:$src) - Complexity = 7 |
| 9556 | // Dst: (RECIP_IEEE_r600:{ *:[f32] } ?:{ *:[f32] }:$src) |
| 9557 | /* 36472*/ /*Scope*/ 66, /*->36539*/ |
| 9558 | /* 36473*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 9559 | /* 36475*/ OPC_EmitInteger, MVT::i32, 1, |
| 9560 | /* 36478*/ OPC_EmitInteger, MVT::i32, 0, |
| 9561 | /* 36481*/ OPC_EmitInteger, MVT::i32, 0, |
| 9562 | /* 36484*/ OPC_EmitInteger, MVT::i32, 0, |
| 9563 | /* 36487*/ OPC_EmitInteger, MVT::i32, 0, |
| 9564 | /* 36490*/ OPC_EmitInteger, MVT::i32, 0, |
| 9565 | /* 36493*/ OPC_EmitInteger, MVT::i32, 0, |
| 9566 | /* 36496*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9567 | /* 36508*/ OPC_EmitInteger, MVT::i32, 1, |
| 9568 | /* 36511*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9569 | /* 36514*/ OPC_EmitInteger, MVT::i32, 0, |
| 9570 | /* 36517*/ OPC_EmitInteger, MVT::i32, 0, |
| 9571 | /* 36520*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_eg), 0, |
| 9572 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9573 | // Src: (fdiv:{ *:[f32] } (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, f32:{ *:[f32] }:$src) - Complexity = 7 |
| 9574 | // Dst: (RECIP_IEEE_eg:{ *:[f32] } ?:{ *:[f32] }:$src) |
| 9575 | /* 36539*/ /*Scope*/ 66, /*->36606*/ |
| 9576 | /* 36540*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 9577 | /* 36542*/ OPC_EmitInteger, MVT::i32, 1, |
| 9578 | /* 36545*/ OPC_EmitInteger, MVT::i32, 0, |
| 9579 | /* 36548*/ OPC_EmitInteger, MVT::i32, 0, |
| 9580 | /* 36551*/ OPC_EmitInteger, MVT::i32, 0, |
| 9581 | /* 36554*/ OPC_EmitInteger, MVT::i32, 0, |
| 9582 | /* 36557*/ OPC_EmitInteger, MVT::i32, 0, |
| 9583 | /* 36560*/ OPC_EmitInteger, MVT::i32, 0, |
| 9584 | /* 36563*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9585 | /* 36575*/ OPC_EmitInteger, MVT::i32, 1, |
| 9586 | /* 36578*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9587 | /* 36581*/ OPC_EmitInteger, MVT::i32, 0, |
| 9588 | /* 36584*/ OPC_EmitInteger, MVT::i32, 0, |
| 9589 | /* 36587*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_cm), 0, |
| 9590 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9591 | // Src: (fdiv:{ *:[f32] } (fpimm:{ *:[f32] })<<P:Predicate_FP_ONE>>, f32:{ *:[f32] }:$src) - Complexity = 7 |
| 9592 | // Dst: (RECIP_IEEE_cm:{ *:[f32] } ?:{ *:[f32] }:$src) |
| 9593 | /* 36606*/ 0, /*End of Scope*/ |
| 9594 | /* 36607*/ /*Scope*/ 120|128,3/*504*/, /*->37113*/ |
| 9595 | /* 36609*/ OPC_RecordChild0, // #0 = $src0 |
| 9596 | /* 36610*/ OPC_RecordChild1, // #1 = $src1 |
| 9597 | /* 36611*/ OPC_CheckType, MVT::f32, |
| 9598 | /* 36613*/ OPC_Scope, 36|128,1/*164*/, /*->36780*/ // 3 children in Scope |
| 9599 | /* 36616*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 9600 | /* 36618*/ OPC_EmitInteger, MVT::i32, 0, |
| 9601 | /* 36621*/ OPC_EmitInteger, MVT::i32, 0, |
| 9602 | /* 36624*/ OPC_EmitInteger, MVT::i32, 1, |
| 9603 | /* 36627*/ OPC_EmitInteger, MVT::i32, 0, |
| 9604 | /* 36630*/ OPC_EmitInteger, MVT::i32, 0, |
| 9605 | /* 36633*/ OPC_EmitInteger, MVT::i32, 0, |
| 9606 | /* 36636*/ OPC_EmitInteger, MVT::i32, 0, |
| 9607 | /* 36639*/ OPC_EmitInteger, MVT::i32, 0, |
| 9608 | /* 36642*/ OPC_EmitInteger, MVT::i32, 0, |
| 9609 | /* 36645*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9610 | /* 36657*/ OPC_EmitInteger, MVT::i32, 1, |
| 9611 | /* 36660*/ OPC_EmitInteger, MVT::i32, 0, |
| 9612 | /* 36663*/ OPC_EmitInteger, MVT::i32, 0, |
| 9613 | /* 36666*/ OPC_EmitInteger, MVT::i32, 0, |
| 9614 | /* 36669*/ OPC_EmitInteger, MVT::i32, 0, |
| 9615 | /* 36672*/ OPC_EmitInteger, MVT::i32, 0, |
| 9616 | /* 36675*/ OPC_EmitInteger, MVT::i32, 0, |
| 9617 | /* 36678*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9618 | /* 36690*/ OPC_EmitInteger, MVT::i32, 1, |
| 9619 | /* 36693*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9620 | /* 36696*/ OPC_EmitInteger, MVT::i32, 0, |
| 9621 | /* 36699*/ OPC_EmitInteger, MVT::i32, 0, |
| 9622 | /* 36702*/ OPC_EmitNode1, TARGET_VAL(R600::RECIP_IEEE_r600), 0, |
| 9623 | MVT::i32, 13/*#Ops*/, 12, 13, 14, 15, 1, 16, 17, 18, 19, 20, 21, 22, 23, // Results = #24 |
| 9624 | /* 36721*/ OPC_EmitInteger, MVT::i32, 0, |
| 9625 | /* 36724*/ OPC_EmitInteger, MVT::i32, 0, |
| 9626 | /* 36727*/ OPC_EmitInteger, MVT::i32, 0, |
| 9627 | /* 36730*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9628 | /* 36742*/ OPC_EmitInteger, MVT::i32, 1, |
| 9629 | /* 36745*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9630 | /* 36748*/ OPC_EmitInteger, MVT::i32, 0, |
| 9631 | /* 36751*/ OPC_EmitInteger, MVT::i32, 0, |
| 9632 | /* 36754*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MUL_IEEE), 0, |
| 9633 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 24, 25, 26, 27, 28, 29, 30, 31, 32, |
| 9634 | // Src: (fdiv:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) - Complexity = 3 |
| 9635 | // Dst: (MUL_IEEE:{ *:[f32] } ?:{ *:[f32] }:$src0, (RECIP_IEEE_r600:{ *:[i32] } ?:{ *:[f32] }:$src1)) |
| 9636 | /* 36780*/ /*Scope*/ 36|128,1/*164*/, /*->36946*/ |
| 9637 | /* 36782*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 9638 | /* 36784*/ OPC_EmitInteger, MVT::i32, 0, |
| 9639 | /* 36787*/ OPC_EmitInteger, MVT::i32, 0, |
| 9640 | /* 36790*/ OPC_EmitInteger, MVT::i32, 1, |
| 9641 | /* 36793*/ OPC_EmitInteger, MVT::i32, 0, |
| 9642 | /* 36796*/ OPC_EmitInteger, MVT::i32, 0, |
| 9643 | /* 36799*/ OPC_EmitInteger, MVT::i32, 0, |
| 9644 | /* 36802*/ OPC_EmitInteger, MVT::i32, 0, |
| 9645 | /* 36805*/ OPC_EmitInteger, MVT::i32, 0, |
| 9646 | /* 36808*/ OPC_EmitInteger, MVT::i32, 0, |
| 9647 | /* 36811*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9648 | /* 36823*/ OPC_EmitInteger, MVT::i32, 1, |
| 9649 | /* 36826*/ OPC_EmitInteger, MVT::i32, 0, |
| 9650 | /* 36829*/ OPC_EmitInteger, MVT::i32, 0, |
| 9651 | /* 36832*/ OPC_EmitInteger, MVT::i32, 0, |
| 9652 | /* 36835*/ OPC_EmitInteger, MVT::i32, 0, |
| 9653 | /* 36838*/ OPC_EmitInteger, MVT::i32, 0, |
| 9654 | /* 36841*/ OPC_EmitInteger, MVT::i32, 0, |
| 9655 | /* 36844*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9656 | /* 36856*/ OPC_EmitInteger, MVT::i32, 1, |
| 9657 | /* 36859*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9658 | /* 36862*/ OPC_EmitInteger, MVT::i32, 0, |
| 9659 | /* 36865*/ OPC_EmitInteger, MVT::i32, 0, |
| 9660 | /* 36868*/ OPC_EmitNode1, TARGET_VAL(R600::RECIP_IEEE_eg), 0, |
| 9661 | MVT::i32, 13/*#Ops*/, 12, 13, 14, 15, 1, 16, 17, 18, 19, 20, 21, 22, 23, // Results = #24 |
| 9662 | /* 36887*/ OPC_EmitInteger, MVT::i32, 0, |
| 9663 | /* 36890*/ OPC_EmitInteger, MVT::i32, 0, |
| 9664 | /* 36893*/ OPC_EmitInteger, MVT::i32, 0, |
| 9665 | /* 36896*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9666 | /* 36908*/ OPC_EmitInteger, MVT::i32, 1, |
| 9667 | /* 36911*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9668 | /* 36914*/ OPC_EmitInteger, MVT::i32, 0, |
| 9669 | /* 36917*/ OPC_EmitInteger, MVT::i32, 0, |
| 9670 | /* 36920*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MUL_IEEE), 0, |
| 9671 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 24, 25, 26, 27, 28, 29, 30, 31, 32, |
| 9672 | // Src: (fdiv:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) - Complexity = 3 |
| 9673 | // Dst: (MUL_IEEE:{ *:[f32] } ?:{ *:[f32] }:$src0, (RECIP_IEEE_eg:{ *:[i32] } ?:{ *:[f32] }:$src1)) |
| 9674 | /* 36946*/ /*Scope*/ 36|128,1/*164*/, /*->37112*/ |
| 9675 | /* 36948*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 9676 | /* 36950*/ OPC_EmitInteger, MVT::i32, 0, |
| 9677 | /* 36953*/ OPC_EmitInteger, MVT::i32, 0, |
| 9678 | /* 36956*/ OPC_EmitInteger, MVT::i32, 1, |
| 9679 | /* 36959*/ OPC_EmitInteger, MVT::i32, 0, |
| 9680 | /* 36962*/ OPC_EmitInteger, MVT::i32, 0, |
| 9681 | /* 36965*/ OPC_EmitInteger, MVT::i32, 0, |
| 9682 | /* 36968*/ OPC_EmitInteger, MVT::i32, 0, |
| 9683 | /* 36971*/ OPC_EmitInteger, MVT::i32, 0, |
| 9684 | /* 36974*/ OPC_EmitInteger, MVT::i32, 0, |
| 9685 | /* 36977*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9686 | /* 36989*/ OPC_EmitInteger, MVT::i32, 1, |
| 9687 | /* 36992*/ OPC_EmitInteger, MVT::i32, 0, |
| 9688 | /* 36995*/ OPC_EmitInteger, MVT::i32, 0, |
| 9689 | /* 36998*/ OPC_EmitInteger, MVT::i32, 0, |
| 9690 | /* 37001*/ OPC_EmitInteger, MVT::i32, 0, |
| 9691 | /* 37004*/ OPC_EmitInteger, MVT::i32, 0, |
| 9692 | /* 37007*/ OPC_EmitInteger, MVT::i32, 0, |
| 9693 | /* 37010*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9694 | /* 37022*/ OPC_EmitInteger, MVT::i32, 1, |
| 9695 | /* 37025*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9696 | /* 37028*/ OPC_EmitInteger, MVT::i32, 0, |
| 9697 | /* 37031*/ OPC_EmitInteger, MVT::i32, 0, |
| 9698 | /* 37034*/ OPC_EmitNode1, TARGET_VAL(R600::RECIP_IEEE_cm), 0, |
| 9699 | MVT::i32, 13/*#Ops*/, 12, 13, 14, 15, 1, 16, 17, 18, 19, 20, 21, 22, 23, // Results = #24 |
| 9700 | /* 37053*/ OPC_EmitInteger, MVT::i32, 0, |
| 9701 | /* 37056*/ OPC_EmitInteger, MVT::i32, 0, |
| 9702 | /* 37059*/ OPC_EmitInteger, MVT::i32, 0, |
| 9703 | /* 37062*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9704 | /* 37074*/ OPC_EmitInteger, MVT::i32, 1, |
| 9705 | /* 37077*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9706 | /* 37080*/ OPC_EmitInteger, MVT::i32, 0, |
| 9707 | /* 37083*/ OPC_EmitInteger, MVT::i32, 0, |
| 9708 | /* 37086*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MUL_IEEE), 0, |
| 9709 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 24, 25, 26, 27, 28, 29, 30, 31, 32, |
| 9710 | // Src: (fdiv:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) - Complexity = 3 |
| 9711 | // Dst: (MUL_IEEE:{ *:[f32] } ?:{ *:[f32] }:$src0, (RECIP_IEEE_cm:{ *:[i32] } ?:{ *:[f32] }:$src1)) |
| 9712 | /* 37112*/ 0, /*End of Scope*/ |
| 9713 | /* 37113*/ 0, /*End of Scope*/ |
| 9714 | /* 37114*/ /*SwitchOpcode*/ 39|128,3/*423*/, TARGET_VAL(AMDGPUISD::RCP),// ->37541 |
| 9715 | /* 37118*/ OPC_Scope, 83|128,1/*211*/, /*->37332*/ // 2 children in Scope |
| 9716 | /* 37121*/ OPC_MoveChild0, |
| 9717 | /* 37122*/ OPC_CheckOpcode, TARGET_VAL(ISD::FSQRT), |
| 9718 | /* 37125*/ OPC_RecordChild0, // #0 = $src |
| 9719 | /* 37126*/ OPC_MoveParent, |
| 9720 | /* 37127*/ OPC_CheckType, MVT::f32, |
| 9721 | /* 37129*/ OPC_Scope, 66, /*->37197*/ // 3 children in Scope |
| 9722 | /* 37131*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 9723 | /* 37133*/ OPC_EmitInteger, MVT::i32, 1, |
| 9724 | /* 37136*/ OPC_EmitInteger, MVT::i32, 0, |
| 9725 | /* 37139*/ OPC_EmitInteger, MVT::i32, 0, |
| 9726 | /* 37142*/ OPC_EmitInteger, MVT::i32, 0, |
| 9727 | /* 37145*/ OPC_EmitInteger, MVT::i32, 0, |
| 9728 | /* 37148*/ OPC_EmitInteger, MVT::i32, 0, |
| 9729 | /* 37151*/ OPC_EmitInteger, MVT::i32, 0, |
| 9730 | /* 37154*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9731 | /* 37166*/ OPC_EmitInteger, MVT::i32, 1, |
| 9732 | /* 37169*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9733 | /* 37172*/ OPC_EmitInteger, MVT::i32, 0, |
| 9734 | /* 37175*/ OPC_EmitInteger, MVT::i32, 0, |
| 9735 | /* 37178*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_r600), 0, |
| 9736 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9737 | // Src: (AMDGPUrcp_impl:{ *:[f32] } (fsqrt:{ *:[f32] } f32:{ *:[f32] }:$src)) - Complexity = 6 |
| 9738 | // Dst: (RECIPSQRT_IEEE_r600:{ *:[f32] } ?:{ *:[f32] }:$src) |
| 9739 | /* 37197*/ /*Scope*/ 66, /*->37264*/ |
| 9740 | /* 37198*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 9741 | /* 37200*/ OPC_EmitInteger, MVT::i32, 1, |
| 9742 | /* 37203*/ OPC_EmitInteger, MVT::i32, 0, |
| 9743 | /* 37206*/ OPC_EmitInteger, MVT::i32, 0, |
| 9744 | /* 37209*/ OPC_EmitInteger, MVT::i32, 0, |
| 9745 | /* 37212*/ OPC_EmitInteger, MVT::i32, 0, |
| 9746 | /* 37215*/ OPC_EmitInteger, MVT::i32, 0, |
| 9747 | /* 37218*/ OPC_EmitInteger, MVT::i32, 0, |
| 9748 | /* 37221*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9749 | /* 37233*/ OPC_EmitInteger, MVT::i32, 1, |
| 9750 | /* 37236*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9751 | /* 37239*/ OPC_EmitInteger, MVT::i32, 0, |
| 9752 | /* 37242*/ OPC_EmitInteger, MVT::i32, 0, |
| 9753 | /* 37245*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_eg), 0, |
| 9754 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9755 | // Src: (AMDGPUrcp_impl:{ *:[f32] } (fsqrt:{ *:[f32] } f32:{ *:[f32] }:$src)) - Complexity = 6 |
| 9756 | // Dst: (RECIPSQRT_IEEE_eg:{ *:[f32] } ?:{ *:[f32] }:$src) |
| 9757 | /* 37264*/ /*Scope*/ 66, /*->37331*/ |
| 9758 | /* 37265*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 9759 | /* 37267*/ OPC_EmitInteger, MVT::i32, 1, |
| 9760 | /* 37270*/ OPC_EmitInteger, MVT::i32, 0, |
| 9761 | /* 37273*/ OPC_EmitInteger, MVT::i32, 0, |
| 9762 | /* 37276*/ OPC_EmitInteger, MVT::i32, 0, |
| 9763 | /* 37279*/ OPC_EmitInteger, MVT::i32, 0, |
| 9764 | /* 37282*/ OPC_EmitInteger, MVT::i32, 0, |
| 9765 | /* 37285*/ OPC_EmitInteger, MVT::i32, 0, |
| 9766 | /* 37288*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9767 | /* 37300*/ OPC_EmitInteger, MVT::i32, 1, |
| 9768 | /* 37303*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9769 | /* 37306*/ OPC_EmitInteger, MVT::i32, 0, |
| 9770 | /* 37309*/ OPC_EmitInteger, MVT::i32, 0, |
| 9771 | /* 37312*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_cm), 0, |
| 9772 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9773 | // Src: (AMDGPUrcp_impl:{ *:[f32] } (fsqrt:{ *:[f32] } f32:{ *:[f32] }:$src)) - Complexity = 6 |
| 9774 | // Dst: (RECIPSQRT_IEEE_cm:{ *:[f32] } ?:{ *:[f32] }:$src) |
| 9775 | /* 37331*/ 0, /*End of Scope*/ |
| 9776 | /* 37332*/ /*Scope*/ 78|128,1/*206*/, /*->37540*/ |
| 9777 | /* 37334*/ OPC_RecordChild0, // #0 = $src0 |
| 9778 | /* 37335*/ OPC_CheckType, MVT::f32, |
| 9779 | /* 37337*/ OPC_Scope, 66, /*->37405*/ // 3 children in Scope |
| 9780 | /* 37339*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 9781 | /* 37341*/ OPC_EmitInteger, MVT::i32, 1, |
| 9782 | /* 37344*/ OPC_EmitInteger, MVT::i32, 0, |
| 9783 | /* 37347*/ OPC_EmitInteger, MVT::i32, 0, |
| 9784 | /* 37350*/ OPC_EmitInteger, MVT::i32, 0, |
| 9785 | /* 37353*/ OPC_EmitInteger, MVT::i32, 0, |
| 9786 | /* 37356*/ OPC_EmitInteger, MVT::i32, 0, |
| 9787 | /* 37359*/ OPC_EmitInteger, MVT::i32, 0, |
| 9788 | /* 37362*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9789 | /* 37374*/ OPC_EmitInteger, MVT::i32, 1, |
| 9790 | /* 37377*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9791 | /* 37380*/ OPC_EmitInteger, MVT::i32, 0, |
| 9792 | /* 37383*/ OPC_EmitInteger, MVT::i32, 0, |
| 9793 | /* 37386*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_r600), 0, |
| 9794 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9795 | // Src: (AMDGPUrcp_impl:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 9796 | // Dst: (RECIP_IEEE_r600:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 9797 | /* 37405*/ /*Scope*/ 66, /*->37472*/ |
| 9798 | /* 37406*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 9799 | /* 37408*/ OPC_EmitInteger, MVT::i32, 1, |
| 9800 | /* 37411*/ OPC_EmitInteger, MVT::i32, 0, |
| 9801 | /* 37414*/ OPC_EmitInteger, MVT::i32, 0, |
| 9802 | /* 37417*/ OPC_EmitInteger, MVT::i32, 0, |
| 9803 | /* 37420*/ OPC_EmitInteger, MVT::i32, 0, |
| 9804 | /* 37423*/ OPC_EmitInteger, MVT::i32, 0, |
| 9805 | /* 37426*/ OPC_EmitInteger, MVT::i32, 0, |
| 9806 | /* 37429*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9807 | /* 37441*/ OPC_EmitInteger, MVT::i32, 1, |
| 9808 | /* 37444*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9809 | /* 37447*/ OPC_EmitInteger, MVT::i32, 0, |
| 9810 | /* 37450*/ OPC_EmitInteger, MVT::i32, 0, |
| 9811 | /* 37453*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_eg), 0, |
| 9812 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9813 | // Src: (AMDGPUrcp_impl:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 9814 | // Dst: (RECIP_IEEE_eg:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 9815 | /* 37472*/ /*Scope*/ 66, /*->37539*/ |
| 9816 | /* 37473*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 9817 | /* 37475*/ OPC_EmitInteger, MVT::i32, 1, |
| 9818 | /* 37478*/ OPC_EmitInteger, MVT::i32, 0, |
| 9819 | /* 37481*/ OPC_EmitInteger, MVT::i32, 0, |
| 9820 | /* 37484*/ OPC_EmitInteger, MVT::i32, 0, |
| 9821 | /* 37487*/ OPC_EmitInteger, MVT::i32, 0, |
| 9822 | /* 37490*/ OPC_EmitInteger, MVT::i32, 0, |
| 9823 | /* 37493*/ OPC_EmitInteger, MVT::i32, 0, |
| 9824 | /* 37496*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9825 | /* 37508*/ OPC_EmitInteger, MVT::i32, 1, |
| 9826 | /* 37511*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9827 | /* 37514*/ OPC_EmitInteger, MVT::i32, 0, |
| 9828 | /* 37517*/ OPC_EmitInteger, MVT::i32, 0, |
| 9829 | /* 37520*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_cm), 0, |
| 9830 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 9831 | // Src: (AMDGPUrcp_impl:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 9832 | // Dst: (RECIP_IEEE_cm:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 9833 | /* 37539*/ 0, /*End of Scope*/ |
| 9834 | /* 37540*/ 0, /*End of Scope*/ |
| 9835 | /* 37541*/ /*SwitchOpcode*/ 104, TARGET_VAL(ISD::FADD),// ->37648 |
| 9836 | /* 37544*/ OPC_RecordChild0, // #0 = $src0 |
| 9837 | /* 37545*/ OPC_RecordChild1, // #1 = $src1 |
| 9838 | /* 37546*/ OPC_CheckType, MVT::f32, |
| 9839 | /* 37548*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9840 | /* 37550*/ OPC_EmitInteger, MVT::i32, 0, |
| 9841 | /* 37553*/ OPC_EmitInteger, MVT::i32, 0, |
| 9842 | /* 37556*/ OPC_EmitInteger, MVT::i32, 1, |
| 9843 | /* 37559*/ OPC_EmitInteger, MVT::i32, 0, |
| 9844 | /* 37562*/ OPC_EmitInteger, MVT::i32, 0, |
| 9845 | /* 37565*/ OPC_EmitInteger, MVT::i32, 0, |
| 9846 | /* 37568*/ OPC_EmitInteger, MVT::i32, 0, |
| 9847 | /* 37571*/ OPC_EmitInteger, MVT::i32, 0, |
| 9848 | /* 37574*/ OPC_EmitInteger, MVT::i32, 0, |
| 9849 | /* 37577*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9850 | /* 37589*/ OPC_EmitInteger, MVT::i32, 0, |
| 9851 | /* 37592*/ OPC_EmitInteger, MVT::i32, 0, |
| 9852 | /* 37595*/ OPC_EmitInteger, MVT::i32, 0, |
| 9853 | /* 37598*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9854 | /* 37610*/ OPC_EmitInteger, MVT::i32, 1, |
| 9855 | /* 37613*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9856 | /* 37616*/ OPC_EmitInteger, MVT::i32, 0, |
| 9857 | /* 37619*/ OPC_EmitInteger, MVT::i32, 0, |
| 9858 | /* 37622*/ OPC_MorphNodeTo1, TARGET_VAL(R600::ADD), 0, |
| 9859 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9860 | // Src: (fadd:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) - Complexity = 3 |
| 9861 | // Dst: (ADD:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) |
| 9862 | /* 37648*/ /*SwitchOpcode*/ 104, TARGET_VAL(ISD::FMUL),// ->37755 |
| 9863 | /* 37651*/ OPC_RecordChild0, // #0 = $src0 |
| 9864 | /* 37652*/ OPC_RecordChild1, // #1 = $src1 |
| 9865 | /* 37653*/ OPC_CheckType, MVT::f32, |
| 9866 | /* 37655*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9867 | /* 37657*/ OPC_EmitInteger, MVT::i32, 0, |
| 9868 | /* 37660*/ OPC_EmitInteger, MVT::i32, 0, |
| 9869 | /* 37663*/ OPC_EmitInteger, MVT::i32, 1, |
| 9870 | /* 37666*/ OPC_EmitInteger, MVT::i32, 0, |
| 9871 | /* 37669*/ OPC_EmitInteger, MVT::i32, 0, |
| 9872 | /* 37672*/ OPC_EmitInteger, MVT::i32, 0, |
| 9873 | /* 37675*/ OPC_EmitInteger, MVT::i32, 0, |
| 9874 | /* 37678*/ OPC_EmitInteger, MVT::i32, 0, |
| 9875 | /* 37681*/ OPC_EmitInteger, MVT::i32, 0, |
| 9876 | /* 37684*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9877 | /* 37696*/ OPC_EmitInteger, MVT::i32, 0, |
| 9878 | /* 37699*/ OPC_EmitInteger, MVT::i32, 0, |
| 9879 | /* 37702*/ OPC_EmitInteger, MVT::i32, 0, |
| 9880 | /* 37705*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9881 | /* 37717*/ OPC_EmitInteger, MVT::i32, 1, |
| 9882 | /* 37720*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9883 | /* 37723*/ OPC_EmitInteger, MVT::i32, 0, |
| 9884 | /* 37726*/ OPC_EmitInteger, MVT::i32, 0, |
| 9885 | /* 37729*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MUL_IEEE), 0, |
| 9886 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9887 | // Src: (fmul:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) - Complexity = 3 |
| 9888 | // Dst: (MUL_IEEE:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) |
| 9889 | /* 37755*/ /*SwitchOpcode*/ 104, TARGET_VAL(AMDGPUISD::FMAX_LEGACY),// ->37862 |
| 9890 | /* 37758*/ OPC_RecordChild0, // #0 = $src0 |
| 9891 | /* 37759*/ OPC_RecordChild1, // #1 = $src1 |
| 9892 | /* 37760*/ OPC_CheckType, MVT::f32, |
| 9893 | /* 37762*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9894 | /* 37764*/ OPC_EmitInteger, MVT::i32, 0, |
| 9895 | /* 37767*/ OPC_EmitInteger, MVT::i32, 0, |
| 9896 | /* 37770*/ OPC_EmitInteger, MVT::i32, 1, |
| 9897 | /* 37773*/ OPC_EmitInteger, MVT::i32, 0, |
| 9898 | /* 37776*/ OPC_EmitInteger, MVT::i32, 0, |
| 9899 | /* 37779*/ OPC_EmitInteger, MVT::i32, 0, |
| 9900 | /* 37782*/ OPC_EmitInteger, MVT::i32, 0, |
| 9901 | /* 37785*/ OPC_EmitInteger, MVT::i32, 0, |
| 9902 | /* 37788*/ OPC_EmitInteger, MVT::i32, 0, |
| 9903 | /* 37791*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9904 | /* 37803*/ OPC_EmitInteger, MVT::i32, 0, |
| 9905 | /* 37806*/ OPC_EmitInteger, MVT::i32, 0, |
| 9906 | /* 37809*/ OPC_EmitInteger, MVT::i32, 0, |
| 9907 | /* 37812*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9908 | /* 37824*/ OPC_EmitInteger, MVT::i32, 1, |
| 9909 | /* 37827*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9910 | /* 37830*/ OPC_EmitInteger, MVT::i32, 0, |
| 9911 | /* 37833*/ OPC_EmitInteger, MVT::i32, 0, |
| 9912 | /* 37836*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MAX), 0, |
| 9913 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9914 | // Src: (AMDGPUfmax_legacy:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) - Complexity = 3 |
| 9915 | // Dst: (MAX:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) |
| 9916 | /* 37862*/ /*SwitchOpcode*/ 104, TARGET_VAL(AMDGPUISD::FMIN_LEGACY),// ->37969 |
| 9917 | /* 37865*/ OPC_RecordChild0, // #0 = $src0 |
| 9918 | /* 37866*/ OPC_RecordChild1, // #1 = $src1 |
| 9919 | /* 37867*/ OPC_CheckType, MVT::f32, |
| 9920 | /* 37869*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9921 | /* 37871*/ OPC_EmitInteger, MVT::i32, 0, |
| 9922 | /* 37874*/ OPC_EmitInteger, MVT::i32, 0, |
| 9923 | /* 37877*/ OPC_EmitInteger, MVT::i32, 1, |
| 9924 | /* 37880*/ OPC_EmitInteger, MVT::i32, 0, |
| 9925 | /* 37883*/ OPC_EmitInteger, MVT::i32, 0, |
| 9926 | /* 37886*/ OPC_EmitInteger, MVT::i32, 0, |
| 9927 | /* 37889*/ OPC_EmitInteger, MVT::i32, 0, |
| 9928 | /* 37892*/ OPC_EmitInteger, MVT::i32, 0, |
| 9929 | /* 37895*/ OPC_EmitInteger, MVT::i32, 0, |
| 9930 | /* 37898*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9931 | /* 37910*/ OPC_EmitInteger, MVT::i32, 0, |
| 9932 | /* 37913*/ OPC_EmitInteger, MVT::i32, 0, |
| 9933 | /* 37916*/ OPC_EmitInteger, MVT::i32, 0, |
| 9934 | /* 37919*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9935 | /* 37931*/ OPC_EmitInteger, MVT::i32, 1, |
| 9936 | /* 37934*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9937 | /* 37937*/ OPC_EmitInteger, MVT::i32, 0, |
| 9938 | /* 37940*/ OPC_EmitInteger, MVT::i32, 0, |
| 9939 | /* 37943*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MIN), 0, |
| 9940 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9941 | // Src: (AMDGPUfmin_legacy:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) - Complexity = 3 |
| 9942 | // Dst: (MIN:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) |
| 9943 | /* 37969*/ /*SwitchOpcode*/ 104, TARGET_VAL(ISD::FMAXNUM),// ->38076 |
| 9944 | /* 37972*/ OPC_RecordChild0, // #0 = $src0 |
| 9945 | /* 37973*/ OPC_RecordChild1, // #1 = $src1 |
| 9946 | /* 37974*/ OPC_CheckType, MVT::f32, |
| 9947 | /* 37976*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9948 | /* 37978*/ OPC_EmitInteger, MVT::i32, 0, |
| 9949 | /* 37981*/ OPC_EmitInteger, MVT::i32, 0, |
| 9950 | /* 37984*/ OPC_EmitInteger, MVT::i32, 1, |
| 9951 | /* 37987*/ OPC_EmitInteger, MVT::i32, 0, |
| 9952 | /* 37990*/ OPC_EmitInteger, MVT::i32, 0, |
| 9953 | /* 37993*/ OPC_EmitInteger, MVT::i32, 0, |
| 9954 | /* 37996*/ OPC_EmitInteger, MVT::i32, 0, |
| 9955 | /* 37999*/ OPC_EmitInteger, MVT::i32, 0, |
| 9956 | /* 38002*/ OPC_EmitInteger, MVT::i32, 0, |
| 9957 | /* 38005*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9958 | /* 38017*/ OPC_EmitInteger, MVT::i32, 0, |
| 9959 | /* 38020*/ OPC_EmitInteger, MVT::i32, 0, |
| 9960 | /* 38023*/ OPC_EmitInteger, MVT::i32, 0, |
| 9961 | /* 38026*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9962 | /* 38038*/ OPC_EmitInteger, MVT::i32, 1, |
| 9963 | /* 38041*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9964 | /* 38044*/ OPC_EmitInteger, MVT::i32, 0, |
| 9965 | /* 38047*/ OPC_EmitInteger, MVT::i32, 0, |
| 9966 | /* 38050*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MAX_DX10), 0, |
| 9967 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9968 | // Src: (fmaxnum:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) - Complexity = 3 |
| 9969 | // Dst: (MAX_DX10:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) |
| 9970 | /* 38076*/ /*SwitchOpcode*/ 104, TARGET_VAL(ISD::FMINNUM),// ->38183 |
| 9971 | /* 38079*/ OPC_RecordChild0, // #0 = $src0 |
| 9972 | /* 38080*/ OPC_RecordChild1, // #1 = $src1 |
| 9973 | /* 38081*/ OPC_CheckType, MVT::f32, |
| 9974 | /* 38083*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 9975 | /* 38085*/ OPC_EmitInteger, MVT::i32, 0, |
| 9976 | /* 38088*/ OPC_EmitInteger, MVT::i32, 0, |
| 9977 | /* 38091*/ OPC_EmitInteger, MVT::i32, 1, |
| 9978 | /* 38094*/ OPC_EmitInteger, MVT::i32, 0, |
| 9979 | /* 38097*/ OPC_EmitInteger, MVT::i32, 0, |
| 9980 | /* 38100*/ OPC_EmitInteger, MVT::i32, 0, |
| 9981 | /* 38103*/ OPC_EmitInteger, MVT::i32, 0, |
| 9982 | /* 38106*/ OPC_EmitInteger, MVT::i32, 0, |
| 9983 | /* 38109*/ OPC_EmitInteger, MVT::i32, 0, |
| 9984 | /* 38112*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9985 | /* 38124*/ OPC_EmitInteger, MVT::i32, 0, |
| 9986 | /* 38127*/ OPC_EmitInteger, MVT::i32, 0, |
| 9987 | /* 38130*/ OPC_EmitInteger, MVT::i32, 0, |
| 9988 | /* 38133*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 9989 | /* 38145*/ OPC_EmitInteger, MVT::i32, 1, |
| 9990 | /* 38148*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 9991 | /* 38151*/ OPC_EmitInteger, MVT::i32, 0, |
| 9992 | /* 38154*/ OPC_EmitInteger, MVT::i32, 0, |
| 9993 | /* 38157*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MIN_DX10), 0, |
| 9994 | MVT::f32, 20/*#Ops*/, 2, 3, 4, 5, 6, 7, 0, 8, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, 19, |
| 9995 | // Src: (fminnum:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) - Complexity = 3 |
| 9996 | // Dst: (MIN_DX10:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0, R600_Reg32:{ *:[f32] }:$src1) |
| 9997 | /* 38183*/ /*SwitchOpcode*/ 69, TARGET_VAL(AMDGPUISD::FRACT),// ->38255 |
| 9998 | /* 38186*/ OPC_RecordChild0, // #0 = $src0 |
| 9999 | /* 38187*/ OPC_CheckType, MVT::f32, |
| 10000 | /* 38189*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10001 | /* 38191*/ OPC_EmitInteger, MVT::i32, 1, |
| 10002 | /* 38194*/ OPC_EmitInteger, MVT::i32, 0, |
| 10003 | /* 38197*/ OPC_EmitInteger, MVT::i32, 0, |
| 10004 | /* 38200*/ OPC_EmitInteger, MVT::i32, 0, |
| 10005 | /* 38203*/ OPC_EmitInteger, MVT::i32, 0, |
| 10006 | /* 38206*/ OPC_EmitInteger, MVT::i32, 0, |
| 10007 | /* 38209*/ OPC_EmitInteger, MVT::i32, 0, |
| 10008 | /* 38212*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10009 | /* 38224*/ OPC_EmitInteger, MVT::i32, 1, |
| 10010 | /* 38227*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10011 | /* 38230*/ OPC_EmitInteger, MVT::i32, 0, |
| 10012 | /* 38233*/ OPC_EmitInteger, MVT::i32, 0, |
| 10013 | /* 38236*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FRACT), 0, |
| 10014 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10015 | // Src: (AMDGPUfract_impl:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10016 | // Dst: (FRACT:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10017 | /* 38255*/ /*SwitchOpcode*/ 69, TARGET_VAL(ISD::FTRUNC),// ->38327 |
| 10018 | /* 38258*/ OPC_RecordChild0, // #0 = $src0 |
| 10019 | /* 38259*/ OPC_CheckType, MVT::f32, |
| 10020 | /* 38261*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10021 | /* 38263*/ OPC_EmitInteger, MVT::i32, 1, |
| 10022 | /* 38266*/ OPC_EmitInteger, MVT::i32, 0, |
| 10023 | /* 38269*/ OPC_EmitInteger, MVT::i32, 0, |
| 10024 | /* 38272*/ OPC_EmitInteger, MVT::i32, 0, |
| 10025 | /* 38275*/ OPC_EmitInteger, MVT::i32, 0, |
| 10026 | /* 38278*/ OPC_EmitInteger, MVT::i32, 0, |
| 10027 | /* 38281*/ OPC_EmitInteger, MVT::i32, 0, |
| 10028 | /* 38284*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10029 | /* 38296*/ OPC_EmitInteger, MVT::i32, 1, |
| 10030 | /* 38299*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10031 | /* 38302*/ OPC_EmitInteger, MVT::i32, 0, |
| 10032 | /* 38305*/ OPC_EmitInteger, MVT::i32, 0, |
| 10033 | /* 38308*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TRUNC), 0, |
| 10034 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10035 | // Src: (ftrunc:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10036 | // Dst: (TRUNC:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10037 | /* 38327*/ /*SwitchOpcode*/ 69, TARGET_VAL(ISD::FCEIL),// ->38399 |
| 10038 | /* 38330*/ OPC_RecordChild0, // #0 = $src0 |
| 10039 | /* 38331*/ OPC_CheckType, MVT::f32, |
| 10040 | /* 38333*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10041 | /* 38335*/ OPC_EmitInteger, MVT::i32, 1, |
| 10042 | /* 38338*/ OPC_EmitInteger, MVT::i32, 0, |
| 10043 | /* 38341*/ OPC_EmitInteger, MVT::i32, 0, |
| 10044 | /* 38344*/ OPC_EmitInteger, MVT::i32, 0, |
| 10045 | /* 38347*/ OPC_EmitInteger, MVT::i32, 0, |
| 10046 | /* 38350*/ OPC_EmitInteger, MVT::i32, 0, |
| 10047 | /* 38353*/ OPC_EmitInteger, MVT::i32, 0, |
| 10048 | /* 38356*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10049 | /* 38368*/ OPC_EmitInteger, MVT::i32, 1, |
| 10050 | /* 38371*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10051 | /* 38374*/ OPC_EmitInteger, MVT::i32, 0, |
| 10052 | /* 38377*/ OPC_EmitInteger, MVT::i32, 0, |
| 10053 | /* 38380*/ OPC_MorphNodeTo1, TARGET_VAL(R600::CEIL), 0, |
| 10054 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10055 | // Src: (fceil:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10056 | // Dst: (CEIL:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10057 | /* 38399*/ /*SwitchOpcode*/ 69, TARGET_VAL(ISD::FRINT),// ->38471 |
| 10058 | /* 38402*/ OPC_RecordChild0, // #0 = $src0 |
| 10059 | /* 38403*/ OPC_CheckType, MVT::f32, |
| 10060 | /* 38405*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10061 | /* 38407*/ OPC_EmitInteger, MVT::i32, 1, |
| 10062 | /* 38410*/ OPC_EmitInteger, MVT::i32, 0, |
| 10063 | /* 38413*/ OPC_EmitInteger, MVT::i32, 0, |
| 10064 | /* 38416*/ OPC_EmitInteger, MVT::i32, 0, |
| 10065 | /* 38419*/ OPC_EmitInteger, MVT::i32, 0, |
| 10066 | /* 38422*/ OPC_EmitInteger, MVT::i32, 0, |
| 10067 | /* 38425*/ OPC_EmitInteger, MVT::i32, 0, |
| 10068 | /* 38428*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10069 | /* 38440*/ OPC_EmitInteger, MVT::i32, 1, |
| 10070 | /* 38443*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10071 | /* 38446*/ OPC_EmitInteger, MVT::i32, 0, |
| 10072 | /* 38449*/ OPC_EmitInteger, MVT::i32, 0, |
| 10073 | /* 38452*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RNDNE), 0, |
| 10074 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10075 | // Src: (frint:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10076 | // Dst: (RNDNE:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10077 | /* 38471*/ /*SwitchOpcode*/ 69, TARGET_VAL(ISD::FFLOOR),// ->38543 |
| 10078 | /* 38474*/ OPC_RecordChild0, // #0 = $src0 |
| 10079 | /* 38475*/ OPC_CheckType, MVT::f32, |
| 10080 | /* 38477*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10081 | /* 38479*/ OPC_EmitInteger, MVT::i32, 1, |
| 10082 | /* 38482*/ OPC_EmitInteger, MVT::i32, 0, |
| 10083 | /* 38485*/ OPC_EmitInteger, MVT::i32, 0, |
| 10084 | /* 38488*/ OPC_EmitInteger, MVT::i32, 0, |
| 10085 | /* 38491*/ OPC_EmitInteger, MVT::i32, 0, |
| 10086 | /* 38494*/ OPC_EmitInteger, MVT::i32, 0, |
| 10087 | /* 38497*/ OPC_EmitInteger, MVT::i32, 0, |
| 10088 | /* 38500*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10089 | /* 38512*/ OPC_EmitInteger, MVT::i32, 1, |
| 10090 | /* 38515*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10091 | /* 38518*/ OPC_EmitInteger, MVT::i32, 0, |
| 10092 | /* 38521*/ OPC_EmitInteger, MVT::i32, 0, |
| 10093 | /* 38524*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FLOOR), 0, |
| 10094 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10095 | // Src: (ffloor:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10096 | // Dst: (FLOOR:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10097 | /* 38543*/ /*SwitchOpcode*/ 90|128,2/*346*/, TARGET_VAL(AMDGPUISD::DOT4),// ->38893 |
| 10098 | /* 38547*/ OPC_RecordChild0, // #0 = $src0_X |
| 10099 | /* 38548*/ OPC_RecordChild1, // #1 = $src1_X |
| 10100 | /* 38549*/ OPC_RecordChild2, // #2 = $src0_Y |
| 10101 | /* 38550*/ OPC_RecordChild3, // #3 = $src1_Y |
| 10102 | /* 38551*/ OPC_RecordChild4, // #4 = $src0_Z |
| 10103 | /* 38552*/ OPC_RecordChild5, // #5 = $src1_Z |
| 10104 | /* 38553*/ OPC_RecordChild6, // #6 = $src0_W |
| 10105 | /* 38554*/ OPC_RecordChild7, // #7 = $src1_W |
| 10106 | /* 38555*/ OPC_CheckType, MVT::f32, |
| 10107 | /* 38557*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10108 | /* 38559*/ OPC_EmitInteger, MVT::i32, 0, |
| 10109 | /* 38562*/ OPC_EmitInteger, MVT::i32, 0, |
| 10110 | /* 38565*/ OPC_EmitInteger, MVT::i32, 1, |
| 10111 | /* 38568*/ OPC_EmitInteger, MVT::i32, 0, |
| 10112 | /* 38571*/ OPC_EmitInteger, MVT::i32, 0, |
| 10113 | /* 38574*/ OPC_EmitInteger, MVT::i32, 0, |
| 10114 | /* 38577*/ OPC_EmitInteger, MVT::i32, 0, |
| 10115 | /* 38580*/ OPC_EmitInteger, MVT::i32, 0, |
| 10116 | /* 38583*/ OPC_EmitInteger, MVT::i32, 0, |
| 10117 | /* 38586*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10118 | /* 38598*/ OPC_EmitInteger, MVT::i32, 0, |
| 10119 | /* 38601*/ OPC_EmitInteger, MVT::i32, 0, |
| 10120 | /* 38604*/ OPC_EmitInteger, MVT::i32, 0, |
| 10121 | /* 38607*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10122 | /* 38619*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10123 | /* 38622*/ OPC_EmitInteger, MVT::i32, 0, |
| 10124 | /* 38625*/ OPC_EmitInteger, MVT::i32, 0, |
| 10125 | /* 38628*/ OPC_EmitInteger, MVT::i32, 1, |
| 10126 | /* 38631*/ OPC_EmitInteger, MVT::i32, 0, |
| 10127 | /* 38634*/ OPC_EmitInteger, MVT::i32, 0, |
| 10128 | /* 38637*/ OPC_EmitInteger, MVT::i32, 0, |
| 10129 | /* 38640*/ OPC_EmitInteger, MVT::i32, 0, |
| 10130 | /* 38643*/ OPC_EmitInteger, MVT::i32, 0, |
| 10131 | /* 38646*/ OPC_EmitInteger, MVT::i32, 0, |
| 10132 | /* 38649*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10133 | /* 38661*/ OPC_EmitInteger, MVT::i32, 0, |
| 10134 | /* 38664*/ OPC_EmitInteger, MVT::i32, 0, |
| 10135 | /* 38667*/ OPC_EmitInteger, MVT::i32, 0, |
| 10136 | /* 38670*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10137 | /* 38682*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10138 | /* 38685*/ OPC_EmitInteger, MVT::i32, 0, |
| 10139 | /* 38688*/ OPC_EmitInteger, MVT::i32, 0, |
| 10140 | /* 38691*/ OPC_EmitInteger, MVT::i32, 1, |
| 10141 | /* 38694*/ OPC_EmitInteger, MVT::i32, 0, |
| 10142 | /* 38697*/ OPC_EmitInteger, MVT::i32, 0, |
| 10143 | /* 38700*/ OPC_EmitInteger, MVT::i32, 0, |
| 10144 | /* 38703*/ OPC_EmitInteger, MVT::i32, 0, |
| 10145 | /* 38706*/ OPC_EmitInteger, MVT::i32, 0, |
| 10146 | /* 38709*/ OPC_EmitInteger, MVT::i32, 0, |
| 10147 | /* 38712*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10148 | /* 38724*/ OPC_EmitInteger, MVT::i32, 0, |
| 10149 | /* 38727*/ OPC_EmitInteger, MVT::i32, 0, |
| 10150 | /* 38730*/ OPC_EmitInteger, MVT::i32, 0, |
| 10151 | /* 38733*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10152 | /* 38745*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10153 | /* 38748*/ OPC_EmitInteger, MVT::i32, 0, |
| 10154 | /* 38751*/ OPC_EmitInteger, MVT::i32, 0, |
| 10155 | /* 38754*/ OPC_EmitInteger, MVT::i32, 1, |
| 10156 | /* 38757*/ OPC_EmitInteger, MVT::i32, 0, |
| 10157 | /* 38760*/ OPC_EmitInteger, MVT::i32, 0, |
| 10158 | /* 38763*/ OPC_EmitInteger, MVT::i32, 0, |
| 10159 | /* 38766*/ OPC_EmitInteger, MVT::i32, 0, |
| 10160 | /* 38769*/ OPC_EmitInteger, MVT::i32, 0, |
| 10161 | /* 38772*/ OPC_EmitInteger, MVT::i32, 0, |
| 10162 | /* 38775*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10163 | /* 38787*/ OPC_EmitInteger, MVT::i32, 0, |
| 10164 | /* 38790*/ OPC_EmitInteger, MVT::i32, 0, |
| 10165 | /* 38793*/ OPC_EmitInteger, MVT::i32, 0, |
| 10166 | /* 38796*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10167 | /* 38808*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10168 | /* 38811*/ OPC_EmitInteger, MVT::i32, 0, |
| 10169 | /* 38814*/ OPC_EmitInteger, MVT::i32, 0, |
| 10170 | /* 38817*/ OPC_MorphNodeTo1, TARGET_VAL(R600::DOT_4), 0, |
| 10171 | MVT::f32, 70/*#Ops*/, 8, 9, 10, 11, 12, 13, 0, 14, 15, 16, 17, 1, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 2, 29, 30, 31, 32, 3, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 4, 44, 45, 46, 47, 5, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 6, 59, 60, 61, 62, 7, 63, 64, 65, 66, 67, 68, 69, |
| 10172 | // Src: (DOT4:{ *:[f32] } R600_TReg32_X:{ *:[f32] }:$src0_X, R600_TReg32_X:{ *:[f32] }:$src1_X, R600_TReg32_Y:{ *:[f32] }:$src0_Y, R600_TReg32_Y:{ *:[f32] }:$src1_Y, R600_TReg32_Z:{ *:[f32] }:$src0_Z, R600_TReg32_Z:{ *:[f32] }:$src1_Z, R600_TReg32_W:{ *:[f32] }:$src0_W, R600_TReg32_W:{ *:[f32] }:$src1_W) - Complexity = 3 |
| 10173 | // Dst: (DOT_4:{ *:[f32] } R600_TReg32_X:{ *:[f32] }:$src0_X, R600_TReg32_X:{ *:[f32] }:$src1_X, R600_TReg32_Y:{ *:[f32] }:$src0_Y, R600_TReg32_Y:{ *:[f32] }:$src1_Y, R600_TReg32_Z:{ *:[f32] }:$src0_Z, R600_TReg32_Z:{ *:[f32] }:$src1_Z, R600_TReg32_W:{ *:[f32] }:$src0_W, R600_TReg32_W:{ *:[f32] }:$src1_W) |
| 10174 | /* 38893*/ /*SwitchOpcode*/ 77|128,1/*205*/, TARGET_VAL(ISD::FMAD),// ->39102 |
| 10175 | /* 38897*/ OPC_RecordChild0, // #0 = $src0 |
| 10176 | /* 38898*/ OPC_RecordChild1, // #1 = $src1 |
| 10177 | /* 38899*/ OPC_RecordChild2, // #2 = $src2 |
| 10178 | /* 38900*/ OPC_CheckType, MVT::f32, |
| 10179 | /* 38902*/ OPC_Scope, 98, /*->39002*/ // 2 children in Scope |
| 10180 | /* 38904*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10181 | /* 38906*/ OPC_EmitInteger, MVT::i32, 0, |
| 10182 | /* 38909*/ OPC_EmitInteger, MVT::i32, 0, |
| 10183 | /* 38912*/ OPC_EmitInteger, MVT::i32, 0, |
| 10184 | /* 38915*/ OPC_EmitInteger, MVT::i32, 0, |
| 10185 | /* 38918*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10186 | /* 38930*/ OPC_EmitInteger, MVT::i32, 0, |
| 10187 | /* 38933*/ OPC_EmitInteger, MVT::i32, 0, |
| 10188 | /* 38936*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10189 | /* 38948*/ OPC_EmitInteger, MVT::i32, 0, |
| 10190 | /* 38951*/ OPC_EmitInteger, MVT::i32, 0, |
| 10191 | /* 38954*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10192 | /* 38966*/ OPC_EmitInteger, MVT::i32, 1, |
| 10193 | /* 38969*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10194 | /* 38972*/ OPC_EmitInteger, MVT::i32, 0, |
| 10195 | /* 38975*/ OPC_EmitInteger, MVT::i32, 0, |
| 10196 | /* 38978*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_IEEE_r600), 0, |
| 10197 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 10198 | // Src: (fmad:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) - Complexity = 3 |
| 10199 | // Dst: (MULADD_IEEE_r600:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 10200 | /* 39002*/ /*Scope*/ 98, /*->39101*/ |
| 10201 | /* 39003*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10202 | /* 39005*/ OPC_EmitInteger, MVT::i32, 0, |
| 10203 | /* 39008*/ OPC_EmitInteger, MVT::i32, 0, |
| 10204 | /* 39011*/ OPC_EmitInteger, MVT::i32, 0, |
| 10205 | /* 39014*/ OPC_EmitInteger, MVT::i32, 0, |
| 10206 | /* 39017*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10207 | /* 39029*/ OPC_EmitInteger, MVT::i32, 0, |
| 10208 | /* 39032*/ OPC_EmitInteger, MVT::i32, 0, |
| 10209 | /* 39035*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10210 | /* 39047*/ OPC_EmitInteger, MVT::i32, 0, |
| 10211 | /* 39050*/ OPC_EmitInteger, MVT::i32, 0, |
| 10212 | /* 39053*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10213 | /* 39065*/ OPC_EmitInteger, MVT::i32, 1, |
| 10214 | /* 39068*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10215 | /* 39071*/ OPC_EmitInteger, MVT::i32, 0, |
| 10216 | /* 39074*/ OPC_EmitInteger, MVT::i32, 0, |
| 10217 | /* 39077*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_IEEE_eg), 0, |
| 10218 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 10219 | // Src: (fmad:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) - Complexity = 3 |
| 10220 | // Dst: (MULADD_IEEE_eg:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 10221 | /* 39101*/ 0, /*End of Scope*/ |
| 10222 | /* 39102*/ /*SwitchOpcode*/ 77|128,1/*205*/, TARGET_VAL(AMDGPUISD::FMAD_FTZ),// ->39311 |
| 10223 | /* 39106*/ OPC_RecordChild0, // #0 = $src0 |
| 10224 | /* 39107*/ OPC_RecordChild1, // #1 = $src1 |
| 10225 | /* 39108*/ OPC_RecordChild2, // #2 = $src2 |
| 10226 | /* 39109*/ OPC_CheckType, MVT::f32, |
| 10227 | /* 39111*/ OPC_Scope, 98, /*->39211*/ // 2 children in Scope |
| 10228 | /* 39113*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10229 | /* 39115*/ OPC_EmitInteger, MVT::i32, 0, |
| 10230 | /* 39118*/ OPC_EmitInteger, MVT::i32, 0, |
| 10231 | /* 39121*/ OPC_EmitInteger, MVT::i32, 0, |
| 10232 | /* 39124*/ OPC_EmitInteger, MVT::i32, 0, |
| 10233 | /* 39127*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10234 | /* 39139*/ OPC_EmitInteger, MVT::i32, 0, |
| 10235 | /* 39142*/ OPC_EmitInteger, MVT::i32, 0, |
| 10236 | /* 39145*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10237 | /* 39157*/ OPC_EmitInteger, MVT::i32, 0, |
| 10238 | /* 39160*/ OPC_EmitInteger, MVT::i32, 0, |
| 10239 | /* 39163*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10240 | /* 39175*/ OPC_EmitInteger, MVT::i32, 1, |
| 10241 | /* 39178*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10242 | /* 39181*/ OPC_EmitInteger, MVT::i32, 0, |
| 10243 | /* 39184*/ OPC_EmitInteger, MVT::i32, 0, |
| 10244 | /* 39187*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_IEEE_r600), 0, |
| 10245 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 10246 | // Src: (AMDGPUfmad_ftz_impl:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) - Complexity = 3 |
| 10247 | // Dst: (MULADD_IEEE_r600:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 10248 | /* 39211*/ /*Scope*/ 98, /*->39310*/ |
| 10249 | /* 39212*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10250 | /* 39214*/ OPC_EmitInteger, MVT::i32, 0, |
| 10251 | /* 39217*/ OPC_EmitInteger, MVT::i32, 0, |
| 10252 | /* 39220*/ OPC_EmitInteger, MVT::i32, 0, |
| 10253 | /* 39223*/ OPC_EmitInteger, MVT::i32, 0, |
| 10254 | /* 39226*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10255 | /* 39238*/ OPC_EmitInteger, MVT::i32, 0, |
| 10256 | /* 39241*/ OPC_EmitInteger, MVT::i32, 0, |
| 10257 | /* 39244*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10258 | /* 39256*/ OPC_EmitInteger, MVT::i32, 0, |
| 10259 | /* 39259*/ OPC_EmitInteger, MVT::i32, 0, |
| 10260 | /* 39262*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10261 | /* 39274*/ OPC_EmitInteger, MVT::i32, 1, |
| 10262 | /* 39277*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10263 | /* 39280*/ OPC_EmitInteger, MVT::i32, 0, |
| 10264 | /* 39283*/ OPC_EmitInteger, MVT::i32, 0, |
| 10265 | /* 39286*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MULADD_IEEE_eg), 0, |
| 10266 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 10267 | // Src: (AMDGPUfmad_ftz_impl:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) - Complexity = 3 |
| 10268 | // Dst: (MULADD_IEEE_eg:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 10269 | /* 39310*/ 0, /*End of Scope*/ |
| 10270 | /* 39311*/ /*SwitchOpcode*/ 78|128,1/*206*/, TARGET_VAL(ISD::FEXP2),// ->39521 |
| 10271 | /* 39315*/ OPC_RecordChild0, // #0 = $src0 |
| 10272 | /* 39316*/ OPC_CheckType, MVT::f32, |
| 10273 | /* 39318*/ OPC_Scope, 66, /*->39386*/ // 3 children in Scope |
| 10274 | /* 39320*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10275 | /* 39322*/ OPC_EmitInteger, MVT::i32, 1, |
| 10276 | /* 39325*/ OPC_EmitInteger, MVT::i32, 0, |
| 10277 | /* 39328*/ OPC_EmitInteger, MVT::i32, 0, |
| 10278 | /* 39331*/ OPC_EmitInteger, MVT::i32, 0, |
| 10279 | /* 39334*/ OPC_EmitInteger, MVT::i32, 0, |
| 10280 | /* 39337*/ OPC_EmitInteger, MVT::i32, 0, |
| 10281 | /* 39340*/ OPC_EmitInteger, MVT::i32, 0, |
| 10282 | /* 39343*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10283 | /* 39355*/ OPC_EmitInteger, MVT::i32, 1, |
| 10284 | /* 39358*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10285 | /* 39361*/ OPC_EmitInteger, MVT::i32, 0, |
| 10286 | /* 39364*/ OPC_EmitInteger, MVT::i32, 0, |
| 10287 | /* 39367*/ OPC_MorphNodeTo1, TARGET_VAL(R600::EXP_IEEE_r600), 0, |
| 10288 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10289 | // Src: (fexp2:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10290 | // Dst: (EXP_IEEE_r600:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10291 | /* 39386*/ /*Scope*/ 66, /*->39453*/ |
| 10292 | /* 39387*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 10293 | /* 39389*/ OPC_EmitInteger, MVT::i32, 1, |
| 10294 | /* 39392*/ OPC_EmitInteger, MVT::i32, 0, |
| 10295 | /* 39395*/ OPC_EmitInteger, MVT::i32, 0, |
| 10296 | /* 39398*/ OPC_EmitInteger, MVT::i32, 0, |
| 10297 | /* 39401*/ OPC_EmitInteger, MVT::i32, 0, |
| 10298 | /* 39404*/ OPC_EmitInteger, MVT::i32, 0, |
| 10299 | /* 39407*/ OPC_EmitInteger, MVT::i32, 0, |
| 10300 | /* 39410*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10301 | /* 39422*/ OPC_EmitInteger, MVT::i32, 1, |
| 10302 | /* 39425*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10303 | /* 39428*/ OPC_EmitInteger, MVT::i32, 0, |
| 10304 | /* 39431*/ OPC_EmitInteger, MVT::i32, 0, |
| 10305 | /* 39434*/ OPC_MorphNodeTo1, TARGET_VAL(R600::EXP_IEEE_eg), 0, |
| 10306 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10307 | // Src: (fexp2:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10308 | // Dst: (EXP_IEEE_eg:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10309 | /* 39453*/ /*Scope*/ 66, /*->39520*/ |
| 10310 | /* 39454*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 10311 | /* 39456*/ OPC_EmitInteger, MVT::i32, 1, |
| 10312 | /* 39459*/ OPC_EmitInteger, MVT::i32, 0, |
| 10313 | /* 39462*/ OPC_EmitInteger, MVT::i32, 0, |
| 10314 | /* 39465*/ OPC_EmitInteger, MVT::i32, 0, |
| 10315 | /* 39468*/ OPC_EmitInteger, MVT::i32, 0, |
| 10316 | /* 39471*/ OPC_EmitInteger, MVT::i32, 0, |
| 10317 | /* 39474*/ OPC_EmitInteger, MVT::i32, 0, |
| 10318 | /* 39477*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10319 | /* 39489*/ OPC_EmitInteger, MVT::i32, 1, |
| 10320 | /* 39492*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10321 | /* 39495*/ OPC_EmitInteger, MVT::i32, 0, |
| 10322 | /* 39498*/ OPC_EmitInteger, MVT::i32, 0, |
| 10323 | /* 39501*/ OPC_MorphNodeTo1, TARGET_VAL(R600::EXP_IEEE_cm), 0, |
| 10324 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10325 | // Src: (fexp2:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10326 | // Dst: (EXP_IEEE_cm:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10327 | /* 39520*/ 0, /*End of Scope*/ |
| 10328 | /* 39521*/ /*SwitchOpcode*/ 78|128,1/*206*/, TARGET_VAL(ISD::FLOG2),// ->39731 |
| 10329 | /* 39525*/ OPC_RecordChild0, // #0 = $src0 |
| 10330 | /* 39526*/ OPC_CheckType, MVT::f32, |
| 10331 | /* 39528*/ OPC_Scope, 66, /*->39596*/ // 3 children in Scope |
| 10332 | /* 39530*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10333 | /* 39532*/ OPC_EmitInteger, MVT::i32, 1, |
| 10334 | /* 39535*/ OPC_EmitInteger, MVT::i32, 0, |
| 10335 | /* 39538*/ OPC_EmitInteger, MVT::i32, 0, |
| 10336 | /* 39541*/ OPC_EmitInteger, MVT::i32, 0, |
| 10337 | /* 39544*/ OPC_EmitInteger, MVT::i32, 0, |
| 10338 | /* 39547*/ OPC_EmitInteger, MVT::i32, 0, |
| 10339 | /* 39550*/ OPC_EmitInteger, MVT::i32, 0, |
| 10340 | /* 39553*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10341 | /* 39565*/ OPC_EmitInteger, MVT::i32, 1, |
| 10342 | /* 39568*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10343 | /* 39571*/ OPC_EmitInteger, MVT::i32, 0, |
| 10344 | /* 39574*/ OPC_EmitInteger, MVT::i32, 0, |
| 10345 | /* 39577*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LOG_IEEE_r600), 0, |
| 10346 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10347 | // Src: (flog2:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10348 | // Dst: (LOG_IEEE_r600:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10349 | /* 39596*/ /*Scope*/ 66, /*->39663*/ |
| 10350 | /* 39597*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 10351 | /* 39599*/ OPC_EmitInteger, MVT::i32, 1, |
| 10352 | /* 39602*/ OPC_EmitInteger, MVT::i32, 0, |
| 10353 | /* 39605*/ OPC_EmitInteger, MVT::i32, 0, |
| 10354 | /* 39608*/ OPC_EmitInteger, MVT::i32, 0, |
| 10355 | /* 39611*/ OPC_EmitInteger, MVT::i32, 0, |
| 10356 | /* 39614*/ OPC_EmitInteger, MVT::i32, 0, |
| 10357 | /* 39617*/ OPC_EmitInteger, MVT::i32, 0, |
| 10358 | /* 39620*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10359 | /* 39632*/ OPC_EmitInteger, MVT::i32, 1, |
| 10360 | /* 39635*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10361 | /* 39638*/ OPC_EmitInteger, MVT::i32, 0, |
| 10362 | /* 39641*/ OPC_EmitInteger, MVT::i32, 0, |
| 10363 | /* 39644*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LOG_IEEE_eg), 0, |
| 10364 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10365 | // Src: (flog2:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10366 | // Dst: (LOG_IEEE_eg:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10367 | /* 39663*/ /*Scope*/ 66, /*->39730*/ |
| 10368 | /* 39664*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 10369 | /* 39666*/ OPC_EmitInteger, MVT::i32, 1, |
| 10370 | /* 39669*/ OPC_EmitInteger, MVT::i32, 0, |
| 10371 | /* 39672*/ OPC_EmitInteger, MVT::i32, 0, |
| 10372 | /* 39675*/ OPC_EmitInteger, MVT::i32, 0, |
| 10373 | /* 39678*/ OPC_EmitInteger, MVT::i32, 0, |
| 10374 | /* 39681*/ OPC_EmitInteger, MVT::i32, 0, |
| 10375 | /* 39684*/ OPC_EmitInteger, MVT::i32, 0, |
| 10376 | /* 39687*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10377 | /* 39699*/ OPC_EmitInteger, MVT::i32, 1, |
| 10378 | /* 39702*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10379 | /* 39705*/ OPC_EmitInteger, MVT::i32, 0, |
| 10380 | /* 39708*/ OPC_EmitInteger, MVT::i32, 0, |
| 10381 | /* 39711*/ OPC_MorphNodeTo1, TARGET_VAL(R600::LOG_IEEE_cm), 0, |
| 10382 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10383 | // Src: (flog2:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10384 | // Dst: (LOG_IEEE_cm:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10385 | /* 39730*/ 0, /*End of Scope*/ |
| 10386 | /* 39731*/ /*SwitchOpcode*/ 78|128,1/*206*/, TARGET_VAL(AMDGPUISD::RSQ_CLAMP),// ->39941 |
| 10387 | /* 39735*/ OPC_RecordChild0, // #0 = $src0 |
| 10388 | /* 39736*/ OPC_CheckType, MVT::f32, |
| 10389 | /* 39738*/ OPC_Scope, 66, /*->39806*/ // 3 children in Scope |
| 10390 | /* 39740*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10391 | /* 39742*/ OPC_EmitInteger, MVT::i32, 1, |
| 10392 | /* 39745*/ OPC_EmitInteger, MVT::i32, 0, |
| 10393 | /* 39748*/ OPC_EmitInteger, MVT::i32, 0, |
| 10394 | /* 39751*/ OPC_EmitInteger, MVT::i32, 0, |
| 10395 | /* 39754*/ OPC_EmitInteger, MVT::i32, 0, |
| 10396 | /* 39757*/ OPC_EmitInteger, MVT::i32, 0, |
| 10397 | /* 39760*/ OPC_EmitInteger, MVT::i32, 0, |
| 10398 | /* 39763*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10399 | /* 39775*/ OPC_EmitInteger, MVT::i32, 1, |
| 10400 | /* 39778*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10401 | /* 39781*/ OPC_EmitInteger, MVT::i32, 0, |
| 10402 | /* 39784*/ OPC_EmitInteger, MVT::i32, 0, |
| 10403 | /* 39787*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_CLAMPED_r600), 0, |
| 10404 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10405 | // Src: (AMDGPUrsq_clamp_impl:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10406 | // Dst: (RECIPSQRT_CLAMPED_r600:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10407 | /* 39806*/ /*Scope*/ 66, /*->39873*/ |
| 10408 | /* 39807*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 10409 | /* 39809*/ OPC_EmitInteger, MVT::i32, 1, |
| 10410 | /* 39812*/ OPC_EmitInteger, MVT::i32, 0, |
| 10411 | /* 39815*/ OPC_EmitInteger, MVT::i32, 0, |
| 10412 | /* 39818*/ OPC_EmitInteger, MVT::i32, 0, |
| 10413 | /* 39821*/ OPC_EmitInteger, MVT::i32, 0, |
| 10414 | /* 39824*/ OPC_EmitInteger, MVT::i32, 0, |
| 10415 | /* 39827*/ OPC_EmitInteger, MVT::i32, 0, |
| 10416 | /* 39830*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10417 | /* 39842*/ OPC_EmitInteger, MVT::i32, 1, |
| 10418 | /* 39845*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10419 | /* 39848*/ OPC_EmitInteger, MVT::i32, 0, |
| 10420 | /* 39851*/ OPC_EmitInteger, MVT::i32, 0, |
| 10421 | /* 39854*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_CLAMPED_eg), 0, |
| 10422 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10423 | // Src: (AMDGPUrsq_clamp_impl:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10424 | // Dst: (RECIPSQRT_CLAMPED_eg:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10425 | /* 39873*/ /*Scope*/ 66, /*->39940*/ |
| 10426 | /* 39874*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 10427 | /* 39876*/ OPC_EmitInteger, MVT::i32, 1, |
| 10428 | /* 39879*/ OPC_EmitInteger, MVT::i32, 0, |
| 10429 | /* 39882*/ OPC_EmitInteger, MVT::i32, 0, |
| 10430 | /* 39885*/ OPC_EmitInteger, MVT::i32, 0, |
| 10431 | /* 39888*/ OPC_EmitInteger, MVT::i32, 0, |
| 10432 | /* 39891*/ OPC_EmitInteger, MVT::i32, 0, |
| 10433 | /* 39894*/ OPC_EmitInteger, MVT::i32, 0, |
| 10434 | /* 39897*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10435 | /* 39909*/ OPC_EmitInteger, MVT::i32, 1, |
| 10436 | /* 39912*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10437 | /* 39915*/ OPC_EmitInteger, MVT::i32, 0, |
| 10438 | /* 39918*/ OPC_EmitInteger, MVT::i32, 0, |
| 10439 | /* 39921*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_CLAMPED_cm), 0, |
| 10440 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10441 | // Src: (AMDGPUrsq_clamp_impl:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10442 | // Dst: (RECIPSQRT_CLAMPED_cm:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10443 | /* 39940*/ 0, /*End of Scope*/ |
| 10444 | /* 39941*/ /*SwitchOpcode*/ 78|128,1/*206*/, TARGET_VAL(AMDGPUISD::RSQ),// ->40151 |
| 10445 | /* 39945*/ OPC_RecordChild0, // #0 = $src0 |
| 10446 | /* 39946*/ OPC_CheckType, MVT::f32, |
| 10447 | /* 39948*/ OPC_Scope, 66, /*->40016*/ // 3 children in Scope |
| 10448 | /* 39950*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10449 | /* 39952*/ OPC_EmitInteger, MVT::i32, 1, |
| 10450 | /* 39955*/ OPC_EmitInteger, MVT::i32, 0, |
| 10451 | /* 39958*/ OPC_EmitInteger, MVT::i32, 0, |
| 10452 | /* 39961*/ OPC_EmitInteger, MVT::i32, 0, |
| 10453 | /* 39964*/ OPC_EmitInteger, MVT::i32, 0, |
| 10454 | /* 39967*/ OPC_EmitInteger, MVT::i32, 0, |
| 10455 | /* 39970*/ OPC_EmitInteger, MVT::i32, 0, |
| 10456 | /* 39973*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10457 | /* 39985*/ OPC_EmitInteger, MVT::i32, 1, |
| 10458 | /* 39988*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10459 | /* 39991*/ OPC_EmitInteger, MVT::i32, 0, |
| 10460 | /* 39994*/ OPC_EmitInteger, MVT::i32, 0, |
| 10461 | /* 39997*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_r600), 0, |
| 10462 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10463 | // Src: (AMDGPUrsq_impl:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10464 | // Dst: (RECIPSQRT_IEEE_r600:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10465 | /* 40016*/ /*Scope*/ 66, /*->40083*/ |
| 10466 | /* 40017*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 10467 | /* 40019*/ OPC_EmitInteger, MVT::i32, 1, |
| 10468 | /* 40022*/ OPC_EmitInteger, MVT::i32, 0, |
| 10469 | /* 40025*/ OPC_EmitInteger, MVT::i32, 0, |
| 10470 | /* 40028*/ OPC_EmitInteger, MVT::i32, 0, |
| 10471 | /* 40031*/ OPC_EmitInteger, MVT::i32, 0, |
| 10472 | /* 40034*/ OPC_EmitInteger, MVT::i32, 0, |
| 10473 | /* 40037*/ OPC_EmitInteger, MVT::i32, 0, |
| 10474 | /* 40040*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10475 | /* 40052*/ OPC_EmitInteger, MVT::i32, 1, |
| 10476 | /* 40055*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10477 | /* 40058*/ OPC_EmitInteger, MVT::i32, 0, |
| 10478 | /* 40061*/ OPC_EmitInteger, MVT::i32, 0, |
| 10479 | /* 40064*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_eg), 0, |
| 10480 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10481 | // Src: (AMDGPUrsq_impl:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10482 | // Dst: (RECIPSQRT_IEEE_eg:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10483 | /* 40083*/ /*Scope*/ 66, /*->40150*/ |
| 10484 | /* 40084*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 10485 | /* 40086*/ OPC_EmitInteger, MVT::i32, 1, |
| 10486 | /* 40089*/ OPC_EmitInteger, MVT::i32, 0, |
| 10487 | /* 40092*/ OPC_EmitInteger, MVT::i32, 0, |
| 10488 | /* 40095*/ OPC_EmitInteger, MVT::i32, 0, |
| 10489 | /* 40098*/ OPC_EmitInteger, MVT::i32, 0, |
| 10490 | /* 40101*/ OPC_EmitInteger, MVT::i32, 0, |
| 10491 | /* 40104*/ OPC_EmitInteger, MVT::i32, 0, |
| 10492 | /* 40107*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10493 | /* 40119*/ OPC_EmitInteger, MVT::i32, 1, |
| 10494 | /* 40122*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10495 | /* 40125*/ OPC_EmitInteger, MVT::i32, 0, |
| 10496 | /* 40128*/ OPC_EmitInteger, MVT::i32, 0, |
| 10497 | /* 40131*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIPSQRT_IEEE_cm), 0, |
| 10498 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10499 | // Src: (AMDGPUrsq_impl:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10500 | // Dst: (RECIPSQRT_IEEE_cm:{ *:[f32] } R600_Reg32:{ *:[f32] }:$src0) |
| 10501 | /* 40150*/ 0, /*End of Scope*/ |
| 10502 | /* 40151*/ /*SwitchOpcode*/ 13|128,1/*141*/, TARGET_VAL(ISD::SINT_TO_FP),// ->40296 |
| 10503 | /* 40155*/ OPC_RecordChild0, // #0 = $src0 |
| 10504 | /* 40156*/ OPC_CheckChild0Type, MVT::i32, |
| 10505 | /* 40158*/ OPC_CheckType, MVT::f32, |
| 10506 | /* 40160*/ OPC_Scope, 66, /*->40228*/ // 2 children in Scope |
| 10507 | /* 40162*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10508 | /* 40164*/ OPC_EmitInteger, MVT::i32, 1, |
| 10509 | /* 40167*/ OPC_EmitInteger, MVT::i32, 0, |
| 10510 | /* 40170*/ OPC_EmitInteger, MVT::i32, 0, |
| 10511 | /* 40173*/ OPC_EmitInteger, MVT::i32, 0, |
| 10512 | /* 40176*/ OPC_EmitInteger, MVT::i32, 0, |
| 10513 | /* 40179*/ OPC_EmitInteger, MVT::i32, 0, |
| 10514 | /* 40182*/ OPC_EmitInteger, MVT::i32, 0, |
| 10515 | /* 40185*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10516 | /* 40197*/ OPC_EmitInteger, MVT::i32, 1, |
| 10517 | /* 40200*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10518 | /* 40203*/ OPC_EmitInteger, MVT::i32, 0, |
| 10519 | /* 40206*/ OPC_EmitInteger, MVT::i32, 0, |
| 10520 | /* 40209*/ OPC_MorphNodeTo1, TARGET_VAL(R600::INT_TO_FLT_r600), 0, |
| 10521 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10522 | // Src: (sint_to_fp:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 10523 | // Dst: (INT_TO_FLT_r600:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) |
| 10524 | /* 40228*/ /*Scope*/ 66, /*->40295*/ |
| 10525 | /* 40229*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10526 | /* 40231*/ OPC_EmitInteger, MVT::i32, 1, |
| 10527 | /* 40234*/ OPC_EmitInteger, MVT::i32, 0, |
| 10528 | /* 40237*/ OPC_EmitInteger, MVT::i32, 0, |
| 10529 | /* 40240*/ OPC_EmitInteger, MVT::i32, 0, |
| 10530 | /* 40243*/ OPC_EmitInteger, MVT::i32, 0, |
| 10531 | /* 40246*/ OPC_EmitInteger, MVT::i32, 0, |
| 10532 | /* 40249*/ OPC_EmitInteger, MVT::i32, 0, |
| 10533 | /* 40252*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10534 | /* 40264*/ OPC_EmitInteger, MVT::i32, 1, |
| 10535 | /* 40267*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10536 | /* 40270*/ OPC_EmitInteger, MVT::i32, 0, |
| 10537 | /* 40273*/ OPC_EmitInteger, MVT::i32, 0, |
| 10538 | /* 40276*/ OPC_MorphNodeTo1, TARGET_VAL(R600::INT_TO_FLT_eg), 0, |
| 10539 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10540 | // Src: (sint_to_fp:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 10541 | // Dst: (INT_TO_FLT_eg:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) |
| 10542 | /* 40295*/ 0, /*End of Scope*/ |
| 10543 | /* 40296*/ /*SwitchOpcode*/ 13|128,1/*141*/, TARGET_VAL(ISD::UINT_TO_FP),// ->40441 |
| 10544 | /* 40300*/ OPC_RecordChild0, // #0 = $src0 |
| 10545 | /* 40301*/ OPC_CheckChild0Type, MVT::i32, |
| 10546 | /* 40303*/ OPC_CheckType, MVT::f32, |
| 10547 | /* 40305*/ OPC_Scope, 66, /*->40373*/ // 2 children in Scope |
| 10548 | /* 40307*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10549 | /* 40309*/ OPC_EmitInteger, MVT::i32, 1, |
| 10550 | /* 40312*/ OPC_EmitInteger, MVT::i32, 0, |
| 10551 | /* 40315*/ OPC_EmitInteger, MVT::i32, 0, |
| 10552 | /* 40318*/ OPC_EmitInteger, MVT::i32, 0, |
| 10553 | /* 40321*/ OPC_EmitInteger, MVT::i32, 0, |
| 10554 | /* 40324*/ OPC_EmitInteger, MVT::i32, 0, |
| 10555 | /* 40327*/ OPC_EmitInteger, MVT::i32, 0, |
| 10556 | /* 40330*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10557 | /* 40342*/ OPC_EmitInteger, MVT::i32, 1, |
| 10558 | /* 40345*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10559 | /* 40348*/ OPC_EmitInteger, MVT::i32, 0, |
| 10560 | /* 40351*/ OPC_EmitInteger, MVT::i32, 0, |
| 10561 | /* 40354*/ OPC_MorphNodeTo1, TARGET_VAL(R600::UINT_TO_FLT_r600), 0, |
| 10562 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10563 | // Src: (uint_to_fp:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 10564 | // Dst: (UINT_TO_FLT_r600:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) |
| 10565 | /* 40373*/ /*Scope*/ 66, /*->40440*/ |
| 10566 | /* 40374*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10567 | /* 40376*/ OPC_EmitInteger, MVT::i32, 1, |
| 10568 | /* 40379*/ OPC_EmitInteger, MVT::i32, 0, |
| 10569 | /* 40382*/ OPC_EmitInteger, MVT::i32, 0, |
| 10570 | /* 40385*/ OPC_EmitInteger, MVT::i32, 0, |
| 10571 | /* 40388*/ OPC_EmitInteger, MVT::i32, 0, |
| 10572 | /* 40391*/ OPC_EmitInteger, MVT::i32, 0, |
| 10573 | /* 40394*/ OPC_EmitInteger, MVT::i32, 0, |
| 10574 | /* 40397*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10575 | /* 40409*/ OPC_EmitInteger, MVT::i32, 1, |
| 10576 | /* 40412*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10577 | /* 40415*/ OPC_EmitInteger, MVT::i32, 0, |
| 10578 | /* 40418*/ OPC_EmitInteger, MVT::i32, 0, |
| 10579 | /* 40421*/ OPC_MorphNodeTo1, TARGET_VAL(R600::UINT_TO_FLT_eg), 0, |
| 10580 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10581 | // Src: (uint_to_fp:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 10582 | // Dst: (UINT_TO_FLT_eg:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) |
| 10583 | /* 40440*/ 0, /*End of Scope*/ |
| 10584 | /* 40441*/ /*SwitchOpcode*/ 19|128,2/*275*/, TARGET_VAL(AMDGPUISD::SIN_HW),// ->40720 |
| 10585 | /* 40445*/ OPC_RecordChild0, // #0 = $src0 |
| 10586 | /* 40446*/ OPC_CheckChild0Type, MVT::f32, |
| 10587 | /* 40448*/ OPC_CheckType, MVT::f32, |
| 10588 | /* 40450*/ OPC_Scope, 66, /*->40518*/ // 4 children in Scope |
| 10589 | /* 40452*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10590 | /* 40454*/ OPC_EmitInteger, MVT::i32, 1, |
| 10591 | /* 40457*/ OPC_EmitInteger, MVT::i32, 0, |
| 10592 | /* 40460*/ OPC_EmitInteger, MVT::i32, 0, |
| 10593 | /* 40463*/ OPC_EmitInteger, MVT::i32, 0, |
| 10594 | /* 40466*/ OPC_EmitInteger, MVT::i32, 0, |
| 10595 | /* 40469*/ OPC_EmitInteger, MVT::i32, 0, |
| 10596 | /* 40472*/ OPC_EmitInteger, MVT::i32, 0, |
| 10597 | /* 40475*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10598 | /* 40487*/ OPC_EmitInteger, MVT::i32, 1, |
| 10599 | /* 40490*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10600 | /* 40493*/ OPC_EmitInteger, MVT::i32, 0, |
| 10601 | /* 40496*/ OPC_EmitInteger, MVT::i32, 0, |
| 10602 | /* 40499*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SIN_r600), 0, |
| 10603 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10604 | // Src: (SIN_HW:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10605 | // Dst: (SIN_r600:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 10606 | /* 40518*/ /*Scope*/ 66, /*->40585*/ |
| 10607 | /* 40519*/ OPC_CheckPatternPredicate, 5, // (Subtarget->getGeneration() == AMDGPUSubtarget::R700) |
| 10608 | /* 40521*/ OPC_EmitInteger, MVT::i32, 1, |
| 10609 | /* 40524*/ OPC_EmitInteger, MVT::i32, 0, |
| 10610 | /* 40527*/ OPC_EmitInteger, MVT::i32, 0, |
| 10611 | /* 40530*/ OPC_EmitInteger, MVT::i32, 0, |
| 10612 | /* 40533*/ OPC_EmitInteger, MVT::i32, 0, |
| 10613 | /* 40536*/ OPC_EmitInteger, MVT::i32, 0, |
| 10614 | /* 40539*/ OPC_EmitInteger, MVT::i32, 0, |
| 10615 | /* 40542*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10616 | /* 40554*/ OPC_EmitInteger, MVT::i32, 1, |
| 10617 | /* 40557*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10618 | /* 40560*/ OPC_EmitInteger, MVT::i32, 0, |
| 10619 | /* 40563*/ OPC_EmitInteger, MVT::i32, 0, |
| 10620 | /* 40566*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SIN_r700), 0, |
| 10621 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10622 | // Src: (SIN_HW:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10623 | // Dst: (SIN_r700:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 10624 | /* 40585*/ /*Scope*/ 66, /*->40652*/ |
| 10625 | /* 40586*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 10626 | /* 40588*/ OPC_EmitInteger, MVT::i32, 1, |
| 10627 | /* 40591*/ OPC_EmitInteger, MVT::i32, 0, |
| 10628 | /* 40594*/ OPC_EmitInteger, MVT::i32, 0, |
| 10629 | /* 40597*/ OPC_EmitInteger, MVT::i32, 0, |
| 10630 | /* 40600*/ OPC_EmitInteger, MVT::i32, 0, |
| 10631 | /* 40603*/ OPC_EmitInteger, MVT::i32, 0, |
| 10632 | /* 40606*/ OPC_EmitInteger, MVT::i32, 0, |
| 10633 | /* 40609*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10634 | /* 40621*/ OPC_EmitInteger, MVT::i32, 1, |
| 10635 | /* 40624*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10636 | /* 40627*/ OPC_EmitInteger, MVT::i32, 0, |
| 10637 | /* 40630*/ OPC_EmitInteger, MVT::i32, 0, |
| 10638 | /* 40633*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SIN_eg), 0, |
| 10639 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10640 | // Src: (SIN_HW:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10641 | // Dst: (SIN_eg:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 10642 | /* 40652*/ /*Scope*/ 66, /*->40719*/ |
| 10643 | /* 40653*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 10644 | /* 40655*/ OPC_EmitInteger, MVT::i32, 1, |
| 10645 | /* 40658*/ OPC_EmitInteger, MVT::i32, 0, |
| 10646 | /* 40661*/ OPC_EmitInteger, MVT::i32, 0, |
| 10647 | /* 40664*/ OPC_EmitInteger, MVT::i32, 0, |
| 10648 | /* 40667*/ OPC_EmitInteger, MVT::i32, 0, |
| 10649 | /* 40670*/ OPC_EmitInteger, MVT::i32, 0, |
| 10650 | /* 40673*/ OPC_EmitInteger, MVT::i32, 0, |
| 10651 | /* 40676*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10652 | /* 40688*/ OPC_EmitInteger, MVT::i32, 1, |
| 10653 | /* 40691*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10654 | /* 40694*/ OPC_EmitInteger, MVT::i32, 0, |
| 10655 | /* 40697*/ OPC_EmitInteger, MVT::i32, 0, |
| 10656 | /* 40700*/ OPC_MorphNodeTo1, TARGET_VAL(R600::SIN_cm), 0, |
| 10657 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10658 | // Src: (SIN_HW:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10659 | // Dst: (SIN_cm:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 10660 | /* 40719*/ 0, /*End of Scope*/ |
| 10661 | /* 40720*/ /*SwitchOpcode*/ 19|128,2/*275*/, TARGET_VAL(AMDGPUISD::COS_HW),// ->40999 |
| 10662 | /* 40724*/ OPC_RecordChild0, // #0 = $src0 |
| 10663 | /* 40725*/ OPC_CheckChild0Type, MVT::f32, |
| 10664 | /* 40727*/ OPC_CheckType, MVT::f32, |
| 10665 | /* 40729*/ OPC_Scope, 66, /*->40797*/ // 4 children in Scope |
| 10666 | /* 40731*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10667 | /* 40733*/ OPC_EmitInteger, MVT::i32, 1, |
| 10668 | /* 40736*/ OPC_EmitInteger, MVT::i32, 0, |
| 10669 | /* 40739*/ OPC_EmitInteger, MVT::i32, 0, |
| 10670 | /* 40742*/ OPC_EmitInteger, MVT::i32, 0, |
| 10671 | /* 40745*/ OPC_EmitInteger, MVT::i32, 0, |
| 10672 | /* 40748*/ OPC_EmitInteger, MVT::i32, 0, |
| 10673 | /* 40751*/ OPC_EmitInteger, MVT::i32, 0, |
| 10674 | /* 40754*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10675 | /* 40766*/ OPC_EmitInteger, MVT::i32, 1, |
| 10676 | /* 40769*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10677 | /* 40772*/ OPC_EmitInteger, MVT::i32, 0, |
| 10678 | /* 40775*/ OPC_EmitInteger, MVT::i32, 0, |
| 10679 | /* 40778*/ OPC_MorphNodeTo1, TARGET_VAL(R600::COS_r600), 0, |
| 10680 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10681 | // Src: (COS_HW:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10682 | // Dst: (COS_r600:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 10683 | /* 40797*/ /*Scope*/ 66, /*->40864*/ |
| 10684 | /* 40798*/ OPC_CheckPatternPredicate, 5, // (Subtarget->getGeneration() == AMDGPUSubtarget::R700) |
| 10685 | /* 40800*/ OPC_EmitInteger, MVT::i32, 1, |
| 10686 | /* 40803*/ OPC_EmitInteger, MVT::i32, 0, |
| 10687 | /* 40806*/ OPC_EmitInteger, MVT::i32, 0, |
| 10688 | /* 40809*/ OPC_EmitInteger, MVT::i32, 0, |
| 10689 | /* 40812*/ OPC_EmitInteger, MVT::i32, 0, |
| 10690 | /* 40815*/ OPC_EmitInteger, MVT::i32, 0, |
| 10691 | /* 40818*/ OPC_EmitInteger, MVT::i32, 0, |
| 10692 | /* 40821*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10693 | /* 40833*/ OPC_EmitInteger, MVT::i32, 1, |
| 10694 | /* 40836*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10695 | /* 40839*/ OPC_EmitInteger, MVT::i32, 0, |
| 10696 | /* 40842*/ OPC_EmitInteger, MVT::i32, 0, |
| 10697 | /* 40845*/ OPC_MorphNodeTo1, TARGET_VAL(R600::COS_r700), 0, |
| 10698 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10699 | // Src: (COS_HW:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10700 | // Dst: (COS_r700:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 10701 | /* 40864*/ /*Scope*/ 66, /*->40931*/ |
| 10702 | /* 40865*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 10703 | /* 40867*/ OPC_EmitInteger, MVT::i32, 1, |
| 10704 | /* 40870*/ OPC_EmitInteger, MVT::i32, 0, |
| 10705 | /* 40873*/ OPC_EmitInteger, MVT::i32, 0, |
| 10706 | /* 40876*/ OPC_EmitInteger, MVT::i32, 0, |
| 10707 | /* 40879*/ OPC_EmitInteger, MVT::i32, 0, |
| 10708 | /* 40882*/ OPC_EmitInteger, MVT::i32, 0, |
| 10709 | /* 40885*/ OPC_EmitInteger, MVT::i32, 0, |
| 10710 | /* 40888*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10711 | /* 40900*/ OPC_EmitInteger, MVT::i32, 1, |
| 10712 | /* 40903*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10713 | /* 40906*/ OPC_EmitInteger, MVT::i32, 0, |
| 10714 | /* 40909*/ OPC_EmitInteger, MVT::i32, 0, |
| 10715 | /* 40912*/ OPC_MorphNodeTo1, TARGET_VAL(R600::COS_eg), 0, |
| 10716 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10717 | // Src: (COS_HW:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10718 | // Dst: (COS_eg:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 10719 | /* 40931*/ /*Scope*/ 66, /*->40998*/ |
| 10720 | /* 40932*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 10721 | /* 40934*/ OPC_EmitInteger, MVT::i32, 1, |
| 10722 | /* 40937*/ OPC_EmitInteger, MVT::i32, 0, |
| 10723 | /* 40940*/ OPC_EmitInteger, MVT::i32, 0, |
| 10724 | /* 40943*/ OPC_EmitInteger, MVT::i32, 0, |
| 10725 | /* 40946*/ OPC_EmitInteger, MVT::i32, 0, |
| 10726 | /* 40949*/ OPC_EmitInteger, MVT::i32, 0, |
| 10727 | /* 40952*/ OPC_EmitInteger, MVT::i32, 0, |
| 10728 | /* 40955*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10729 | /* 40967*/ OPC_EmitInteger, MVT::i32, 1, |
| 10730 | /* 40970*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10731 | /* 40973*/ OPC_EmitInteger, MVT::i32, 0, |
| 10732 | /* 40976*/ OPC_EmitInteger, MVT::i32, 0, |
| 10733 | /* 40979*/ OPC_MorphNodeTo1, TARGET_VAL(R600::COS_cm), 0, |
| 10734 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10735 | // Src: (COS_HW:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 10736 | // Dst: (COS_cm:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 10737 | /* 40998*/ 0, /*End of Scope*/ |
| 10738 | /* 40999*/ /*SwitchOpcode*/ 103, TARGET_VAL(ISD::FMA),// ->41105 |
| 10739 | /* 41002*/ OPC_RecordChild0, // #0 = $src0 |
| 10740 | /* 41003*/ OPC_RecordChild1, // #1 = $src1 |
| 10741 | /* 41004*/ OPC_RecordChild2, // #2 = $src2 |
| 10742 | /* 41005*/ OPC_CheckType, MVT::f32, |
| 10743 | /* 41007*/ OPC_CheckPatternPredicate, 6, // (Subtarget->hasFMA()) && (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10744 | /* 41009*/ OPC_EmitInteger, MVT::i32, 0, |
| 10745 | /* 41012*/ OPC_EmitInteger, MVT::i32, 0, |
| 10746 | /* 41015*/ OPC_EmitInteger, MVT::i32, 0, |
| 10747 | /* 41018*/ OPC_EmitInteger, MVT::i32, 0, |
| 10748 | /* 41021*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10749 | /* 41033*/ OPC_EmitInteger, MVT::i32, 0, |
| 10750 | /* 41036*/ OPC_EmitInteger, MVT::i32, 0, |
| 10751 | /* 41039*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10752 | /* 41051*/ OPC_EmitInteger, MVT::i32, 0, |
| 10753 | /* 41054*/ OPC_EmitInteger, MVT::i32, 0, |
| 10754 | /* 41057*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10755 | /* 41069*/ OPC_EmitInteger, MVT::i32, 1, |
| 10756 | /* 41072*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10757 | /* 41075*/ OPC_EmitInteger, MVT::i32, 0, |
| 10758 | /* 41078*/ OPC_EmitInteger, MVT::i32, 0, |
| 10759 | /* 41081*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FMA_eg), 0, |
| 10760 | MVT::f32, 18/*#Ops*/, 3, 4, 0, 5, 6, 7, 1, 8, 9, 10, 2, 11, 12, 13, 14, 15, 16, 17, |
| 10761 | // Src: (fma:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) - Complexity = 3 |
| 10762 | // Dst: (FMA_eg:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1, f32:{ *:[f32] }:$src2) |
| 10763 | /* 41105*/ /*SwitchOpcode*/ 71, TARGET_VAL(ISD::FP16_TO_FP),// ->41179 |
| 10764 | /* 41108*/ OPC_RecordChild0, // #0 = $src0 |
| 10765 | /* 41109*/ OPC_CheckChild0Type, MVT::i32, |
| 10766 | /* 41111*/ OPC_CheckType, MVT::f32, |
| 10767 | /* 41113*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 10768 | /* 41115*/ OPC_EmitInteger, MVT::i32, 1, |
| 10769 | /* 41118*/ OPC_EmitInteger, MVT::i32, 0, |
| 10770 | /* 41121*/ OPC_EmitInteger, MVT::i32, 0, |
| 10771 | /* 41124*/ OPC_EmitInteger, MVT::i32, 0, |
| 10772 | /* 41127*/ OPC_EmitInteger, MVT::i32, 0, |
| 10773 | /* 41130*/ OPC_EmitInteger, MVT::i32, 0, |
| 10774 | /* 41133*/ OPC_EmitInteger, MVT::i32, 0, |
| 10775 | /* 41136*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10776 | /* 41148*/ OPC_EmitInteger, MVT::i32, 1, |
| 10777 | /* 41151*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10778 | /* 41154*/ OPC_EmitInteger, MVT::i32, 0, |
| 10779 | /* 41157*/ OPC_EmitInteger, MVT::i32, 0, |
| 10780 | /* 41160*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FLT16_TO_FLT32), 0, |
| 10781 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 0, 5, 6, 7, 8, 9, 10, 11, 12, |
| 10782 | // Src: (f16_to_fp:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) - Complexity = 3 |
| 10783 | // Dst: (FLT16_TO_FLT32:{ *:[f32] } R600_Reg32:{ *:[i32] }:$src0) |
| 10784 | /* 41179*/ /*SwitchOpcode*/ 17|128,3/*401*/, TARGET_VAL(ISD::FSQRT),// ->41584 |
| 10785 | /* 41183*/ OPC_RecordChild0, // #0 = $src |
| 10786 | /* 41184*/ OPC_CheckType, MVT::f32, |
| 10787 | /* 41186*/ OPC_Scope, 2|128,1/*130*/, /*->41319*/ // 3 children in Scope |
| 10788 | /* 41189*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10789 | /* 41191*/ OPC_EmitInteger, MVT::i32, 1, |
| 10790 | /* 41194*/ OPC_EmitInteger, MVT::i32, 0, |
| 10791 | /* 41197*/ OPC_EmitInteger, MVT::i32, 0, |
| 10792 | /* 41200*/ OPC_EmitInteger, MVT::i32, 0, |
| 10793 | /* 41203*/ OPC_EmitInteger, MVT::i32, 1, |
| 10794 | /* 41206*/ OPC_EmitInteger, MVT::i32, 0, |
| 10795 | /* 41209*/ OPC_EmitInteger, MVT::i32, 0, |
| 10796 | /* 41212*/ OPC_EmitInteger, MVT::i32, 0, |
| 10797 | /* 41215*/ OPC_EmitInteger, MVT::i32, 0, |
| 10798 | /* 41218*/ OPC_EmitInteger, MVT::i32, 0, |
| 10799 | /* 41221*/ OPC_EmitInteger, MVT::i32, 0, |
| 10800 | /* 41224*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10801 | /* 41236*/ OPC_EmitInteger, MVT::i32, 1, |
| 10802 | /* 41239*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10803 | /* 41242*/ OPC_EmitInteger, MVT::i32, 0, |
| 10804 | /* 41245*/ OPC_EmitInteger, MVT::i32, 0, |
| 10805 | /* 41248*/ OPC_EmitNode1, TARGET_VAL(R600::RECIPSQRT_IEEE_r600), 0, |
| 10806 | MVT::i32, 13/*#Ops*/, 5, 6, 7, 8, 0, 9, 10, 11, 12, 13, 14, 15, 16, // Results = #17 |
| 10807 | /* 41267*/ OPC_EmitInteger, MVT::i32, 0, |
| 10808 | /* 41270*/ OPC_EmitInteger, MVT::i32, 0, |
| 10809 | /* 41273*/ OPC_EmitInteger, MVT::i32, 0, |
| 10810 | /* 41276*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10811 | /* 41288*/ OPC_EmitInteger, MVT::i32, 1, |
| 10812 | /* 41291*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10813 | /* 41294*/ OPC_EmitInteger, MVT::i32, 0, |
| 10814 | /* 41297*/ OPC_EmitInteger, MVT::i32, 0, |
| 10815 | /* 41300*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_r600), 0, |
| 10816 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 17, 18, 19, 20, 21, 22, 23, 24, 25, |
| 10817 | // Src: (fsqrt:{ *:[f32] } f32:{ *:[f32] }:$src) - Complexity = 3 |
| 10818 | // Dst: (RECIP_IEEE_r600:{ *:[f32] } (RECIPSQRT_IEEE_r600:{ *:[i32] } ?:{ *:[f32] }:$src)) |
| 10819 | /* 41319*/ /*Scope*/ 2|128,1/*130*/, /*->41451*/ |
| 10820 | /* 41321*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 10821 | /* 41323*/ OPC_EmitInteger, MVT::i32, 1, |
| 10822 | /* 41326*/ OPC_EmitInteger, MVT::i32, 0, |
| 10823 | /* 41329*/ OPC_EmitInteger, MVT::i32, 0, |
| 10824 | /* 41332*/ OPC_EmitInteger, MVT::i32, 0, |
| 10825 | /* 41335*/ OPC_EmitInteger, MVT::i32, 1, |
| 10826 | /* 41338*/ OPC_EmitInteger, MVT::i32, 0, |
| 10827 | /* 41341*/ OPC_EmitInteger, MVT::i32, 0, |
| 10828 | /* 41344*/ OPC_EmitInteger, MVT::i32, 0, |
| 10829 | /* 41347*/ OPC_EmitInteger, MVT::i32, 0, |
| 10830 | /* 41350*/ OPC_EmitInteger, MVT::i32, 0, |
| 10831 | /* 41353*/ OPC_EmitInteger, MVT::i32, 0, |
| 10832 | /* 41356*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10833 | /* 41368*/ OPC_EmitInteger, MVT::i32, 1, |
| 10834 | /* 41371*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10835 | /* 41374*/ OPC_EmitInteger, MVT::i32, 0, |
| 10836 | /* 41377*/ OPC_EmitInteger, MVT::i32, 0, |
| 10837 | /* 41380*/ OPC_EmitNode1, TARGET_VAL(R600::RECIPSQRT_IEEE_eg), 0, |
| 10838 | MVT::i32, 13/*#Ops*/, 5, 6, 7, 8, 0, 9, 10, 11, 12, 13, 14, 15, 16, // Results = #17 |
| 10839 | /* 41399*/ OPC_EmitInteger, MVT::i32, 0, |
| 10840 | /* 41402*/ OPC_EmitInteger, MVT::i32, 0, |
| 10841 | /* 41405*/ OPC_EmitInteger, MVT::i32, 0, |
| 10842 | /* 41408*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10843 | /* 41420*/ OPC_EmitInteger, MVT::i32, 1, |
| 10844 | /* 41423*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10845 | /* 41426*/ OPC_EmitInteger, MVT::i32, 0, |
| 10846 | /* 41429*/ OPC_EmitInteger, MVT::i32, 0, |
| 10847 | /* 41432*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_eg), 0, |
| 10848 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 17, 18, 19, 20, 21, 22, 23, 24, 25, |
| 10849 | // Src: (fsqrt:{ *:[f32] } f32:{ *:[f32] }:$src) - Complexity = 3 |
| 10850 | // Dst: (RECIP_IEEE_eg:{ *:[f32] } (RECIPSQRT_IEEE_eg:{ *:[i32] } ?:{ *:[f32] }:$src)) |
| 10851 | /* 41451*/ /*Scope*/ 2|128,1/*130*/, /*->41583*/ |
| 10852 | /* 41453*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 10853 | /* 41455*/ OPC_EmitInteger, MVT::i32, 1, |
| 10854 | /* 41458*/ OPC_EmitInteger, MVT::i32, 0, |
| 10855 | /* 41461*/ OPC_EmitInteger, MVT::i32, 0, |
| 10856 | /* 41464*/ OPC_EmitInteger, MVT::i32, 0, |
| 10857 | /* 41467*/ OPC_EmitInteger, MVT::i32, 1, |
| 10858 | /* 41470*/ OPC_EmitInteger, MVT::i32, 0, |
| 10859 | /* 41473*/ OPC_EmitInteger, MVT::i32, 0, |
| 10860 | /* 41476*/ OPC_EmitInteger, MVT::i32, 0, |
| 10861 | /* 41479*/ OPC_EmitInteger, MVT::i32, 0, |
| 10862 | /* 41482*/ OPC_EmitInteger, MVT::i32, 0, |
| 10863 | /* 41485*/ OPC_EmitInteger, MVT::i32, 0, |
| 10864 | /* 41488*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10865 | /* 41500*/ OPC_EmitInteger, MVT::i32, 1, |
| 10866 | /* 41503*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10867 | /* 41506*/ OPC_EmitInteger, MVT::i32, 0, |
| 10868 | /* 41509*/ OPC_EmitInteger, MVT::i32, 0, |
| 10869 | /* 41512*/ OPC_EmitNode1, TARGET_VAL(R600::RECIPSQRT_IEEE_cm), 0, |
| 10870 | MVT::i32, 13/*#Ops*/, 5, 6, 7, 8, 0, 9, 10, 11, 12, 13, 14, 15, 16, // Results = #17 |
| 10871 | /* 41531*/ OPC_EmitInteger, MVT::i32, 0, |
| 10872 | /* 41534*/ OPC_EmitInteger, MVT::i32, 0, |
| 10873 | /* 41537*/ OPC_EmitInteger, MVT::i32, 0, |
| 10874 | /* 41540*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10875 | /* 41552*/ OPC_EmitInteger, MVT::i32, 1, |
| 10876 | /* 41555*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10877 | /* 41558*/ OPC_EmitInteger, MVT::i32, 0, |
| 10878 | /* 41561*/ OPC_EmitInteger, MVT::i32, 0, |
| 10879 | /* 41564*/ OPC_MorphNodeTo1, TARGET_VAL(R600::RECIP_IEEE_cm), 0, |
| 10880 | MVT::f32, 13/*#Ops*/, 1, 2, 3, 4, 17, 18, 19, 20, 21, 22, 23, 24, 25, |
| 10881 | // Src: (fsqrt:{ *:[f32] } f32:{ *:[f32] }:$src) - Complexity = 3 |
| 10882 | // Dst: (RECIP_IEEE_cm:{ *:[f32] } (RECIPSQRT_IEEE_cm:{ *:[i32] } ?:{ *:[f32] }:$src)) |
| 10883 | /* 41583*/ 0, /*End of Scope*/ |
| 10884 | /* 41584*/ /*SwitchOpcode*/ 56|128,5/*696*/, TARGET_VAL(ISD::FPOW),// ->42284 |
| 10885 | /* 41588*/ OPC_RecordChild0, // #0 = $src0 |
| 10886 | /* 41589*/ OPC_RecordChild1, // #1 = $src1 |
| 10887 | /* 41590*/ OPC_CheckType, MVT::f32, |
| 10888 | /* 41592*/ OPC_Scope, 100|128,1/*228*/, /*->41823*/ // 3 children in Scope |
| 10889 | /* 41595*/ OPC_CheckPatternPredicate, 1, // (Subtarget->getGeneration() <= AMDGPUSubtarget::R700) |
| 10890 | /* 41597*/ OPC_EmitInteger, MVT::i32, 1, |
| 10891 | /* 41600*/ OPC_EmitInteger, MVT::i32, 0, |
| 10892 | /* 41603*/ OPC_EmitInteger, MVT::i32, 0, |
| 10893 | /* 41606*/ OPC_EmitInteger, MVT::i32, 0, |
| 10894 | /* 41609*/ OPC_EmitInteger, MVT::i32, 0, |
| 10895 | /* 41612*/ OPC_EmitInteger, MVT::i32, 0, |
| 10896 | /* 41615*/ OPC_EmitInteger, MVT::i32, 1, |
| 10897 | /* 41618*/ OPC_EmitInteger, MVT::i32, 0, |
| 10898 | /* 41621*/ OPC_EmitInteger, MVT::i32, 0, |
| 10899 | /* 41624*/ OPC_EmitInteger, MVT::i32, 0, |
| 10900 | /* 41627*/ OPC_EmitInteger, MVT::i32, 0, |
| 10901 | /* 41630*/ OPC_EmitInteger, MVT::i32, 0, |
| 10902 | /* 41633*/ OPC_EmitInteger, MVT::i32, 0, |
| 10903 | /* 41636*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10904 | /* 41648*/ OPC_EmitInteger, MVT::i32, 1, |
| 10905 | /* 41651*/ OPC_EmitInteger, MVT::i32, 0, |
| 10906 | /* 41654*/ OPC_EmitInteger, MVT::i32, 0, |
| 10907 | /* 41657*/ OPC_EmitInteger, MVT::i32, 0, |
| 10908 | /* 41660*/ OPC_EmitInteger, MVT::i32, 0, |
| 10909 | /* 41663*/ OPC_EmitInteger, MVT::i32, 0, |
| 10910 | /* 41666*/ OPC_EmitInteger, MVT::i32, 0, |
| 10911 | /* 41669*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10912 | /* 41681*/ OPC_EmitInteger, MVT::i32, 1, |
| 10913 | /* 41684*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10914 | /* 41687*/ OPC_EmitInteger, MVT::i32, 0, |
| 10915 | /* 41690*/ OPC_EmitInteger, MVT::i32, 0, |
| 10916 | /* 41693*/ OPC_EmitNode1, TARGET_VAL(R600::LOG_IEEE_r600), 0, |
| 10917 | MVT::i32, 13/*#Ops*/, 16, 17, 18, 19, 0, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 10918 | /* 41712*/ OPC_EmitInteger, MVT::i32, 0, |
| 10919 | /* 41715*/ OPC_EmitInteger, MVT::i32, 0, |
| 10920 | /* 41718*/ OPC_EmitInteger, MVT::i32, 0, |
| 10921 | /* 41721*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10922 | /* 41733*/ OPC_EmitInteger, MVT::i32, 1, |
| 10923 | /* 41736*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10924 | /* 41739*/ OPC_EmitInteger, MVT::i32, 0, |
| 10925 | /* 41742*/ OPC_EmitInteger, MVT::i32, 0, |
| 10926 | /* 41745*/ OPC_EmitNode1, TARGET_VAL(R600::MUL), 0, |
| 10927 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 1, 12, 13, 14, 15, 28, 29, 30, 31, 32, 33, 34, 35, 36, // Results = #37 |
| 10928 | /* 41771*/ OPC_EmitInteger, MVT::i32, 0, |
| 10929 | /* 41774*/ OPC_EmitInteger, MVT::i32, 0, |
| 10930 | /* 41777*/ OPC_EmitInteger, MVT::i32, 0, |
| 10931 | /* 41780*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10932 | /* 41792*/ OPC_EmitInteger, MVT::i32, 1, |
| 10933 | /* 41795*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10934 | /* 41798*/ OPC_EmitInteger, MVT::i32, 0, |
| 10935 | /* 41801*/ OPC_EmitInteger, MVT::i32, 0, |
| 10936 | /* 41804*/ OPC_MorphNodeTo1, TARGET_VAL(R600::EXP_IEEE_r600), 0, |
| 10937 | MVT::f32, 13/*#Ops*/, 2, 3, 4, 5, 37, 38, 39, 40, 41, 42, 43, 44, 45, |
| 10938 | // Src: (fpow:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) - Complexity = 3 |
| 10939 | // Dst: (EXP_IEEE_r600:{ *:[f32] } (MUL:{ *:[i32] } f32:{ *:[f32] }:$src1, (LOG_IEEE_r600:{ *:[i32] } f32:{ *:[f32] }:$src0))) |
| 10940 | /* 41823*/ /*Scope*/ 100|128,1/*228*/, /*->42053*/ |
| 10941 | /* 41825*/ OPC_CheckPatternPredicate, 4, // (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()) |
| 10942 | /* 41827*/ OPC_EmitInteger, MVT::i32, 1, |
| 10943 | /* 41830*/ OPC_EmitInteger, MVT::i32, 0, |
| 10944 | /* 41833*/ OPC_EmitInteger, MVT::i32, 0, |
| 10945 | /* 41836*/ OPC_EmitInteger, MVT::i32, 0, |
| 10946 | /* 41839*/ OPC_EmitInteger, MVT::i32, 0, |
| 10947 | /* 41842*/ OPC_EmitInteger, MVT::i32, 0, |
| 10948 | /* 41845*/ OPC_EmitInteger, MVT::i32, 1, |
| 10949 | /* 41848*/ OPC_EmitInteger, MVT::i32, 0, |
| 10950 | /* 41851*/ OPC_EmitInteger, MVT::i32, 0, |
| 10951 | /* 41854*/ OPC_EmitInteger, MVT::i32, 0, |
| 10952 | /* 41857*/ OPC_EmitInteger, MVT::i32, 0, |
| 10953 | /* 41860*/ OPC_EmitInteger, MVT::i32, 0, |
| 10954 | /* 41863*/ OPC_EmitInteger, MVT::i32, 0, |
| 10955 | /* 41866*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10956 | /* 41878*/ OPC_EmitInteger, MVT::i32, 1, |
| 10957 | /* 41881*/ OPC_EmitInteger, MVT::i32, 0, |
| 10958 | /* 41884*/ OPC_EmitInteger, MVT::i32, 0, |
| 10959 | /* 41887*/ OPC_EmitInteger, MVT::i32, 0, |
| 10960 | /* 41890*/ OPC_EmitInteger, MVT::i32, 0, |
| 10961 | /* 41893*/ OPC_EmitInteger, MVT::i32, 0, |
| 10962 | /* 41896*/ OPC_EmitInteger, MVT::i32, 0, |
| 10963 | /* 41899*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10964 | /* 41911*/ OPC_EmitInteger, MVT::i32, 1, |
| 10965 | /* 41914*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10966 | /* 41917*/ OPC_EmitInteger, MVT::i32, 0, |
| 10967 | /* 41920*/ OPC_EmitInteger, MVT::i32, 0, |
| 10968 | /* 41923*/ OPC_EmitNode1, TARGET_VAL(R600::LOG_IEEE_eg), 0, |
| 10969 | MVT::i32, 13/*#Ops*/, 16, 17, 18, 19, 0, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 10970 | /* 41942*/ OPC_EmitInteger, MVT::i32, 0, |
| 10971 | /* 41945*/ OPC_EmitInteger, MVT::i32, 0, |
| 10972 | /* 41948*/ OPC_EmitInteger, MVT::i32, 0, |
| 10973 | /* 41951*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10974 | /* 41963*/ OPC_EmitInteger, MVT::i32, 1, |
| 10975 | /* 41966*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10976 | /* 41969*/ OPC_EmitInteger, MVT::i32, 0, |
| 10977 | /* 41972*/ OPC_EmitInteger, MVT::i32, 0, |
| 10978 | /* 41975*/ OPC_EmitNode1, TARGET_VAL(R600::MUL), 0, |
| 10979 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 1, 12, 13, 14, 15, 28, 29, 30, 31, 32, 33, 34, 35, 36, // Results = #37 |
| 10980 | /* 42001*/ OPC_EmitInteger, MVT::i32, 0, |
| 10981 | /* 42004*/ OPC_EmitInteger, MVT::i32, 0, |
| 10982 | /* 42007*/ OPC_EmitInteger, MVT::i32, 0, |
| 10983 | /* 42010*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 10984 | /* 42022*/ OPC_EmitInteger, MVT::i32, 1, |
| 10985 | /* 42025*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 10986 | /* 42028*/ OPC_EmitInteger, MVT::i32, 0, |
| 10987 | /* 42031*/ OPC_EmitInteger, MVT::i32, 0, |
| 10988 | /* 42034*/ OPC_MorphNodeTo1, TARGET_VAL(R600::EXP_IEEE_eg), 0, |
| 10989 | MVT::f32, 13/*#Ops*/, 2, 3, 4, 5, 37, 38, 39, 40, 41, 42, 43, 44, 45, |
| 10990 | // Src: (fpow:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) - Complexity = 3 |
| 10991 | // Dst: (EXP_IEEE_eg:{ *:[f32] } (MUL:{ *:[i32] } f32:{ *:[f32] }:$src1, (LOG_IEEE_eg:{ *:[i32] } f32:{ *:[f32] }:$src0))) |
| 10992 | /* 42053*/ /*Scope*/ 100|128,1/*228*/, /*->42283*/ |
| 10993 | /* 42055*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasCaymanISA()) |
| 10994 | /* 42057*/ OPC_EmitInteger, MVT::i32, 1, |
| 10995 | /* 42060*/ OPC_EmitInteger, MVT::i32, 0, |
| 10996 | /* 42063*/ OPC_EmitInteger, MVT::i32, 0, |
| 10997 | /* 42066*/ OPC_EmitInteger, MVT::i32, 0, |
| 10998 | /* 42069*/ OPC_EmitInteger, MVT::i32, 0, |
| 10999 | /* 42072*/ OPC_EmitInteger, MVT::i32, 0, |
| 11000 | /* 42075*/ OPC_EmitInteger, MVT::i32, 1, |
| 11001 | /* 42078*/ OPC_EmitInteger, MVT::i32, 0, |
| 11002 | /* 42081*/ OPC_EmitInteger, MVT::i32, 0, |
| 11003 | /* 42084*/ OPC_EmitInteger, MVT::i32, 0, |
| 11004 | /* 42087*/ OPC_EmitInteger, MVT::i32, 0, |
| 11005 | /* 42090*/ OPC_EmitInteger, MVT::i32, 0, |
| 11006 | /* 42093*/ OPC_EmitInteger, MVT::i32, 0, |
| 11007 | /* 42096*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11008 | /* 42108*/ OPC_EmitInteger, MVT::i32, 1, |
| 11009 | /* 42111*/ OPC_EmitInteger, MVT::i32, 0, |
| 11010 | /* 42114*/ OPC_EmitInteger, MVT::i32, 0, |
| 11011 | /* 42117*/ OPC_EmitInteger, MVT::i32, 0, |
| 11012 | /* 42120*/ OPC_EmitInteger, MVT::i32, 0, |
| 11013 | /* 42123*/ OPC_EmitInteger, MVT::i32, 0, |
| 11014 | /* 42126*/ OPC_EmitInteger, MVT::i32, 0, |
| 11015 | /* 42129*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11016 | /* 42141*/ OPC_EmitInteger, MVT::i32, 1, |
| 11017 | /* 42144*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 11018 | /* 42147*/ OPC_EmitInteger, MVT::i32, 0, |
| 11019 | /* 42150*/ OPC_EmitInteger, MVT::i32, 0, |
| 11020 | /* 42153*/ OPC_EmitNode1, TARGET_VAL(R600::LOG_IEEE_cm), 0, |
| 11021 | MVT::i32, 13/*#Ops*/, 16, 17, 18, 19, 0, 20, 21, 22, 23, 24, 25, 26, 27, // Results = #28 |
| 11022 | /* 42172*/ OPC_EmitInteger, MVT::i32, 0, |
| 11023 | /* 42175*/ OPC_EmitInteger, MVT::i32, 0, |
| 11024 | /* 42178*/ OPC_EmitInteger, MVT::i32, 0, |
| 11025 | /* 42181*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11026 | /* 42193*/ OPC_EmitInteger, MVT::i32, 1, |
| 11027 | /* 42196*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 11028 | /* 42199*/ OPC_EmitInteger, MVT::i32, 0, |
| 11029 | /* 42202*/ OPC_EmitInteger, MVT::i32, 0, |
| 11030 | /* 42205*/ OPC_EmitNode1, TARGET_VAL(R600::MUL), 0, |
| 11031 | MVT::i32, 20/*#Ops*/, 6, 7, 8, 9, 10, 11, 1, 12, 13, 14, 15, 28, 29, 30, 31, 32, 33, 34, 35, 36, // Results = #37 |
| 11032 | /* 42231*/ OPC_EmitInteger, MVT::i32, 0, |
| 11033 | /* 42234*/ OPC_EmitInteger, MVT::i32, 0, |
| 11034 | /* 42237*/ OPC_EmitInteger, MVT::i32, 0, |
| 11035 | /* 42240*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11036 | /* 42252*/ OPC_EmitInteger, MVT::i32, 1, |
| 11037 | /* 42255*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 11038 | /* 42258*/ OPC_EmitInteger, MVT::i32, 0, |
| 11039 | /* 42261*/ OPC_EmitInteger, MVT::i32, 0, |
| 11040 | /* 42264*/ OPC_MorphNodeTo1, TARGET_VAL(R600::EXP_IEEE_cm), 0, |
| 11041 | MVT::f32, 13/*#Ops*/, 2, 3, 4, 5, 37, 38, 39, 40, 41, 42, 43, 44, 45, |
| 11042 | // Src: (fpow:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) - Complexity = 3 |
| 11043 | // Dst: (EXP_IEEE_cm:{ *:[f32] } (MUL:{ *:[i32] } f32:{ *:[f32] }:$src1, (LOG_IEEE_cm:{ *:[i32] } f32:{ *:[f32] }:$src0))) |
| 11044 | /* 42283*/ 0, /*End of Scope*/ |
| 11045 | /* 42284*/ /*SwitchOpcode*/ 14, TARGET_VAL(ISD::ConstantFP),// ->42301 |
| 11046 | /* 42287*/ OPC_RecordNode, // #0 = $val |
| 11047 | /* 42288*/ OPC_CheckType, MVT::f32, |
| 11048 | /* 42290*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11049 | /* 42292*/ OPC_EmitConvertToTarget, 0, |
| 11050 | /* 42294*/ OPC_MorphNodeTo1, TARGET_VAL(R600::MOV_IMM_F32), 0, |
| 11051 | MVT::f32, 1/*#Ops*/, 1, |
| 11052 | // Src: (fpimm:{ *:[f32] }):$val - Complexity = 3 |
| 11053 | // Dst: (MOV_IMM_F32:{ *:[f32] } (fpimm:{ *:[f32] }):$val) |
| 11054 | /* 42301*/ /*SwitchOpcode*/ 10, TARGET_VAL(ISD::FABS),// ->42314 |
| 11055 | /* 42304*/ OPC_RecordChild0, // #0 = $src0 |
| 11056 | /* 42305*/ OPC_CheckType, MVT::f32, |
| 11057 | /* 42307*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FABS_R600), 0, |
| 11058 | MVT::f32, 1/*#Ops*/, 0, |
| 11059 | // Src: (fabs:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 11060 | // Dst: (FABS_R600:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 11061 | /* 42314*/ /*SwitchOpcode*/ 10, TARGET_VAL(ISD::FNEG),// ->42327 |
| 11062 | /* 42317*/ OPC_RecordChild0, // #0 = $src0 |
| 11063 | /* 42318*/ OPC_CheckType, MVT::f32, |
| 11064 | /* 42320*/ OPC_MorphNodeTo1, TARGET_VAL(R600::FNEG_R600), 0, |
| 11065 | MVT::f32, 1/*#Ops*/, 0, |
| 11066 | // Src: (fneg:{ *:[f32] } f32:{ *:[f32] }:$src0) - Complexity = 3 |
| 11067 | // Dst: (FNEG_R600:{ *:[f32] } f32:{ *:[f32] }:$src0) |
| 11068 | /* 42327*/ /*SwitchOpcode*/ 68|128,4/*580*/, TARGET_VAL(ISD::FCOPYSIGN),// ->42911 |
| 11069 | /* 42331*/ OPC_RecordChild0, // #0 = $src0 |
| 11070 | /* 42332*/ OPC_RecordChild1, // #1 = $src1 |
| 11071 | /* 42333*/ OPC_Scope, 19|128,2/*275*/, /*->42611*/ // 2 children in Scope |
| 11072 | /* 42336*/ OPC_CheckChild1Type, MVT::f32, |
| 11073 | /* 42338*/ OPC_SwitchType /*2 cases */, 112, MVT::f32,// ->42453 |
| 11074 | /* 42341*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11075 | /* 42343*/ OPC_EmitInteger, MVT::i32, 0, |
| 11076 | /* 42346*/ OPC_EmitInteger, MVT::i32, 0, |
| 11077 | /* 42349*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,7/*2147483647*/, |
| 11078 | /* 42356*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 11079 | MVT::i32, 1/*#Ops*/, 4, // Results = #5 |
| 11080 | /* 42363*/ OPC_EmitInteger, MVT::i32, 0, |
| 11081 | /* 42366*/ OPC_EmitInteger, MVT::i32, 0, |
| 11082 | /* 42369*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11083 | /* 42381*/ OPC_EmitInteger, MVT::i32, 0, |
| 11084 | /* 42384*/ OPC_EmitInteger, MVT::i32, 0, |
| 11085 | /* 42387*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11086 | /* 42399*/ OPC_EmitInteger, MVT::i32, 0, |
| 11087 | /* 42402*/ OPC_EmitInteger, MVT::i32, 0, |
| 11088 | /* 42405*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11089 | /* 42417*/ OPC_EmitInteger, MVT::i32, 1, |
| 11090 | /* 42420*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 11091 | /* 42423*/ OPC_EmitInteger, MVT::i32, 0, |
| 11092 | /* 42426*/ OPC_EmitInteger, MVT::i32, 0, |
| 11093 | /* 42429*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 11094 | MVT::f32, 18/*#Ops*/, 2, 3, 5, 6, 7, 8, 0, 9, 10, 11, 1, 12, 13, 14, 15, 16, 17, 18, |
| 11095 | // Src: (fcopysign:{ *:[f32] } f32:{ *:[f32] }:$src0, f32:{ *:[f32] }:$src1) - Complexity = 3 |
| 11096 | // Dst: (BFI_INT_eg:{ *:[f32] } (MOV_IMM_I32:{ *:[i32] } 2147483647:{ *:[i32] }), ?:{ *:[f32] }:$src0, ?:{ *:[f32] }:$src1) |
| 11097 | /* 42453*/ /*SwitchType*/ 26|128,1/*154*/, MVT::f64,// ->42610 |
| 11098 | /* 42456*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11099 | /* 42458*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 11100 | /* 42461*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 11101 | /* 42464*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 11102 | MVT::i32, 2/*#Ops*/, 0, 3, // Results = #4 |
| 11103 | /* 42472*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 11104 | /* 42475*/ OPC_EmitInteger, MVT::i32, 0, |
| 11105 | /* 42478*/ OPC_EmitInteger, MVT::i32, 0, |
| 11106 | /* 42481*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,7/*2147483647*/, |
| 11107 | /* 42488*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 11108 | MVT::i32, 1/*#Ops*/, 8, // Results = #9 |
| 11109 | /* 42495*/ OPC_EmitInteger, MVT::i32, 0, |
| 11110 | /* 42498*/ OPC_EmitInteger, MVT::i32, 0, |
| 11111 | /* 42501*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11112 | /* 42513*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 11113 | /* 42516*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 11114 | MVT::i32, 2/*#Ops*/, 0, 13, // Results = #14 |
| 11115 | /* 42524*/ OPC_EmitInteger, MVT::i32, 0, |
| 11116 | /* 42527*/ OPC_EmitInteger, MVT::i32, 0, |
| 11117 | /* 42530*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11118 | /* 42542*/ OPC_EmitInteger, MVT::i32, 0, |
| 11119 | /* 42545*/ OPC_EmitInteger, MVT::i32, 0, |
| 11120 | /* 42548*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11121 | /* 42560*/ OPC_EmitInteger, MVT::i32, 1, |
| 11122 | /* 42563*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 11123 | /* 42566*/ OPC_EmitInteger, MVT::i32, 0, |
| 11124 | /* 42569*/ OPC_EmitInteger, MVT::i32, 0, |
| 11125 | /* 42572*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 11126 | MVT::i32, 18/*#Ops*/, 6, 7, 9, 10, 11, 12, 14, 15, 16, 17, 1, 18, 19, 20, 21, 22, 23, 24, // Results = #25 |
| 11127 | /* 42596*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 11128 | /* 42599*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 11129 | MVT::f64, 5/*#Ops*/, 2, 4, 5, 25, 26, |
| 11130 | // Src: (fcopysign:{ *:[f64] } f64:{ *:[f64] }:$src0, f32:{ *:[f32] }:$src1) - Complexity = 3 |
| 11131 | // Dst: (REG_SEQUENCE:{ *:[f64] } R600_Reg64:{ *:[i32] }, (EXTRACT_SUBREG:{ *:[i32] } ?:{ *:[f64] }:$src0, sub0:{ *:[i32] }), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (MOV_IMM_I32:{ *:[i32] } 2147483647:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[f64] }:$src0, sub1:{ *:[i32] }), ?:{ *:[f32] }:$src1), sub1:{ *:[i32] }) |
| 11132 | /* 42610*/ 0, // EndSwitchType |
| 11133 | /* 42611*/ /*Scope*/ 41|128,2/*297*/, /*->42910*/ |
| 11134 | /* 42613*/ OPC_CheckChild1Type, MVT::f64, |
| 11135 | /* 42615*/ OPC_SwitchType /*2 cases */, 123, MVT::f32,// ->42741 |
| 11136 | /* 42618*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11137 | /* 42620*/ OPC_EmitInteger, MVT::i32, 0, |
| 11138 | /* 42623*/ OPC_EmitInteger, MVT::i32, 0, |
| 11139 | /* 42626*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,7/*2147483647*/, |
| 11140 | /* 42633*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 11141 | MVT::i32, 1/*#Ops*/, 4, // Results = #5 |
| 11142 | /* 42640*/ OPC_EmitInteger, MVT::i32, 0, |
| 11143 | /* 42643*/ OPC_EmitInteger, MVT::i32, 0, |
| 11144 | /* 42646*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11145 | /* 42658*/ OPC_EmitInteger, MVT::i32, 0, |
| 11146 | /* 42661*/ OPC_EmitInteger, MVT::i32, 0, |
| 11147 | /* 42664*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11148 | /* 42676*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 11149 | /* 42679*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 11150 | MVT::i32, 2/*#Ops*/, 1, 12, // Results = #13 |
| 11151 | /* 42687*/ OPC_EmitInteger, MVT::i32, 0, |
| 11152 | /* 42690*/ OPC_EmitInteger, MVT::i32, 0, |
| 11153 | /* 42693*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11154 | /* 42705*/ OPC_EmitInteger, MVT::i32, 1, |
| 11155 | /* 42708*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 11156 | /* 42711*/ OPC_EmitInteger, MVT::i32, 0, |
| 11157 | /* 42714*/ OPC_EmitInteger, MVT::i32, 0, |
| 11158 | /* 42717*/ OPC_MorphNodeTo1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 11159 | MVT::f32, 18/*#Ops*/, 2, 3, 5, 6, 7, 8, 0, 9, 10, 11, 13, 14, 15, 16, 17, 18, 19, 20, |
| 11160 | // Src: (fcopysign:{ *:[f32] } f32:{ *:[f32] }:$src0, f64:{ *:[f64] }:$src1) - Complexity = 3 |
| 11161 | // Dst: (BFI_INT_eg:{ *:[f32] } (MOV_IMM_I32:{ *:[i32] } 2147483647:{ *:[i32] }), ?:{ *:[f32] }:$src0, (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[f64] }:$src1, sub1:{ *:[i32] })) |
| 11162 | /* 42741*/ /*SwitchType*/ 37|128,1/*165*/, MVT::f64,// ->42909 |
| 11163 | /* 42744*/ OPC_CheckPatternPredicate, 0, // (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11164 | /* 42746*/ OPC_EmitInteger, MVT::i32, R600::R600_Reg64RegClassID, |
| 11165 | /* 42749*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 11166 | /* 42752*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 11167 | MVT::i32, 2/*#Ops*/, 0, 3, // Results = #4 |
| 11168 | /* 42760*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 11169 | /* 42763*/ OPC_EmitInteger, MVT::i32, 0, |
| 11170 | /* 42766*/ OPC_EmitInteger, MVT::i32, 0, |
| 11171 | /* 42769*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,7/*2147483647*/, |
| 11172 | /* 42776*/ OPC_EmitNode1, TARGET_VAL(R600::MOV_IMM_I32), 0, |
| 11173 | MVT::i32, 1/*#Ops*/, 8, // Results = #9 |
| 11174 | /* 42783*/ OPC_EmitInteger, MVT::i32, 0, |
| 11175 | /* 42786*/ OPC_EmitInteger, MVT::i32, 0, |
| 11176 | /* 42789*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11177 | /* 42801*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 11178 | /* 42804*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 11179 | MVT::i32, 2/*#Ops*/, 0, 13, // Results = #14 |
| 11180 | /* 42812*/ OPC_EmitInteger, MVT::i32, 0, |
| 11181 | /* 42815*/ OPC_EmitInteger, MVT::i32, 0, |
| 11182 | /* 42818*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11183 | /* 42830*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 11184 | /* 42833*/ OPC_EmitNode1, TARGET_VAL(TargetOpcode::EXTRACT_SUBREG), 0, |
| 11185 | MVT::i32, 2/*#Ops*/, 1, 18, // Results = #19 |
| 11186 | /* 42841*/ OPC_EmitInteger, MVT::i32, 0, |
| 11187 | /* 42844*/ OPC_EmitInteger, MVT::i32, 0, |
| 11188 | /* 42847*/ OPC_EmitInteger, MVT::i32, 127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,127|128,1/*18446744073709551615*/, |
| 11189 | /* 42859*/ OPC_EmitInteger, MVT::i32, 1, |
| 11190 | /* 42862*/ OPC_EmitRegister, MVT::i32, R600::PRED_SEL_OFF, |
| 11191 | /* 42865*/ OPC_EmitInteger, MVT::i32, 0, |
| 11192 | /* 42868*/ OPC_EmitInteger, MVT::i32, 0, |
| 11193 | /* 42871*/ OPC_EmitNode1, TARGET_VAL(R600::BFI_INT_eg), 0, |
| 11194 | MVT::i32, 18/*#Ops*/, 6, 7, 9, 10, 11, 12, 14, 15, 16, 17, 19, 20, 21, 22, 23, 24, 25, 26, // Results = #27 |
| 11195 | /* 42895*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 11196 | /* 42898*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::REG_SEQUENCE), 0, |
| 11197 | MVT::f64, 5/*#Ops*/, 2, 4, 5, 27, 28, |
| 11198 | // Src: (fcopysign:{ *:[f64] } f64:{ *:[f64] }:$src0, f64:{ *:[f64] }:$src1) - Complexity = 3 |
| 11199 | // Dst: (REG_SEQUENCE:{ *:[f64] } R600_Reg64:{ *:[i32] }, (EXTRACT_SUBREG:{ *:[i32] } ?:{ *:[f64] }:$src0, sub0:{ *:[i32] }), sub0:{ *:[i32] }, (BFI_INT_eg:{ *:[i32] } (MOV_IMM_I32:{ *:[i32] } 2147483647:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[f64] }:$src0, sub1:{ *:[i32] }), (EXTRACT_SUBREG:{ *:[i32] } R600_Reg64:{ *:[f64] }:$src1, sub1:{ *:[i32] })), sub1:{ *:[i32] }) |
| 11200 | /* 42909*/ 0, // EndSwitchType |
| 11201 | /* 42910*/ 0, /*End of Scope*/ |
| 11202 | /* 42911*/ /*SwitchOpcode*/ 36|128,2/*292*/, TARGET_VAL(ISD::INSERT_VECTOR_ELT),// ->43207 |
| 11203 | /* 42915*/ OPC_RecordChild0, // #0 = $vec |
| 11204 | /* 42916*/ OPC_RecordChild1, // #1 = $elem |
| 11205 | /* 42917*/ OPC_Scope, 36, /*->42955*/ // 10 children in Scope |
| 11206 | /* 42919*/ OPC_CheckChild2Integer, 0, |
| 11207 | /* 42921*/ OPC_SwitchType /*2 cases */, 14, MVT::v4i32,// ->42938 |
| 11208 | /* 42924*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11209 | /* 42926*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 11210 | /* 42929*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11211 | MVT::v4i32, 3/*#Ops*/, 0, 1, 2, |
| 11212 | // Src: (insertelt:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vec, i32:{ *:[i32] }:$elem, 0:{ *:[iPTR] }) - Complexity = 8 |
| 11213 | // Dst: (INSERT_SUBREG:{ *:[v4i32] } ?:{ *:[v4i32] }:$vec, ?:{ *:[i32] }:$elem, sub0:{ *:[i32] }) |
| 11214 | /* 42938*/ /*SwitchType*/ 14, MVT::v2i32,// ->42954 |
| 11215 | /* 42940*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11216 | /* 42942*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 11217 | /* 42945*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11218 | MVT::v2i32, 3/*#Ops*/, 0, 1, 2, |
| 11219 | // Src: (insertelt:{ *:[v2i32] } v2i32:{ *:[v2i32] }:$vec, i32:{ *:[i32] }:$elem, 0:{ *:[iPTR] }) - Complexity = 8 |
| 11220 | // Dst: (INSERT_SUBREG:{ *:[v2i32] } ?:{ *:[v2i32] }:$vec, ?:{ *:[i32] }:$elem, sub0:{ *:[i32] }) |
| 11221 | /* 42954*/ 0, // EndSwitchType |
| 11222 | /* 42955*/ /*Scope*/ 36, /*->42992*/ |
| 11223 | /* 42956*/ OPC_CheckChild2Integer, 1, |
| 11224 | /* 42958*/ OPC_SwitchType /*2 cases */, 14, MVT::v4i32,// ->42975 |
| 11225 | /* 42961*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11226 | /* 42963*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 11227 | /* 42966*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11228 | MVT::v4i32, 3/*#Ops*/, 0, 1, 2, |
| 11229 | // Src: (insertelt:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vec, i32:{ *:[i32] }:$elem, 1:{ *:[iPTR] }) - Complexity = 8 |
| 11230 | // Dst: (INSERT_SUBREG:{ *:[v4i32] } ?:{ *:[v4i32] }:$vec, ?:{ *:[i32] }:$elem, sub1:{ *:[i32] }) |
| 11231 | /* 42975*/ /*SwitchType*/ 14, MVT::v2i32,// ->42991 |
| 11232 | /* 42977*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11233 | /* 42979*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 11234 | /* 42982*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11235 | MVT::v2i32, 3/*#Ops*/, 0, 1, 2, |
| 11236 | // Src: (insertelt:{ *:[v2i32] } v2i32:{ *:[v2i32] }:$vec, i32:{ *:[i32] }:$elem, 1:{ *:[iPTR] }) - Complexity = 8 |
| 11237 | // Dst: (INSERT_SUBREG:{ *:[v2i32] } ?:{ *:[v2i32] }:$vec, ?:{ *:[i32] }:$elem, sub1:{ *:[i32] }) |
| 11238 | /* 42991*/ 0, // EndSwitchType |
| 11239 | /* 42992*/ /*Scope*/ 18, /*->43011*/ |
| 11240 | /* 42993*/ OPC_CheckChild2Integer, 2, |
| 11241 | /* 42995*/ OPC_CheckType, MVT::v4i32, |
| 11242 | /* 42997*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11243 | /* 42999*/ OPC_EmitInteger, MVT::i32, R600::sub2, |
| 11244 | /* 43002*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11245 | MVT::v4i32, 3/*#Ops*/, 0, 1, 2, |
| 11246 | // Src: (insertelt:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vec, i32:{ *:[i32] }:$elem, 2:{ *:[iPTR] }) - Complexity = 8 |
| 11247 | // Dst: (INSERT_SUBREG:{ *:[v4i32] } ?:{ *:[v4i32] }:$vec, ?:{ *:[i32] }:$elem, sub2:{ *:[i32] }) |
| 11248 | /* 43011*/ /*Scope*/ 18, /*->43030*/ |
| 11249 | /* 43012*/ OPC_CheckChild2Integer, 3, |
| 11250 | /* 43014*/ OPC_CheckType, MVT::v4i32, |
| 11251 | /* 43016*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11252 | /* 43018*/ OPC_EmitInteger, MVT::i32, R600::sub3, |
| 11253 | /* 43021*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11254 | MVT::v4i32, 3/*#Ops*/, 0, 1, 2, |
| 11255 | // Src: (insertelt:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vec, i32:{ *:[i32] }:$elem, 3:{ *:[iPTR] }) - Complexity = 8 |
| 11256 | // Dst: (INSERT_SUBREG:{ *:[v4i32] } ?:{ *:[v4i32] }:$vec, ?:{ *:[i32] }:$elem, sub3:{ *:[i32] }) |
| 11257 | /* 43030*/ /*Scope*/ 31, /*->43062*/ |
| 11258 | /* 43031*/ OPC_RecordChild2, // #2 = $index |
| 11259 | /* 43032*/ OPC_CheckChild2Type, MVT::i32, |
| 11260 | /* 43034*/ OPC_SwitchType /*2 cases */, 11, MVT::v2i32,// ->43048 |
| 11261 | /* 43037*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11262 | /* 43039*/ OPC_MorphNodeTo1, TARGET_VAL(R600::R600_INSERT_ELT_V2), 0, |
| 11263 | MVT::v2i32, 3/*#Ops*/, 0, 1, 2, |
| 11264 | // Src: (insertelt:{ *:[v2i32] } v2i32:{ *:[v2i32] }:$vec, i32:{ *:[i32] }:$value, i32:{ *:[i32] }:$index) - Complexity = 3 |
| 11265 | // Dst: (R600_INSERT_ELT_V2:{ *:[v2i32] } ?:{ *:[v2i32] }:$vec, ?:{ *:[i32] }:$value, ?:{ *:[i32] }:$index) |
| 11266 | /* 43048*/ /*SwitchType*/ 11, MVT::v4i32,// ->43061 |
| 11267 | /* 43050*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11268 | /* 43052*/ OPC_MorphNodeTo1, TARGET_VAL(R600::R600_INSERT_ELT_V4), 0, |
| 11269 | MVT::v4i32, 3/*#Ops*/, 0, 1, 2, |
| 11270 | // Src: (insertelt:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$vec, i32:{ *:[i32] }:$value, i32:{ *:[i32] }:$index) - Complexity = 3 |
| 11271 | // Dst: (R600_INSERT_ELT_V4:{ *:[v4i32] } ?:{ *:[v4i32] }:$vec, ?:{ *:[i32] }:$value, ?:{ *:[i32] }:$index) |
| 11272 | /* 43061*/ 0, // EndSwitchType |
| 11273 | /* 43062*/ /*Scope*/ 36, /*->43099*/ |
| 11274 | /* 43063*/ OPC_CheckChild2Integer, 0, |
| 11275 | /* 43065*/ OPC_SwitchType /*2 cases */, 14, MVT::v4f32,// ->43082 |
| 11276 | /* 43068*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11277 | /* 43070*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 11278 | /* 43073*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11279 | MVT::v4f32, 3/*#Ops*/, 0, 1, 2, |
| 11280 | // Src: (insertelt:{ *:[v4f32] } v4f32:{ *:[v4f32] }:$vec, f32:{ *:[f32] }:$elem, 0:{ *:[iPTR] }) - Complexity = 8 |
| 11281 | // Dst: (INSERT_SUBREG:{ *:[v4f32] } ?:{ *:[v4f32] }:$vec, ?:{ *:[f32] }:$elem, sub0:{ *:[i32] }) |
| 11282 | /* 43082*/ /*SwitchType*/ 14, MVT::v2f32,// ->43098 |
| 11283 | /* 43084*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11284 | /* 43086*/ OPC_EmitInteger, MVT::i32, R600::sub0, |
| 11285 | /* 43089*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11286 | MVT::v2f32, 3/*#Ops*/, 0, 1, 2, |
| 11287 | // Src: (insertelt:{ *:[v2f32] } v2f32:{ *:[v2f32] }:$vec, f32:{ *:[f32] }:$elem, 0:{ *:[iPTR] }) - Complexity = 8 |
| 11288 | // Dst: (INSERT_SUBREG:{ *:[v2f32] } ?:{ *:[v2f32] }:$vec, ?:{ *:[f32] }:$elem, sub0:{ *:[i32] }) |
| 11289 | /* 43098*/ 0, // EndSwitchType |
| 11290 | /* 43099*/ /*Scope*/ 36, /*->43136*/ |
| 11291 | /* 43100*/ OPC_CheckChild2Integer, 1, |
| 11292 | /* 43102*/ OPC_SwitchType /*2 cases */, 14, MVT::v4f32,// ->43119 |
| 11293 | /* 43105*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11294 | /* 43107*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 11295 | /* 43110*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11296 | MVT::v4f32, 3/*#Ops*/, 0, 1, 2, |
| 11297 | // Src: (insertelt:{ *:[v4f32] } v4f32:{ *:[v4f32] }:$vec, f32:{ *:[f32] }:$elem, 1:{ *:[iPTR] }) - Complexity = 8 |
| 11298 | // Dst: (INSERT_SUBREG:{ *:[v4f32] } ?:{ *:[v4f32] }:$vec, ?:{ *:[f32] }:$elem, sub1:{ *:[i32] }) |
| 11299 | /* 43119*/ /*SwitchType*/ 14, MVT::v2f32,// ->43135 |
| 11300 | /* 43121*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11301 | /* 43123*/ OPC_EmitInteger, MVT::i32, R600::sub1, |
| 11302 | /* 43126*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11303 | MVT::v2f32, 3/*#Ops*/, 0, 1, 2, |
| 11304 | // Src: (insertelt:{ *:[v2f32] } v2f32:{ *:[v2f32] }:$vec, f32:{ *:[f32] }:$elem, 1:{ *:[iPTR] }) - Complexity = 8 |
| 11305 | // Dst: (INSERT_SUBREG:{ *:[v2f32] } ?:{ *:[v2f32] }:$vec, ?:{ *:[f32] }:$elem, sub1:{ *:[i32] }) |
| 11306 | /* 43135*/ 0, // EndSwitchType |
| 11307 | /* 43136*/ /*Scope*/ 18, /*->43155*/ |
| 11308 | /* 43137*/ OPC_CheckChild2Integer, 2, |
| 11309 | /* 43139*/ OPC_CheckType, MVT::v4f32, |
| 11310 | /* 43141*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11311 | /* 43143*/ OPC_EmitInteger, MVT::i32, R600::sub2, |
| 11312 | /* 43146*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11313 | MVT::v4f32, 3/*#Ops*/, 0, 1, 2, |
| 11314 | // Src: (insertelt:{ *:[v4f32] } v4f32:{ *:[v4f32] }:$vec, f32:{ *:[f32] }:$elem, 2:{ *:[iPTR] }) - Complexity = 8 |
| 11315 | // Dst: (INSERT_SUBREG:{ *:[v4f32] } ?:{ *:[v4f32] }:$vec, ?:{ *:[f32] }:$elem, sub2:{ *:[i32] }) |
| 11316 | /* 43155*/ /*Scope*/ 18, /*->43174*/ |
| 11317 | /* 43156*/ OPC_CheckChild2Integer, 3, |
| 11318 | /* 43158*/ OPC_CheckType, MVT::v4f32, |
| 11319 | /* 43160*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11320 | /* 43162*/ OPC_EmitInteger, MVT::i32, R600::sub3, |
| 11321 | /* 43165*/ OPC_MorphNodeTo1, TARGET_VAL(TargetOpcode::INSERT_SUBREG), 0, |
| 11322 | MVT::v4f32, 3/*#Ops*/, 0, 1, 2, |
| 11323 | // Src: (insertelt:{ *:[v4f32] } v4f32:{ *:[v4f32] }:$vec, f32:{ *:[f32] }:$elem, 3:{ *:[iPTR] }) - Complexity = 8 |
| 11324 | // Dst: (INSERT_SUBREG:{ *:[v4f32] } ?:{ *:[v4f32] }:$vec, ?:{ *:[f32] }:$elem, sub3:{ *:[i32] }) |
| 11325 | /* 43174*/ /*Scope*/ 31, /*->43206*/ |
| 11326 | /* 43175*/ OPC_RecordChild2, // #2 = $index |
| 11327 | /* 43176*/ OPC_CheckChild2Type, MVT::i32, |
| 11328 | /* 43178*/ OPC_SwitchType /*2 cases */, 11, MVT::v2f32,// ->43192 |
| 11329 | /* 43181*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11330 | /* 43183*/ OPC_MorphNodeTo1, TARGET_VAL(R600::R600_INSERT_ELT_V2), 0, |
| 11331 | MVT::v2f32, 3/*#Ops*/, 0, 1, 2, |
| 11332 | // Src: (insertelt:{ *:[v2f32] } v2f32:{ *:[v2f32] }:$vec, f32:{ *:[f32] }:$value, i32:{ *:[i32] }:$index) - Complexity = 3 |
| 11333 | // Dst: (R600_INSERT_ELT_V2:{ *:[v2f32] } ?:{ *:[v2f32] }:$vec, ?:{ *:[f32] }:$value, ?:{ *:[i32] }:$index) |
| 11334 | /* 43192*/ /*SwitchType*/ 11, MVT::v4f32,// ->43205 |
| 11335 | /* 43194*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11336 | /* 43196*/ OPC_MorphNodeTo1, TARGET_VAL(R600::R600_INSERT_ELT_V4), 0, |
| 11337 | MVT::v4f32, 3/*#Ops*/, 0, 1, 2, |
| 11338 | // Src: (insertelt:{ *:[v4f32] } v4f32:{ *:[v4f32] }:$vec, f32:{ *:[f32] }:$value, i32:{ *:[i32] }:$index) - Complexity = 3 |
| 11339 | // Dst: (R600_INSERT_ELT_V4:{ *:[v4f32] } ?:{ *:[v4f32] }:$vec, ?:{ *:[f32] }:$value, ?:{ *:[i32] }:$index) |
| 11340 | /* 43205*/ 0, // EndSwitchType |
| 11341 | /* 43206*/ 0, /*End of Scope*/ |
| 11342 | /* 43207*/ /*SwitchOpcode*/ 96|128,18/*2400*/, TARGET_VAL(AMDGPUISD::TEXTURE_FETCH),// ->45611 |
| 11343 | /* 43211*/ OPC_Scope, 88|128,1/*216*/, /*->43430*/ // 11 children in Scope |
| 11344 | /* 43214*/ OPC_CheckChild0Integer, 0, |
| 11345 | /* 43216*/ OPC_CheckChild0Type, MVT::i32, |
| 11346 | /* 43218*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 11347 | /* 43219*/ OPC_CheckChild1Type, MVT::v4f32, |
| 11348 | /* 43221*/ OPC_RecordChild2, // #1 = $srcx |
| 11349 | /* 43222*/ OPC_MoveChild2, |
| 11350 | /* 43223*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11351 | /* 43226*/ OPC_CheckType, MVT::i32, |
| 11352 | /* 43228*/ OPC_MoveParent, |
| 11353 | /* 43229*/ OPC_RecordChild3, // #2 = $srcy |
| 11354 | /* 43230*/ OPC_MoveChild3, |
| 11355 | /* 43231*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11356 | /* 43234*/ OPC_CheckType, MVT::i32, |
| 11357 | /* 43236*/ OPC_MoveParent, |
| 11358 | /* 43237*/ OPC_RecordChild4, // #3 = $srcz |
| 11359 | /* 43238*/ OPC_MoveChild4, |
| 11360 | /* 43239*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11361 | /* 43242*/ OPC_CheckType, MVT::i32, |
| 11362 | /* 43244*/ OPC_MoveParent, |
| 11363 | /* 43245*/ OPC_RecordChild5, // #4 = $srcw |
| 11364 | /* 43246*/ OPC_MoveChild5, |
| 11365 | /* 43247*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11366 | /* 43250*/ OPC_CheckType, MVT::i32, |
| 11367 | /* 43252*/ OPC_MoveParent, |
| 11368 | /* 43253*/ OPC_RecordChild6, // #5 = $offsetx |
| 11369 | /* 43254*/ OPC_MoveChild6, |
| 11370 | /* 43255*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11371 | /* 43258*/ OPC_CheckType, MVT::i32, |
| 11372 | /* 43260*/ OPC_MoveParent, |
| 11373 | /* 43261*/ OPC_RecordChild7, // #6 = $offsety |
| 11374 | /* 43262*/ OPC_MoveChild7, |
| 11375 | /* 43263*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11376 | /* 43266*/ OPC_CheckType, MVT::i32, |
| 11377 | /* 43268*/ OPC_MoveParent, |
| 11378 | /* 43269*/ OPC_MoveChild, 8, |
| 11379 | /* 43271*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11380 | /* 43274*/ OPC_RecordNode, // #7 = $offsetz |
| 11381 | /* 43275*/ OPC_CheckType, MVT::i32, |
| 11382 | /* 43277*/ OPC_MoveParent, |
| 11383 | /* 43278*/ OPC_MoveChild, 9, |
| 11384 | /* 43280*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11385 | /* 43283*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 11386 | /* 43284*/ OPC_CheckType, MVT::i32, |
| 11387 | /* 43286*/ OPC_MoveParent, |
| 11388 | /* 43287*/ OPC_MoveChild, 10, |
| 11389 | /* 43289*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11390 | /* 43292*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 11391 | /* 43293*/ OPC_CheckType, MVT::i32, |
| 11392 | /* 43295*/ OPC_MoveParent, |
| 11393 | /* 43296*/ OPC_MoveChild, 11, |
| 11394 | /* 43298*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11395 | /* 43301*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 11396 | /* 43302*/ OPC_CheckType, MVT::i32, |
| 11397 | /* 43304*/ OPC_MoveParent, |
| 11398 | /* 43305*/ OPC_MoveChild, 12, |
| 11399 | /* 43307*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11400 | /* 43310*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 11401 | /* 43311*/ OPC_CheckType, MVT::i32, |
| 11402 | /* 43313*/ OPC_MoveParent, |
| 11403 | /* 43314*/ OPC_MoveChild, 13, |
| 11404 | /* 43316*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11405 | /* 43319*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 11406 | /* 43320*/ OPC_CheckType, MVT::i32, |
| 11407 | /* 43322*/ OPC_MoveParent, |
| 11408 | /* 43323*/ OPC_MoveChild, 14, |
| 11409 | /* 43325*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11410 | /* 43328*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 11411 | /* 43329*/ OPC_CheckType, MVT::i32, |
| 11412 | /* 43331*/ OPC_MoveParent, |
| 11413 | /* 43332*/ OPC_MoveChild, 15, |
| 11414 | /* 43334*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11415 | /* 43337*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 11416 | /* 43338*/ OPC_CheckType, MVT::i32, |
| 11417 | /* 43340*/ OPC_MoveParent, |
| 11418 | /* 43341*/ OPC_MoveChild, 16, |
| 11419 | /* 43343*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11420 | /* 43346*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 11421 | /* 43347*/ OPC_CheckType, MVT::i32, |
| 11422 | /* 43349*/ OPC_MoveParent, |
| 11423 | /* 43350*/ OPC_MoveChild, 17, |
| 11424 | /* 43352*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11425 | /* 43355*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 11426 | /* 43356*/ OPC_CheckType, MVT::i32, |
| 11427 | /* 43358*/ OPC_MoveParent, |
| 11428 | /* 43359*/ OPC_MoveChild, 18, |
| 11429 | /* 43361*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11430 | /* 43364*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 11431 | /* 43365*/ OPC_CheckType, MVT::i32, |
| 11432 | /* 43367*/ OPC_MoveParent, |
| 11433 | /* 43368*/ OPC_CheckType, MVT::v4f32, |
| 11434 | /* 43370*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11435 | /* 43372*/ OPC_EmitConvertToTarget, 1, |
| 11436 | /* 43374*/ OPC_EmitConvertToTarget, 2, |
| 11437 | /* 43376*/ OPC_EmitConvertToTarget, 3, |
| 11438 | /* 43378*/ OPC_EmitConvertToTarget, 4, |
| 11439 | /* 43380*/ OPC_EmitConvertToTarget, 5, |
| 11440 | /* 43382*/ OPC_EmitConvertToTarget, 6, |
| 11441 | /* 43384*/ OPC_EmitConvertToTarget, 7, |
| 11442 | /* 43386*/ OPC_EmitConvertToTarget, 8, |
| 11443 | /* 43388*/ OPC_EmitConvertToTarget, 9, |
| 11444 | /* 43390*/ OPC_EmitConvertToTarget, 10, |
| 11445 | /* 43392*/ OPC_EmitConvertToTarget, 11, |
| 11446 | /* 43394*/ OPC_EmitConvertToTarget, 12, |
| 11447 | /* 43396*/ OPC_EmitConvertToTarget, 13, |
| 11448 | /* 43398*/ OPC_EmitConvertToTarget, 14, |
| 11449 | /* 43400*/ OPC_EmitConvertToTarget, 15, |
| 11450 | /* 43402*/ OPC_EmitConvertToTarget, 16, |
| 11451 | /* 43404*/ OPC_EmitConvertToTarget, 17, |
| 11452 | /* 43406*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_SAMPLE), 0, |
| 11453 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 11454 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 0:{ *:[i32] }, v4f32:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 11455 | // Dst: (TEX_SAMPLE:{ *:[v4f32] } R600_Reg128:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 11456 | /* 43430*/ /*Scope*/ 88|128,1/*216*/, /*->43648*/ |
| 11457 | /* 43432*/ OPC_CheckChild0Integer, 1, |
| 11458 | /* 43434*/ OPC_CheckChild0Type, MVT::i32, |
| 11459 | /* 43436*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 11460 | /* 43437*/ OPC_CheckChild1Type, MVT::v4f32, |
| 11461 | /* 43439*/ OPC_RecordChild2, // #1 = $srcx |
| 11462 | /* 43440*/ OPC_MoveChild2, |
| 11463 | /* 43441*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11464 | /* 43444*/ OPC_CheckType, MVT::i32, |
| 11465 | /* 43446*/ OPC_MoveParent, |
| 11466 | /* 43447*/ OPC_RecordChild3, // #2 = $srcy |
| 11467 | /* 43448*/ OPC_MoveChild3, |
| 11468 | /* 43449*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11469 | /* 43452*/ OPC_CheckType, MVT::i32, |
| 11470 | /* 43454*/ OPC_MoveParent, |
| 11471 | /* 43455*/ OPC_RecordChild4, // #3 = $srcz |
| 11472 | /* 43456*/ OPC_MoveChild4, |
| 11473 | /* 43457*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11474 | /* 43460*/ OPC_CheckType, MVT::i32, |
| 11475 | /* 43462*/ OPC_MoveParent, |
| 11476 | /* 43463*/ OPC_RecordChild5, // #4 = $srcw |
| 11477 | /* 43464*/ OPC_MoveChild5, |
| 11478 | /* 43465*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11479 | /* 43468*/ OPC_CheckType, MVT::i32, |
| 11480 | /* 43470*/ OPC_MoveParent, |
| 11481 | /* 43471*/ OPC_RecordChild6, // #5 = $offsetx |
| 11482 | /* 43472*/ OPC_MoveChild6, |
| 11483 | /* 43473*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11484 | /* 43476*/ OPC_CheckType, MVT::i32, |
| 11485 | /* 43478*/ OPC_MoveParent, |
| 11486 | /* 43479*/ OPC_RecordChild7, // #6 = $offsety |
| 11487 | /* 43480*/ OPC_MoveChild7, |
| 11488 | /* 43481*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11489 | /* 43484*/ OPC_CheckType, MVT::i32, |
| 11490 | /* 43486*/ OPC_MoveParent, |
| 11491 | /* 43487*/ OPC_MoveChild, 8, |
| 11492 | /* 43489*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11493 | /* 43492*/ OPC_RecordNode, // #7 = $offsetz |
| 11494 | /* 43493*/ OPC_CheckType, MVT::i32, |
| 11495 | /* 43495*/ OPC_MoveParent, |
| 11496 | /* 43496*/ OPC_MoveChild, 9, |
| 11497 | /* 43498*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11498 | /* 43501*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 11499 | /* 43502*/ OPC_CheckType, MVT::i32, |
| 11500 | /* 43504*/ OPC_MoveParent, |
| 11501 | /* 43505*/ OPC_MoveChild, 10, |
| 11502 | /* 43507*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11503 | /* 43510*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 11504 | /* 43511*/ OPC_CheckType, MVT::i32, |
| 11505 | /* 43513*/ OPC_MoveParent, |
| 11506 | /* 43514*/ OPC_MoveChild, 11, |
| 11507 | /* 43516*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11508 | /* 43519*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 11509 | /* 43520*/ OPC_CheckType, MVT::i32, |
| 11510 | /* 43522*/ OPC_MoveParent, |
| 11511 | /* 43523*/ OPC_MoveChild, 12, |
| 11512 | /* 43525*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11513 | /* 43528*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 11514 | /* 43529*/ OPC_CheckType, MVT::i32, |
| 11515 | /* 43531*/ OPC_MoveParent, |
| 11516 | /* 43532*/ OPC_MoveChild, 13, |
| 11517 | /* 43534*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11518 | /* 43537*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 11519 | /* 43538*/ OPC_CheckType, MVT::i32, |
| 11520 | /* 43540*/ OPC_MoveParent, |
| 11521 | /* 43541*/ OPC_MoveChild, 14, |
| 11522 | /* 43543*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11523 | /* 43546*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 11524 | /* 43547*/ OPC_CheckType, MVT::i32, |
| 11525 | /* 43549*/ OPC_MoveParent, |
| 11526 | /* 43550*/ OPC_MoveChild, 15, |
| 11527 | /* 43552*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11528 | /* 43555*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 11529 | /* 43556*/ OPC_CheckType, MVT::i32, |
| 11530 | /* 43558*/ OPC_MoveParent, |
| 11531 | /* 43559*/ OPC_MoveChild, 16, |
| 11532 | /* 43561*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11533 | /* 43564*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 11534 | /* 43565*/ OPC_CheckType, MVT::i32, |
| 11535 | /* 43567*/ OPC_MoveParent, |
| 11536 | /* 43568*/ OPC_MoveChild, 17, |
| 11537 | /* 43570*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11538 | /* 43573*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 11539 | /* 43574*/ OPC_CheckType, MVT::i32, |
| 11540 | /* 43576*/ OPC_MoveParent, |
| 11541 | /* 43577*/ OPC_MoveChild, 18, |
| 11542 | /* 43579*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11543 | /* 43582*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 11544 | /* 43583*/ OPC_CheckType, MVT::i32, |
| 11545 | /* 43585*/ OPC_MoveParent, |
| 11546 | /* 43586*/ OPC_CheckType, MVT::v4f32, |
| 11547 | /* 43588*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11548 | /* 43590*/ OPC_EmitConvertToTarget, 1, |
| 11549 | /* 43592*/ OPC_EmitConvertToTarget, 2, |
| 11550 | /* 43594*/ OPC_EmitConvertToTarget, 3, |
| 11551 | /* 43596*/ OPC_EmitConvertToTarget, 4, |
| 11552 | /* 43598*/ OPC_EmitConvertToTarget, 5, |
| 11553 | /* 43600*/ OPC_EmitConvertToTarget, 6, |
| 11554 | /* 43602*/ OPC_EmitConvertToTarget, 7, |
| 11555 | /* 43604*/ OPC_EmitConvertToTarget, 8, |
| 11556 | /* 43606*/ OPC_EmitConvertToTarget, 9, |
| 11557 | /* 43608*/ OPC_EmitConvertToTarget, 10, |
| 11558 | /* 43610*/ OPC_EmitConvertToTarget, 11, |
| 11559 | /* 43612*/ OPC_EmitConvertToTarget, 12, |
| 11560 | /* 43614*/ OPC_EmitConvertToTarget, 13, |
| 11561 | /* 43616*/ OPC_EmitConvertToTarget, 14, |
| 11562 | /* 43618*/ OPC_EmitConvertToTarget, 15, |
| 11563 | /* 43620*/ OPC_EmitConvertToTarget, 16, |
| 11564 | /* 43622*/ OPC_EmitConvertToTarget, 17, |
| 11565 | /* 43624*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_SAMPLE_C), 0, |
| 11566 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 11567 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 1:{ *:[i32] }, v4f32:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 11568 | // Dst: (TEX_SAMPLE_C:{ *:[v4f32] } R600_Reg128:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 11569 | /* 43648*/ /*Scope*/ 88|128,1/*216*/, /*->43866*/ |
| 11570 | /* 43650*/ OPC_CheckChild0Integer, 2, |
| 11571 | /* 43652*/ OPC_CheckChild0Type, MVT::i32, |
| 11572 | /* 43654*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 11573 | /* 43655*/ OPC_CheckChild1Type, MVT::v4f32, |
| 11574 | /* 43657*/ OPC_RecordChild2, // #1 = $srcx |
| 11575 | /* 43658*/ OPC_MoveChild2, |
| 11576 | /* 43659*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11577 | /* 43662*/ OPC_CheckType, MVT::i32, |
| 11578 | /* 43664*/ OPC_MoveParent, |
| 11579 | /* 43665*/ OPC_RecordChild3, // #2 = $srcy |
| 11580 | /* 43666*/ OPC_MoveChild3, |
| 11581 | /* 43667*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11582 | /* 43670*/ OPC_CheckType, MVT::i32, |
| 11583 | /* 43672*/ OPC_MoveParent, |
| 11584 | /* 43673*/ OPC_RecordChild4, // #3 = $srcz |
| 11585 | /* 43674*/ OPC_MoveChild4, |
| 11586 | /* 43675*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11587 | /* 43678*/ OPC_CheckType, MVT::i32, |
| 11588 | /* 43680*/ OPC_MoveParent, |
| 11589 | /* 43681*/ OPC_RecordChild5, // #4 = $srcw |
| 11590 | /* 43682*/ OPC_MoveChild5, |
| 11591 | /* 43683*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11592 | /* 43686*/ OPC_CheckType, MVT::i32, |
| 11593 | /* 43688*/ OPC_MoveParent, |
| 11594 | /* 43689*/ OPC_RecordChild6, // #5 = $offsetx |
| 11595 | /* 43690*/ OPC_MoveChild6, |
| 11596 | /* 43691*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11597 | /* 43694*/ OPC_CheckType, MVT::i32, |
| 11598 | /* 43696*/ OPC_MoveParent, |
| 11599 | /* 43697*/ OPC_RecordChild7, // #6 = $offsety |
| 11600 | /* 43698*/ OPC_MoveChild7, |
| 11601 | /* 43699*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11602 | /* 43702*/ OPC_CheckType, MVT::i32, |
| 11603 | /* 43704*/ OPC_MoveParent, |
| 11604 | /* 43705*/ OPC_MoveChild, 8, |
| 11605 | /* 43707*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11606 | /* 43710*/ OPC_RecordNode, // #7 = $offsetz |
| 11607 | /* 43711*/ OPC_CheckType, MVT::i32, |
| 11608 | /* 43713*/ OPC_MoveParent, |
| 11609 | /* 43714*/ OPC_MoveChild, 9, |
| 11610 | /* 43716*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11611 | /* 43719*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 11612 | /* 43720*/ OPC_CheckType, MVT::i32, |
| 11613 | /* 43722*/ OPC_MoveParent, |
| 11614 | /* 43723*/ OPC_MoveChild, 10, |
| 11615 | /* 43725*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11616 | /* 43728*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 11617 | /* 43729*/ OPC_CheckType, MVT::i32, |
| 11618 | /* 43731*/ OPC_MoveParent, |
| 11619 | /* 43732*/ OPC_MoveChild, 11, |
| 11620 | /* 43734*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11621 | /* 43737*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 11622 | /* 43738*/ OPC_CheckType, MVT::i32, |
| 11623 | /* 43740*/ OPC_MoveParent, |
| 11624 | /* 43741*/ OPC_MoveChild, 12, |
| 11625 | /* 43743*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11626 | /* 43746*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 11627 | /* 43747*/ OPC_CheckType, MVT::i32, |
| 11628 | /* 43749*/ OPC_MoveParent, |
| 11629 | /* 43750*/ OPC_MoveChild, 13, |
| 11630 | /* 43752*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11631 | /* 43755*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 11632 | /* 43756*/ OPC_CheckType, MVT::i32, |
| 11633 | /* 43758*/ OPC_MoveParent, |
| 11634 | /* 43759*/ OPC_MoveChild, 14, |
| 11635 | /* 43761*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11636 | /* 43764*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 11637 | /* 43765*/ OPC_CheckType, MVT::i32, |
| 11638 | /* 43767*/ OPC_MoveParent, |
| 11639 | /* 43768*/ OPC_MoveChild, 15, |
| 11640 | /* 43770*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11641 | /* 43773*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 11642 | /* 43774*/ OPC_CheckType, MVT::i32, |
| 11643 | /* 43776*/ OPC_MoveParent, |
| 11644 | /* 43777*/ OPC_MoveChild, 16, |
| 11645 | /* 43779*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11646 | /* 43782*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 11647 | /* 43783*/ OPC_CheckType, MVT::i32, |
| 11648 | /* 43785*/ OPC_MoveParent, |
| 11649 | /* 43786*/ OPC_MoveChild, 17, |
| 11650 | /* 43788*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11651 | /* 43791*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 11652 | /* 43792*/ OPC_CheckType, MVT::i32, |
| 11653 | /* 43794*/ OPC_MoveParent, |
| 11654 | /* 43795*/ OPC_MoveChild, 18, |
| 11655 | /* 43797*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11656 | /* 43800*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 11657 | /* 43801*/ OPC_CheckType, MVT::i32, |
| 11658 | /* 43803*/ OPC_MoveParent, |
| 11659 | /* 43804*/ OPC_CheckType, MVT::v4f32, |
| 11660 | /* 43806*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11661 | /* 43808*/ OPC_EmitConvertToTarget, 1, |
| 11662 | /* 43810*/ OPC_EmitConvertToTarget, 2, |
| 11663 | /* 43812*/ OPC_EmitConvertToTarget, 3, |
| 11664 | /* 43814*/ OPC_EmitConvertToTarget, 4, |
| 11665 | /* 43816*/ OPC_EmitConvertToTarget, 5, |
| 11666 | /* 43818*/ OPC_EmitConvertToTarget, 6, |
| 11667 | /* 43820*/ OPC_EmitConvertToTarget, 7, |
| 11668 | /* 43822*/ OPC_EmitConvertToTarget, 8, |
| 11669 | /* 43824*/ OPC_EmitConvertToTarget, 9, |
| 11670 | /* 43826*/ OPC_EmitConvertToTarget, 10, |
| 11671 | /* 43828*/ OPC_EmitConvertToTarget, 11, |
| 11672 | /* 43830*/ OPC_EmitConvertToTarget, 12, |
| 11673 | /* 43832*/ OPC_EmitConvertToTarget, 13, |
| 11674 | /* 43834*/ OPC_EmitConvertToTarget, 14, |
| 11675 | /* 43836*/ OPC_EmitConvertToTarget, 15, |
| 11676 | /* 43838*/ OPC_EmitConvertToTarget, 16, |
| 11677 | /* 43840*/ OPC_EmitConvertToTarget, 17, |
| 11678 | /* 43842*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_SAMPLE_L), 0, |
| 11679 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 11680 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 2:{ *:[i32] }, v4f32:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 11681 | // Dst: (TEX_SAMPLE_L:{ *:[v4f32] } R600_Reg128:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 11682 | /* 43866*/ /*Scope*/ 88|128,1/*216*/, /*->44084*/ |
| 11683 | /* 43868*/ OPC_CheckChild0Integer, 3, |
| 11684 | /* 43870*/ OPC_CheckChild0Type, MVT::i32, |
| 11685 | /* 43872*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 11686 | /* 43873*/ OPC_CheckChild1Type, MVT::v4f32, |
| 11687 | /* 43875*/ OPC_RecordChild2, // #1 = $srcx |
| 11688 | /* 43876*/ OPC_MoveChild2, |
| 11689 | /* 43877*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11690 | /* 43880*/ OPC_CheckType, MVT::i32, |
| 11691 | /* 43882*/ OPC_MoveParent, |
| 11692 | /* 43883*/ OPC_RecordChild3, // #2 = $srcy |
| 11693 | /* 43884*/ OPC_MoveChild3, |
| 11694 | /* 43885*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11695 | /* 43888*/ OPC_CheckType, MVT::i32, |
| 11696 | /* 43890*/ OPC_MoveParent, |
| 11697 | /* 43891*/ OPC_RecordChild4, // #3 = $srcz |
| 11698 | /* 43892*/ OPC_MoveChild4, |
| 11699 | /* 43893*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11700 | /* 43896*/ OPC_CheckType, MVT::i32, |
| 11701 | /* 43898*/ OPC_MoveParent, |
| 11702 | /* 43899*/ OPC_RecordChild5, // #4 = $srcw |
| 11703 | /* 43900*/ OPC_MoveChild5, |
| 11704 | /* 43901*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11705 | /* 43904*/ OPC_CheckType, MVT::i32, |
| 11706 | /* 43906*/ OPC_MoveParent, |
| 11707 | /* 43907*/ OPC_RecordChild6, // #5 = $offsetx |
| 11708 | /* 43908*/ OPC_MoveChild6, |
| 11709 | /* 43909*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11710 | /* 43912*/ OPC_CheckType, MVT::i32, |
| 11711 | /* 43914*/ OPC_MoveParent, |
| 11712 | /* 43915*/ OPC_RecordChild7, // #6 = $offsety |
| 11713 | /* 43916*/ OPC_MoveChild7, |
| 11714 | /* 43917*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11715 | /* 43920*/ OPC_CheckType, MVT::i32, |
| 11716 | /* 43922*/ OPC_MoveParent, |
| 11717 | /* 43923*/ OPC_MoveChild, 8, |
| 11718 | /* 43925*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11719 | /* 43928*/ OPC_RecordNode, // #7 = $offsetz |
| 11720 | /* 43929*/ OPC_CheckType, MVT::i32, |
| 11721 | /* 43931*/ OPC_MoveParent, |
| 11722 | /* 43932*/ OPC_MoveChild, 9, |
| 11723 | /* 43934*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11724 | /* 43937*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 11725 | /* 43938*/ OPC_CheckType, MVT::i32, |
| 11726 | /* 43940*/ OPC_MoveParent, |
| 11727 | /* 43941*/ OPC_MoveChild, 10, |
| 11728 | /* 43943*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11729 | /* 43946*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 11730 | /* 43947*/ OPC_CheckType, MVT::i32, |
| 11731 | /* 43949*/ OPC_MoveParent, |
| 11732 | /* 43950*/ OPC_MoveChild, 11, |
| 11733 | /* 43952*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11734 | /* 43955*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 11735 | /* 43956*/ OPC_CheckType, MVT::i32, |
| 11736 | /* 43958*/ OPC_MoveParent, |
| 11737 | /* 43959*/ OPC_MoveChild, 12, |
| 11738 | /* 43961*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11739 | /* 43964*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 11740 | /* 43965*/ OPC_CheckType, MVT::i32, |
| 11741 | /* 43967*/ OPC_MoveParent, |
| 11742 | /* 43968*/ OPC_MoveChild, 13, |
| 11743 | /* 43970*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11744 | /* 43973*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 11745 | /* 43974*/ OPC_CheckType, MVT::i32, |
| 11746 | /* 43976*/ OPC_MoveParent, |
| 11747 | /* 43977*/ OPC_MoveChild, 14, |
| 11748 | /* 43979*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11749 | /* 43982*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 11750 | /* 43983*/ OPC_CheckType, MVT::i32, |
| 11751 | /* 43985*/ OPC_MoveParent, |
| 11752 | /* 43986*/ OPC_MoveChild, 15, |
| 11753 | /* 43988*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11754 | /* 43991*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 11755 | /* 43992*/ OPC_CheckType, MVT::i32, |
| 11756 | /* 43994*/ OPC_MoveParent, |
| 11757 | /* 43995*/ OPC_MoveChild, 16, |
| 11758 | /* 43997*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11759 | /* 44000*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 11760 | /* 44001*/ OPC_CheckType, MVT::i32, |
| 11761 | /* 44003*/ OPC_MoveParent, |
| 11762 | /* 44004*/ OPC_MoveChild, 17, |
| 11763 | /* 44006*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11764 | /* 44009*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 11765 | /* 44010*/ OPC_CheckType, MVT::i32, |
| 11766 | /* 44012*/ OPC_MoveParent, |
| 11767 | /* 44013*/ OPC_MoveChild, 18, |
| 11768 | /* 44015*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11769 | /* 44018*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 11770 | /* 44019*/ OPC_CheckType, MVT::i32, |
| 11771 | /* 44021*/ OPC_MoveParent, |
| 11772 | /* 44022*/ OPC_CheckType, MVT::v4f32, |
| 11773 | /* 44024*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11774 | /* 44026*/ OPC_EmitConvertToTarget, 1, |
| 11775 | /* 44028*/ OPC_EmitConvertToTarget, 2, |
| 11776 | /* 44030*/ OPC_EmitConvertToTarget, 3, |
| 11777 | /* 44032*/ OPC_EmitConvertToTarget, 4, |
| 11778 | /* 44034*/ OPC_EmitConvertToTarget, 5, |
| 11779 | /* 44036*/ OPC_EmitConvertToTarget, 6, |
| 11780 | /* 44038*/ OPC_EmitConvertToTarget, 7, |
| 11781 | /* 44040*/ OPC_EmitConvertToTarget, 8, |
| 11782 | /* 44042*/ OPC_EmitConvertToTarget, 9, |
| 11783 | /* 44044*/ OPC_EmitConvertToTarget, 10, |
| 11784 | /* 44046*/ OPC_EmitConvertToTarget, 11, |
| 11785 | /* 44048*/ OPC_EmitConvertToTarget, 12, |
| 11786 | /* 44050*/ OPC_EmitConvertToTarget, 13, |
| 11787 | /* 44052*/ OPC_EmitConvertToTarget, 14, |
| 11788 | /* 44054*/ OPC_EmitConvertToTarget, 15, |
| 11789 | /* 44056*/ OPC_EmitConvertToTarget, 16, |
| 11790 | /* 44058*/ OPC_EmitConvertToTarget, 17, |
| 11791 | /* 44060*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_SAMPLE_C_L), 0, |
| 11792 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 11793 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 3:{ *:[i32] }, v4f32:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 11794 | // Dst: (TEX_SAMPLE_C_L:{ *:[v4f32] } R600_Reg128:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 11795 | /* 44084*/ /*Scope*/ 88|128,1/*216*/, /*->44302*/ |
| 11796 | /* 44086*/ OPC_CheckChild0Integer, 4, |
| 11797 | /* 44088*/ OPC_CheckChild0Type, MVT::i32, |
| 11798 | /* 44090*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 11799 | /* 44091*/ OPC_CheckChild1Type, MVT::v4f32, |
| 11800 | /* 44093*/ OPC_RecordChild2, // #1 = $srcx |
| 11801 | /* 44094*/ OPC_MoveChild2, |
| 11802 | /* 44095*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11803 | /* 44098*/ OPC_CheckType, MVT::i32, |
| 11804 | /* 44100*/ OPC_MoveParent, |
| 11805 | /* 44101*/ OPC_RecordChild3, // #2 = $srcy |
| 11806 | /* 44102*/ OPC_MoveChild3, |
| 11807 | /* 44103*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11808 | /* 44106*/ OPC_CheckType, MVT::i32, |
| 11809 | /* 44108*/ OPC_MoveParent, |
| 11810 | /* 44109*/ OPC_RecordChild4, // #3 = $srcz |
| 11811 | /* 44110*/ OPC_MoveChild4, |
| 11812 | /* 44111*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11813 | /* 44114*/ OPC_CheckType, MVT::i32, |
| 11814 | /* 44116*/ OPC_MoveParent, |
| 11815 | /* 44117*/ OPC_RecordChild5, // #4 = $srcw |
| 11816 | /* 44118*/ OPC_MoveChild5, |
| 11817 | /* 44119*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11818 | /* 44122*/ OPC_CheckType, MVT::i32, |
| 11819 | /* 44124*/ OPC_MoveParent, |
| 11820 | /* 44125*/ OPC_RecordChild6, // #5 = $offsetx |
| 11821 | /* 44126*/ OPC_MoveChild6, |
| 11822 | /* 44127*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11823 | /* 44130*/ OPC_CheckType, MVT::i32, |
| 11824 | /* 44132*/ OPC_MoveParent, |
| 11825 | /* 44133*/ OPC_RecordChild7, // #6 = $offsety |
| 11826 | /* 44134*/ OPC_MoveChild7, |
| 11827 | /* 44135*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11828 | /* 44138*/ OPC_CheckType, MVT::i32, |
| 11829 | /* 44140*/ OPC_MoveParent, |
| 11830 | /* 44141*/ OPC_MoveChild, 8, |
| 11831 | /* 44143*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11832 | /* 44146*/ OPC_RecordNode, // #7 = $offsetz |
| 11833 | /* 44147*/ OPC_CheckType, MVT::i32, |
| 11834 | /* 44149*/ OPC_MoveParent, |
| 11835 | /* 44150*/ OPC_MoveChild, 9, |
| 11836 | /* 44152*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11837 | /* 44155*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 11838 | /* 44156*/ OPC_CheckType, MVT::i32, |
| 11839 | /* 44158*/ OPC_MoveParent, |
| 11840 | /* 44159*/ OPC_MoveChild, 10, |
| 11841 | /* 44161*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11842 | /* 44164*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 11843 | /* 44165*/ OPC_CheckType, MVT::i32, |
| 11844 | /* 44167*/ OPC_MoveParent, |
| 11845 | /* 44168*/ OPC_MoveChild, 11, |
| 11846 | /* 44170*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11847 | /* 44173*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 11848 | /* 44174*/ OPC_CheckType, MVT::i32, |
| 11849 | /* 44176*/ OPC_MoveParent, |
| 11850 | /* 44177*/ OPC_MoveChild, 12, |
| 11851 | /* 44179*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11852 | /* 44182*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 11853 | /* 44183*/ OPC_CheckType, MVT::i32, |
| 11854 | /* 44185*/ OPC_MoveParent, |
| 11855 | /* 44186*/ OPC_MoveChild, 13, |
| 11856 | /* 44188*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11857 | /* 44191*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 11858 | /* 44192*/ OPC_CheckType, MVT::i32, |
| 11859 | /* 44194*/ OPC_MoveParent, |
| 11860 | /* 44195*/ OPC_MoveChild, 14, |
| 11861 | /* 44197*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11862 | /* 44200*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 11863 | /* 44201*/ OPC_CheckType, MVT::i32, |
| 11864 | /* 44203*/ OPC_MoveParent, |
| 11865 | /* 44204*/ OPC_MoveChild, 15, |
| 11866 | /* 44206*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11867 | /* 44209*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 11868 | /* 44210*/ OPC_CheckType, MVT::i32, |
| 11869 | /* 44212*/ OPC_MoveParent, |
| 11870 | /* 44213*/ OPC_MoveChild, 16, |
| 11871 | /* 44215*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11872 | /* 44218*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 11873 | /* 44219*/ OPC_CheckType, MVT::i32, |
| 11874 | /* 44221*/ OPC_MoveParent, |
| 11875 | /* 44222*/ OPC_MoveChild, 17, |
| 11876 | /* 44224*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11877 | /* 44227*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 11878 | /* 44228*/ OPC_CheckType, MVT::i32, |
| 11879 | /* 44230*/ OPC_MoveParent, |
| 11880 | /* 44231*/ OPC_MoveChild, 18, |
| 11881 | /* 44233*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11882 | /* 44236*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 11883 | /* 44237*/ OPC_CheckType, MVT::i32, |
| 11884 | /* 44239*/ OPC_MoveParent, |
| 11885 | /* 44240*/ OPC_CheckType, MVT::v4f32, |
| 11886 | /* 44242*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 11887 | /* 44244*/ OPC_EmitConvertToTarget, 1, |
| 11888 | /* 44246*/ OPC_EmitConvertToTarget, 2, |
| 11889 | /* 44248*/ OPC_EmitConvertToTarget, 3, |
| 11890 | /* 44250*/ OPC_EmitConvertToTarget, 4, |
| 11891 | /* 44252*/ OPC_EmitConvertToTarget, 5, |
| 11892 | /* 44254*/ OPC_EmitConvertToTarget, 6, |
| 11893 | /* 44256*/ OPC_EmitConvertToTarget, 7, |
| 11894 | /* 44258*/ OPC_EmitConvertToTarget, 8, |
| 11895 | /* 44260*/ OPC_EmitConvertToTarget, 9, |
| 11896 | /* 44262*/ OPC_EmitConvertToTarget, 10, |
| 11897 | /* 44264*/ OPC_EmitConvertToTarget, 11, |
| 11898 | /* 44266*/ OPC_EmitConvertToTarget, 12, |
| 11899 | /* 44268*/ OPC_EmitConvertToTarget, 13, |
| 11900 | /* 44270*/ OPC_EmitConvertToTarget, 14, |
| 11901 | /* 44272*/ OPC_EmitConvertToTarget, 15, |
| 11902 | /* 44274*/ OPC_EmitConvertToTarget, 16, |
| 11903 | /* 44276*/ OPC_EmitConvertToTarget, 17, |
| 11904 | /* 44278*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_SAMPLE_LB), 0, |
| 11905 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 11906 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 4:{ *:[i32] }, v4f32:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 11907 | // Dst: (TEX_SAMPLE_LB:{ *:[v4f32] } R600_Reg128:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 11908 | /* 44302*/ /*Scope*/ 88|128,1/*216*/, /*->44520*/ |
| 11909 | /* 44304*/ OPC_CheckChild0Integer, 5, |
| 11910 | /* 44306*/ OPC_CheckChild0Type, MVT::i32, |
| 11911 | /* 44308*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 11912 | /* 44309*/ OPC_CheckChild1Type, MVT::v4f32, |
| 11913 | /* 44311*/ OPC_RecordChild2, // #1 = $srcx |
| 11914 | /* 44312*/ OPC_MoveChild2, |
| 11915 | /* 44313*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11916 | /* 44316*/ OPC_CheckType, MVT::i32, |
| 11917 | /* 44318*/ OPC_MoveParent, |
| 11918 | /* 44319*/ OPC_RecordChild3, // #2 = $srcy |
| 11919 | /* 44320*/ OPC_MoveChild3, |
| 11920 | /* 44321*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11921 | /* 44324*/ OPC_CheckType, MVT::i32, |
| 11922 | /* 44326*/ OPC_MoveParent, |
| 11923 | /* 44327*/ OPC_RecordChild4, // #3 = $srcz |
| 11924 | /* 44328*/ OPC_MoveChild4, |
| 11925 | /* 44329*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11926 | /* 44332*/ OPC_CheckType, MVT::i32, |
| 11927 | /* 44334*/ OPC_MoveParent, |
| 11928 | /* 44335*/ OPC_RecordChild5, // #4 = $srcw |
| 11929 | /* 44336*/ OPC_MoveChild5, |
| 11930 | /* 44337*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11931 | /* 44340*/ OPC_CheckType, MVT::i32, |
| 11932 | /* 44342*/ OPC_MoveParent, |
| 11933 | /* 44343*/ OPC_RecordChild6, // #5 = $offsetx |
| 11934 | /* 44344*/ OPC_MoveChild6, |
| 11935 | /* 44345*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11936 | /* 44348*/ OPC_CheckType, MVT::i32, |
| 11937 | /* 44350*/ OPC_MoveParent, |
| 11938 | /* 44351*/ OPC_RecordChild7, // #6 = $offsety |
| 11939 | /* 44352*/ OPC_MoveChild7, |
| 11940 | /* 44353*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11941 | /* 44356*/ OPC_CheckType, MVT::i32, |
| 11942 | /* 44358*/ OPC_MoveParent, |
| 11943 | /* 44359*/ OPC_MoveChild, 8, |
| 11944 | /* 44361*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11945 | /* 44364*/ OPC_RecordNode, // #7 = $offsetz |
| 11946 | /* 44365*/ OPC_CheckType, MVT::i32, |
| 11947 | /* 44367*/ OPC_MoveParent, |
| 11948 | /* 44368*/ OPC_MoveChild, 9, |
| 11949 | /* 44370*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11950 | /* 44373*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 11951 | /* 44374*/ OPC_CheckType, MVT::i32, |
| 11952 | /* 44376*/ OPC_MoveParent, |
| 11953 | /* 44377*/ OPC_MoveChild, 10, |
| 11954 | /* 44379*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11955 | /* 44382*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 11956 | /* 44383*/ OPC_CheckType, MVT::i32, |
| 11957 | /* 44385*/ OPC_MoveParent, |
| 11958 | /* 44386*/ OPC_MoveChild, 11, |
| 11959 | /* 44388*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11960 | /* 44391*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 11961 | /* 44392*/ OPC_CheckType, MVT::i32, |
| 11962 | /* 44394*/ OPC_MoveParent, |
| 11963 | /* 44395*/ OPC_MoveChild, 12, |
| 11964 | /* 44397*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11965 | /* 44400*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 11966 | /* 44401*/ OPC_CheckType, MVT::i32, |
| 11967 | /* 44403*/ OPC_MoveParent, |
| 11968 | /* 44404*/ OPC_MoveChild, 13, |
| 11969 | /* 44406*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11970 | /* 44409*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 11971 | /* 44410*/ OPC_CheckType, MVT::i32, |
| 11972 | /* 44412*/ OPC_MoveParent, |
| 11973 | /* 44413*/ OPC_MoveChild, 14, |
| 11974 | /* 44415*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11975 | /* 44418*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 11976 | /* 44419*/ OPC_CheckType, MVT::i32, |
| 11977 | /* 44421*/ OPC_MoveParent, |
| 11978 | /* 44422*/ OPC_MoveChild, 15, |
| 11979 | /* 44424*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11980 | /* 44427*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 11981 | /* 44428*/ OPC_CheckType, MVT::i32, |
| 11982 | /* 44430*/ OPC_MoveParent, |
| 11983 | /* 44431*/ OPC_MoveChild, 16, |
| 11984 | /* 44433*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11985 | /* 44436*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 11986 | /* 44437*/ OPC_CheckType, MVT::i32, |
| 11987 | /* 44439*/ OPC_MoveParent, |
| 11988 | /* 44440*/ OPC_MoveChild, 17, |
| 11989 | /* 44442*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11990 | /* 44445*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 11991 | /* 44446*/ OPC_CheckType, MVT::i32, |
| 11992 | /* 44448*/ OPC_MoveParent, |
| 11993 | /* 44449*/ OPC_MoveChild, 18, |
| 11994 | /* 44451*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 11995 | /* 44454*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 11996 | /* 44455*/ OPC_CheckType, MVT::i32, |
| 11997 | /* 44457*/ OPC_MoveParent, |
| 11998 | /* 44458*/ OPC_CheckType, MVT::v4f32, |
| 11999 | /* 44460*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 12000 | /* 44462*/ OPC_EmitConvertToTarget, 1, |
| 12001 | /* 44464*/ OPC_EmitConvertToTarget, 2, |
| 12002 | /* 44466*/ OPC_EmitConvertToTarget, 3, |
| 12003 | /* 44468*/ OPC_EmitConvertToTarget, 4, |
| 12004 | /* 44470*/ OPC_EmitConvertToTarget, 5, |
| 12005 | /* 44472*/ OPC_EmitConvertToTarget, 6, |
| 12006 | /* 44474*/ OPC_EmitConvertToTarget, 7, |
| 12007 | /* 44476*/ OPC_EmitConvertToTarget, 8, |
| 12008 | /* 44478*/ OPC_EmitConvertToTarget, 9, |
| 12009 | /* 44480*/ OPC_EmitConvertToTarget, 10, |
| 12010 | /* 44482*/ OPC_EmitConvertToTarget, 11, |
| 12011 | /* 44484*/ OPC_EmitConvertToTarget, 12, |
| 12012 | /* 44486*/ OPC_EmitConvertToTarget, 13, |
| 12013 | /* 44488*/ OPC_EmitConvertToTarget, 14, |
| 12014 | /* 44490*/ OPC_EmitConvertToTarget, 15, |
| 12015 | /* 44492*/ OPC_EmitConvertToTarget, 16, |
| 12016 | /* 44494*/ OPC_EmitConvertToTarget, 17, |
| 12017 | /* 44496*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_SAMPLE_C_LB), 0, |
| 12018 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 12019 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 5:{ *:[i32] }, v4f32:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 12020 | // Dst: (TEX_SAMPLE_C_LB:{ *:[v4f32] } R600_Reg128:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 12021 | /* 44520*/ /*Scope*/ 88|128,1/*216*/, /*->44738*/ |
| 12022 | /* 44522*/ OPC_CheckChild0Integer, 6, |
| 12023 | /* 44524*/ OPC_CheckChild0Type, MVT::i32, |
| 12024 | /* 44526*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 12025 | /* 44527*/ OPC_CheckChild1Type, MVT::v4i32, |
| 12026 | /* 44529*/ OPC_RecordChild2, // #1 = $srcx |
| 12027 | /* 44530*/ OPC_MoveChild2, |
| 12028 | /* 44531*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12029 | /* 44534*/ OPC_CheckType, MVT::i32, |
| 12030 | /* 44536*/ OPC_MoveParent, |
| 12031 | /* 44537*/ OPC_RecordChild3, // #2 = $srcy |
| 12032 | /* 44538*/ OPC_MoveChild3, |
| 12033 | /* 44539*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12034 | /* 44542*/ OPC_CheckType, MVT::i32, |
| 12035 | /* 44544*/ OPC_MoveParent, |
| 12036 | /* 44545*/ OPC_RecordChild4, // #3 = $srcz |
| 12037 | /* 44546*/ OPC_MoveChild4, |
| 12038 | /* 44547*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12039 | /* 44550*/ OPC_CheckType, MVT::i32, |
| 12040 | /* 44552*/ OPC_MoveParent, |
| 12041 | /* 44553*/ OPC_RecordChild5, // #4 = $srcw |
| 12042 | /* 44554*/ OPC_MoveChild5, |
| 12043 | /* 44555*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12044 | /* 44558*/ OPC_CheckType, MVT::i32, |
| 12045 | /* 44560*/ OPC_MoveParent, |
| 12046 | /* 44561*/ OPC_RecordChild6, // #5 = $offsetx |
| 12047 | /* 44562*/ OPC_MoveChild6, |
| 12048 | /* 44563*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12049 | /* 44566*/ OPC_CheckType, MVT::i32, |
| 12050 | /* 44568*/ OPC_MoveParent, |
| 12051 | /* 44569*/ OPC_RecordChild7, // #6 = $offsety |
| 12052 | /* 44570*/ OPC_MoveChild7, |
| 12053 | /* 44571*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12054 | /* 44574*/ OPC_CheckType, MVT::i32, |
| 12055 | /* 44576*/ OPC_MoveParent, |
| 12056 | /* 44577*/ OPC_MoveChild, 8, |
| 12057 | /* 44579*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12058 | /* 44582*/ OPC_RecordNode, // #7 = $offsetz |
| 12059 | /* 44583*/ OPC_CheckType, MVT::i32, |
| 12060 | /* 44585*/ OPC_MoveParent, |
| 12061 | /* 44586*/ OPC_MoveChild, 9, |
| 12062 | /* 44588*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12063 | /* 44591*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 12064 | /* 44592*/ OPC_CheckType, MVT::i32, |
| 12065 | /* 44594*/ OPC_MoveParent, |
| 12066 | /* 44595*/ OPC_MoveChild, 10, |
| 12067 | /* 44597*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12068 | /* 44600*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 12069 | /* 44601*/ OPC_CheckType, MVT::i32, |
| 12070 | /* 44603*/ OPC_MoveParent, |
| 12071 | /* 44604*/ OPC_MoveChild, 11, |
| 12072 | /* 44606*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12073 | /* 44609*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 12074 | /* 44610*/ OPC_CheckType, MVT::i32, |
| 12075 | /* 44612*/ OPC_MoveParent, |
| 12076 | /* 44613*/ OPC_MoveChild, 12, |
| 12077 | /* 44615*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12078 | /* 44618*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 12079 | /* 44619*/ OPC_CheckType, MVT::i32, |
| 12080 | /* 44621*/ OPC_MoveParent, |
| 12081 | /* 44622*/ OPC_MoveChild, 13, |
| 12082 | /* 44624*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12083 | /* 44627*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 12084 | /* 44628*/ OPC_CheckType, MVT::i32, |
| 12085 | /* 44630*/ OPC_MoveParent, |
| 12086 | /* 44631*/ OPC_MoveChild, 14, |
| 12087 | /* 44633*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12088 | /* 44636*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 12089 | /* 44637*/ OPC_CheckType, MVT::i32, |
| 12090 | /* 44639*/ OPC_MoveParent, |
| 12091 | /* 44640*/ OPC_MoveChild, 15, |
| 12092 | /* 44642*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12093 | /* 44645*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 12094 | /* 44646*/ OPC_CheckType, MVT::i32, |
| 12095 | /* 44648*/ OPC_MoveParent, |
| 12096 | /* 44649*/ OPC_MoveChild, 16, |
| 12097 | /* 44651*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12098 | /* 44654*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 12099 | /* 44655*/ OPC_CheckType, MVT::i32, |
| 12100 | /* 44657*/ OPC_MoveParent, |
| 12101 | /* 44658*/ OPC_MoveChild, 17, |
| 12102 | /* 44660*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12103 | /* 44663*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 12104 | /* 44664*/ OPC_CheckType, MVT::i32, |
| 12105 | /* 44666*/ OPC_MoveParent, |
| 12106 | /* 44667*/ OPC_MoveChild, 18, |
| 12107 | /* 44669*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12108 | /* 44672*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 12109 | /* 44673*/ OPC_CheckType, MVT::i32, |
| 12110 | /* 44675*/ OPC_MoveParent, |
| 12111 | /* 44676*/ OPC_CheckType, MVT::v4f32, |
| 12112 | /* 44678*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 12113 | /* 44680*/ OPC_EmitConvertToTarget, 1, |
| 12114 | /* 44682*/ OPC_EmitConvertToTarget, 2, |
| 12115 | /* 44684*/ OPC_EmitConvertToTarget, 3, |
| 12116 | /* 44686*/ OPC_EmitConvertToTarget, 4, |
| 12117 | /* 44688*/ OPC_EmitConvertToTarget, 5, |
| 12118 | /* 44690*/ OPC_EmitConvertToTarget, 6, |
| 12119 | /* 44692*/ OPC_EmitConvertToTarget, 7, |
| 12120 | /* 44694*/ OPC_EmitConvertToTarget, 8, |
| 12121 | /* 44696*/ OPC_EmitConvertToTarget, 9, |
| 12122 | /* 44698*/ OPC_EmitConvertToTarget, 10, |
| 12123 | /* 44700*/ OPC_EmitConvertToTarget, 11, |
| 12124 | /* 44702*/ OPC_EmitConvertToTarget, 12, |
| 12125 | /* 44704*/ OPC_EmitConvertToTarget, 13, |
| 12126 | /* 44706*/ OPC_EmitConvertToTarget, 14, |
| 12127 | /* 44708*/ OPC_EmitConvertToTarget, 15, |
| 12128 | /* 44710*/ OPC_EmitConvertToTarget, 16, |
| 12129 | /* 44712*/ OPC_EmitConvertToTarget, 17, |
| 12130 | /* 44714*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_LD), 0, |
| 12131 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 12132 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 6:{ *:[i32] }, v4i32:{ *:[v4i32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 12133 | // Dst: (TEX_LD:{ *:[v4f32] } R600_Reg128:{ *:[v4i32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 12134 | /* 44738*/ /*Scope*/ 88|128,1/*216*/, /*->44956*/ |
| 12135 | /* 44740*/ OPC_CheckChild0Integer, 7, |
| 12136 | /* 44742*/ OPC_CheckChild0Type, MVT::i32, |
| 12137 | /* 44744*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 12138 | /* 44745*/ OPC_CheckChild1Type, MVT::v4i32, |
| 12139 | /* 44747*/ OPC_RecordChild2, // #1 = $srcx |
| 12140 | /* 44748*/ OPC_MoveChild2, |
| 12141 | /* 44749*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12142 | /* 44752*/ OPC_CheckType, MVT::i32, |
| 12143 | /* 44754*/ OPC_MoveParent, |
| 12144 | /* 44755*/ OPC_RecordChild3, // #2 = $srcy |
| 12145 | /* 44756*/ OPC_MoveChild3, |
| 12146 | /* 44757*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12147 | /* 44760*/ OPC_CheckType, MVT::i32, |
| 12148 | /* 44762*/ OPC_MoveParent, |
| 12149 | /* 44763*/ OPC_RecordChild4, // #3 = $srcz |
| 12150 | /* 44764*/ OPC_MoveChild4, |
| 12151 | /* 44765*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12152 | /* 44768*/ OPC_CheckType, MVT::i32, |
| 12153 | /* 44770*/ OPC_MoveParent, |
| 12154 | /* 44771*/ OPC_RecordChild5, // #4 = $srcw |
| 12155 | /* 44772*/ OPC_MoveChild5, |
| 12156 | /* 44773*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12157 | /* 44776*/ OPC_CheckType, MVT::i32, |
| 12158 | /* 44778*/ OPC_MoveParent, |
| 12159 | /* 44779*/ OPC_RecordChild6, // #5 = $offsetx |
| 12160 | /* 44780*/ OPC_MoveChild6, |
| 12161 | /* 44781*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12162 | /* 44784*/ OPC_CheckType, MVT::i32, |
| 12163 | /* 44786*/ OPC_MoveParent, |
| 12164 | /* 44787*/ OPC_RecordChild7, // #6 = $offsety |
| 12165 | /* 44788*/ OPC_MoveChild7, |
| 12166 | /* 44789*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12167 | /* 44792*/ OPC_CheckType, MVT::i32, |
| 12168 | /* 44794*/ OPC_MoveParent, |
| 12169 | /* 44795*/ OPC_MoveChild, 8, |
| 12170 | /* 44797*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12171 | /* 44800*/ OPC_RecordNode, // #7 = $offsetz |
| 12172 | /* 44801*/ OPC_CheckType, MVT::i32, |
| 12173 | /* 44803*/ OPC_MoveParent, |
| 12174 | /* 44804*/ OPC_MoveChild, 9, |
| 12175 | /* 44806*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12176 | /* 44809*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 12177 | /* 44810*/ OPC_CheckType, MVT::i32, |
| 12178 | /* 44812*/ OPC_MoveParent, |
| 12179 | /* 44813*/ OPC_MoveChild, 10, |
| 12180 | /* 44815*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12181 | /* 44818*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 12182 | /* 44819*/ OPC_CheckType, MVT::i32, |
| 12183 | /* 44821*/ OPC_MoveParent, |
| 12184 | /* 44822*/ OPC_MoveChild, 11, |
| 12185 | /* 44824*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12186 | /* 44827*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 12187 | /* 44828*/ OPC_CheckType, MVT::i32, |
| 12188 | /* 44830*/ OPC_MoveParent, |
| 12189 | /* 44831*/ OPC_MoveChild, 12, |
| 12190 | /* 44833*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12191 | /* 44836*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 12192 | /* 44837*/ OPC_CheckType, MVT::i32, |
| 12193 | /* 44839*/ OPC_MoveParent, |
| 12194 | /* 44840*/ OPC_MoveChild, 13, |
| 12195 | /* 44842*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12196 | /* 44845*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 12197 | /* 44846*/ OPC_CheckType, MVT::i32, |
| 12198 | /* 44848*/ OPC_MoveParent, |
| 12199 | /* 44849*/ OPC_MoveChild, 14, |
| 12200 | /* 44851*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12201 | /* 44854*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 12202 | /* 44855*/ OPC_CheckType, MVT::i32, |
| 12203 | /* 44857*/ OPC_MoveParent, |
| 12204 | /* 44858*/ OPC_MoveChild, 15, |
| 12205 | /* 44860*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12206 | /* 44863*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 12207 | /* 44864*/ OPC_CheckType, MVT::i32, |
| 12208 | /* 44866*/ OPC_MoveParent, |
| 12209 | /* 44867*/ OPC_MoveChild, 16, |
| 12210 | /* 44869*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12211 | /* 44872*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 12212 | /* 44873*/ OPC_CheckType, MVT::i32, |
| 12213 | /* 44875*/ OPC_MoveParent, |
| 12214 | /* 44876*/ OPC_MoveChild, 17, |
| 12215 | /* 44878*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12216 | /* 44881*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 12217 | /* 44882*/ OPC_CheckType, MVT::i32, |
| 12218 | /* 44884*/ OPC_MoveParent, |
| 12219 | /* 44885*/ OPC_MoveChild, 18, |
| 12220 | /* 44887*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12221 | /* 44890*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 12222 | /* 44891*/ OPC_CheckType, MVT::i32, |
| 12223 | /* 44893*/ OPC_MoveParent, |
| 12224 | /* 44894*/ OPC_CheckType, MVT::v4f32, |
| 12225 | /* 44896*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 12226 | /* 44898*/ OPC_EmitConvertToTarget, 1, |
| 12227 | /* 44900*/ OPC_EmitConvertToTarget, 2, |
| 12228 | /* 44902*/ OPC_EmitConvertToTarget, 3, |
| 12229 | /* 44904*/ OPC_EmitConvertToTarget, 4, |
| 12230 | /* 44906*/ OPC_EmitConvertToTarget, 5, |
| 12231 | /* 44908*/ OPC_EmitConvertToTarget, 6, |
| 12232 | /* 44910*/ OPC_EmitConvertToTarget, 7, |
| 12233 | /* 44912*/ OPC_EmitConvertToTarget, 8, |
| 12234 | /* 44914*/ OPC_EmitConvertToTarget, 9, |
| 12235 | /* 44916*/ OPC_EmitConvertToTarget, 10, |
| 12236 | /* 44918*/ OPC_EmitConvertToTarget, 11, |
| 12237 | /* 44920*/ OPC_EmitConvertToTarget, 12, |
| 12238 | /* 44922*/ OPC_EmitConvertToTarget, 13, |
| 12239 | /* 44924*/ OPC_EmitConvertToTarget, 14, |
| 12240 | /* 44926*/ OPC_EmitConvertToTarget, 15, |
| 12241 | /* 44928*/ OPC_EmitConvertToTarget, 16, |
| 12242 | /* 44930*/ OPC_EmitConvertToTarget, 17, |
| 12243 | /* 44932*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_GET_TEXTURE_RESINFO), 0, |
| 12244 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 12245 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 7:{ *:[i32] }, v4i32:{ *:[v4i32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 12246 | // Dst: (TEX_GET_TEXTURE_RESINFO:{ *:[v4f32] } R600_Reg128:{ *:[v4i32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 12247 | /* 44956*/ /*Scope*/ 88|128,1/*216*/, /*->45174*/ |
| 12248 | /* 44958*/ OPC_CheckChild0Integer, 8, |
| 12249 | /* 44960*/ OPC_CheckChild0Type, MVT::i32, |
| 12250 | /* 44962*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 12251 | /* 44963*/ OPC_CheckChild1Type, MVT::v4f32, |
| 12252 | /* 44965*/ OPC_RecordChild2, // #1 = $srcx |
| 12253 | /* 44966*/ OPC_MoveChild2, |
| 12254 | /* 44967*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12255 | /* 44970*/ OPC_CheckType, MVT::i32, |
| 12256 | /* 44972*/ OPC_MoveParent, |
| 12257 | /* 44973*/ OPC_RecordChild3, // #2 = $srcy |
| 12258 | /* 44974*/ OPC_MoveChild3, |
| 12259 | /* 44975*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12260 | /* 44978*/ OPC_CheckType, MVT::i32, |
| 12261 | /* 44980*/ OPC_MoveParent, |
| 12262 | /* 44981*/ OPC_RecordChild4, // #3 = $srcz |
| 12263 | /* 44982*/ OPC_MoveChild4, |
| 12264 | /* 44983*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12265 | /* 44986*/ OPC_CheckType, MVT::i32, |
| 12266 | /* 44988*/ OPC_MoveParent, |
| 12267 | /* 44989*/ OPC_RecordChild5, // #4 = $srcw |
| 12268 | /* 44990*/ OPC_MoveChild5, |
| 12269 | /* 44991*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12270 | /* 44994*/ OPC_CheckType, MVT::i32, |
| 12271 | /* 44996*/ OPC_MoveParent, |
| 12272 | /* 44997*/ OPC_RecordChild6, // #5 = $offsetx |
| 12273 | /* 44998*/ OPC_MoveChild6, |
| 12274 | /* 44999*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12275 | /* 45002*/ OPC_CheckType, MVT::i32, |
| 12276 | /* 45004*/ OPC_MoveParent, |
| 12277 | /* 45005*/ OPC_RecordChild7, // #6 = $offsety |
| 12278 | /* 45006*/ OPC_MoveChild7, |
| 12279 | /* 45007*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12280 | /* 45010*/ OPC_CheckType, MVT::i32, |
| 12281 | /* 45012*/ OPC_MoveParent, |
| 12282 | /* 45013*/ OPC_MoveChild, 8, |
| 12283 | /* 45015*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12284 | /* 45018*/ OPC_RecordNode, // #7 = $offsetz |
| 12285 | /* 45019*/ OPC_CheckType, MVT::i32, |
| 12286 | /* 45021*/ OPC_MoveParent, |
| 12287 | /* 45022*/ OPC_MoveChild, 9, |
| 12288 | /* 45024*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12289 | /* 45027*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 12290 | /* 45028*/ OPC_CheckType, MVT::i32, |
| 12291 | /* 45030*/ OPC_MoveParent, |
| 12292 | /* 45031*/ OPC_MoveChild, 10, |
| 12293 | /* 45033*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12294 | /* 45036*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 12295 | /* 45037*/ OPC_CheckType, MVT::i32, |
| 12296 | /* 45039*/ OPC_MoveParent, |
| 12297 | /* 45040*/ OPC_MoveChild, 11, |
| 12298 | /* 45042*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12299 | /* 45045*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 12300 | /* 45046*/ OPC_CheckType, MVT::i32, |
| 12301 | /* 45048*/ OPC_MoveParent, |
| 12302 | /* 45049*/ OPC_MoveChild, 12, |
| 12303 | /* 45051*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12304 | /* 45054*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 12305 | /* 45055*/ OPC_CheckType, MVT::i32, |
| 12306 | /* 45057*/ OPC_MoveParent, |
| 12307 | /* 45058*/ OPC_MoveChild, 13, |
| 12308 | /* 45060*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12309 | /* 45063*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 12310 | /* 45064*/ OPC_CheckType, MVT::i32, |
| 12311 | /* 45066*/ OPC_MoveParent, |
| 12312 | /* 45067*/ OPC_MoveChild, 14, |
| 12313 | /* 45069*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12314 | /* 45072*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 12315 | /* 45073*/ OPC_CheckType, MVT::i32, |
| 12316 | /* 45075*/ OPC_MoveParent, |
| 12317 | /* 45076*/ OPC_MoveChild, 15, |
| 12318 | /* 45078*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12319 | /* 45081*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 12320 | /* 45082*/ OPC_CheckType, MVT::i32, |
| 12321 | /* 45084*/ OPC_MoveParent, |
| 12322 | /* 45085*/ OPC_MoveChild, 16, |
| 12323 | /* 45087*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12324 | /* 45090*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 12325 | /* 45091*/ OPC_CheckType, MVT::i32, |
| 12326 | /* 45093*/ OPC_MoveParent, |
| 12327 | /* 45094*/ OPC_MoveChild, 17, |
| 12328 | /* 45096*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12329 | /* 45099*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 12330 | /* 45100*/ OPC_CheckType, MVT::i32, |
| 12331 | /* 45102*/ OPC_MoveParent, |
| 12332 | /* 45103*/ OPC_MoveChild, 18, |
| 12333 | /* 45105*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12334 | /* 45108*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 12335 | /* 45109*/ OPC_CheckType, MVT::i32, |
| 12336 | /* 45111*/ OPC_MoveParent, |
| 12337 | /* 45112*/ OPC_CheckType, MVT::v4f32, |
| 12338 | /* 45114*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 12339 | /* 45116*/ OPC_EmitConvertToTarget, 1, |
| 12340 | /* 45118*/ OPC_EmitConvertToTarget, 2, |
| 12341 | /* 45120*/ OPC_EmitConvertToTarget, 3, |
| 12342 | /* 45122*/ OPC_EmitConvertToTarget, 4, |
| 12343 | /* 45124*/ OPC_EmitConvertToTarget, 5, |
| 12344 | /* 45126*/ OPC_EmitConvertToTarget, 6, |
| 12345 | /* 45128*/ OPC_EmitConvertToTarget, 7, |
| 12346 | /* 45130*/ OPC_EmitConvertToTarget, 8, |
| 12347 | /* 45132*/ OPC_EmitConvertToTarget, 9, |
| 12348 | /* 45134*/ OPC_EmitConvertToTarget, 10, |
| 12349 | /* 45136*/ OPC_EmitConvertToTarget, 11, |
| 12350 | /* 45138*/ OPC_EmitConvertToTarget, 12, |
| 12351 | /* 45140*/ OPC_EmitConvertToTarget, 13, |
| 12352 | /* 45142*/ OPC_EmitConvertToTarget, 14, |
| 12353 | /* 45144*/ OPC_EmitConvertToTarget, 15, |
| 12354 | /* 45146*/ OPC_EmitConvertToTarget, 16, |
| 12355 | /* 45148*/ OPC_EmitConvertToTarget, 17, |
| 12356 | /* 45150*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_GET_GRADIENTS_H), 0, |
| 12357 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 12358 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 8:{ *:[i32] }, v4f32:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 12359 | // Dst: (TEX_GET_GRADIENTS_H:{ *:[v4f32] } R600_Reg128:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 12360 | /* 45174*/ /*Scope*/ 88|128,1/*216*/, /*->45392*/ |
| 12361 | /* 45176*/ OPC_CheckChild0Integer, 9, |
| 12362 | /* 45178*/ OPC_CheckChild0Type, MVT::i32, |
| 12363 | /* 45180*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 12364 | /* 45181*/ OPC_CheckChild1Type, MVT::v4f32, |
| 12365 | /* 45183*/ OPC_RecordChild2, // #1 = $srcx |
| 12366 | /* 45184*/ OPC_MoveChild2, |
| 12367 | /* 45185*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12368 | /* 45188*/ OPC_CheckType, MVT::i32, |
| 12369 | /* 45190*/ OPC_MoveParent, |
| 12370 | /* 45191*/ OPC_RecordChild3, // #2 = $srcy |
| 12371 | /* 45192*/ OPC_MoveChild3, |
| 12372 | /* 45193*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12373 | /* 45196*/ OPC_CheckType, MVT::i32, |
| 12374 | /* 45198*/ OPC_MoveParent, |
| 12375 | /* 45199*/ OPC_RecordChild4, // #3 = $srcz |
| 12376 | /* 45200*/ OPC_MoveChild4, |
| 12377 | /* 45201*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12378 | /* 45204*/ OPC_CheckType, MVT::i32, |
| 12379 | /* 45206*/ OPC_MoveParent, |
| 12380 | /* 45207*/ OPC_RecordChild5, // #4 = $srcw |
| 12381 | /* 45208*/ OPC_MoveChild5, |
| 12382 | /* 45209*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12383 | /* 45212*/ OPC_CheckType, MVT::i32, |
| 12384 | /* 45214*/ OPC_MoveParent, |
| 12385 | /* 45215*/ OPC_RecordChild6, // #5 = $offsetx |
| 12386 | /* 45216*/ OPC_MoveChild6, |
| 12387 | /* 45217*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12388 | /* 45220*/ OPC_CheckType, MVT::i32, |
| 12389 | /* 45222*/ OPC_MoveParent, |
| 12390 | /* 45223*/ OPC_RecordChild7, // #6 = $offsety |
| 12391 | /* 45224*/ OPC_MoveChild7, |
| 12392 | /* 45225*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12393 | /* 45228*/ OPC_CheckType, MVT::i32, |
| 12394 | /* 45230*/ OPC_MoveParent, |
| 12395 | /* 45231*/ OPC_MoveChild, 8, |
| 12396 | /* 45233*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12397 | /* 45236*/ OPC_RecordNode, // #7 = $offsetz |
| 12398 | /* 45237*/ OPC_CheckType, MVT::i32, |
| 12399 | /* 45239*/ OPC_MoveParent, |
| 12400 | /* 45240*/ OPC_MoveChild, 9, |
| 12401 | /* 45242*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12402 | /* 45245*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 12403 | /* 45246*/ OPC_CheckType, MVT::i32, |
| 12404 | /* 45248*/ OPC_MoveParent, |
| 12405 | /* 45249*/ OPC_MoveChild, 10, |
| 12406 | /* 45251*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12407 | /* 45254*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 12408 | /* 45255*/ OPC_CheckType, MVT::i32, |
| 12409 | /* 45257*/ OPC_MoveParent, |
| 12410 | /* 45258*/ OPC_MoveChild, 11, |
| 12411 | /* 45260*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12412 | /* 45263*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 12413 | /* 45264*/ OPC_CheckType, MVT::i32, |
| 12414 | /* 45266*/ OPC_MoveParent, |
| 12415 | /* 45267*/ OPC_MoveChild, 12, |
| 12416 | /* 45269*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12417 | /* 45272*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 12418 | /* 45273*/ OPC_CheckType, MVT::i32, |
| 12419 | /* 45275*/ OPC_MoveParent, |
| 12420 | /* 45276*/ OPC_MoveChild, 13, |
| 12421 | /* 45278*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12422 | /* 45281*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 12423 | /* 45282*/ OPC_CheckType, MVT::i32, |
| 12424 | /* 45284*/ OPC_MoveParent, |
| 12425 | /* 45285*/ OPC_MoveChild, 14, |
| 12426 | /* 45287*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12427 | /* 45290*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 12428 | /* 45291*/ OPC_CheckType, MVT::i32, |
| 12429 | /* 45293*/ OPC_MoveParent, |
| 12430 | /* 45294*/ OPC_MoveChild, 15, |
| 12431 | /* 45296*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12432 | /* 45299*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 12433 | /* 45300*/ OPC_CheckType, MVT::i32, |
| 12434 | /* 45302*/ OPC_MoveParent, |
| 12435 | /* 45303*/ OPC_MoveChild, 16, |
| 12436 | /* 45305*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12437 | /* 45308*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 12438 | /* 45309*/ OPC_CheckType, MVT::i32, |
| 12439 | /* 45311*/ OPC_MoveParent, |
| 12440 | /* 45312*/ OPC_MoveChild, 17, |
| 12441 | /* 45314*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12442 | /* 45317*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 12443 | /* 45318*/ OPC_CheckType, MVT::i32, |
| 12444 | /* 45320*/ OPC_MoveParent, |
| 12445 | /* 45321*/ OPC_MoveChild, 18, |
| 12446 | /* 45323*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12447 | /* 45326*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 12448 | /* 45327*/ OPC_CheckType, MVT::i32, |
| 12449 | /* 45329*/ OPC_MoveParent, |
| 12450 | /* 45330*/ OPC_CheckType, MVT::v4f32, |
| 12451 | /* 45332*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 12452 | /* 45334*/ OPC_EmitConvertToTarget, 1, |
| 12453 | /* 45336*/ OPC_EmitConvertToTarget, 2, |
| 12454 | /* 45338*/ OPC_EmitConvertToTarget, 3, |
| 12455 | /* 45340*/ OPC_EmitConvertToTarget, 4, |
| 12456 | /* 45342*/ OPC_EmitConvertToTarget, 5, |
| 12457 | /* 45344*/ OPC_EmitConvertToTarget, 6, |
| 12458 | /* 45346*/ OPC_EmitConvertToTarget, 7, |
| 12459 | /* 45348*/ OPC_EmitConvertToTarget, 8, |
| 12460 | /* 45350*/ OPC_EmitConvertToTarget, 9, |
| 12461 | /* 45352*/ OPC_EmitConvertToTarget, 10, |
| 12462 | /* 45354*/ OPC_EmitConvertToTarget, 11, |
| 12463 | /* 45356*/ OPC_EmitConvertToTarget, 12, |
| 12464 | /* 45358*/ OPC_EmitConvertToTarget, 13, |
| 12465 | /* 45360*/ OPC_EmitConvertToTarget, 14, |
| 12466 | /* 45362*/ OPC_EmitConvertToTarget, 15, |
| 12467 | /* 45364*/ OPC_EmitConvertToTarget, 16, |
| 12468 | /* 45366*/ OPC_EmitConvertToTarget, 17, |
| 12469 | /* 45368*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_GET_GRADIENTS_V), 0, |
| 12470 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 12471 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 9:{ *:[i32] }, v4f32:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 12472 | // Dst: (TEX_GET_GRADIENTS_V:{ *:[v4f32] } R600_Reg128:{ *:[v4f32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 12473 | /* 45392*/ /*Scope*/ 88|128,1/*216*/, /*->45610*/ |
| 12474 | /* 45394*/ OPC_CheckChild0Integer, 10, |
| 12475 | /* 45396*/ OPC_CheckChild0Type, MVT::i32, |
| 12476 | /* 45398*/ OPC_RecordChild1, // #0 = $SRC_GPR |
| 12477 | /* 45399*/ OPC_CheckChild1Type, MVT::v4i32, |
| 12478 | /* 45401*/ OPC_RecordChild2, // #1 = $srcx |
| 12479 | /* 45402*/ OPC_MoveChild2, |
| 12480 | /* 45403*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12481 | /* 45406*/ OPC_CheckType, MVT::i32, |
| 12482 | /* 45408*/ OPC_MoveParent, |
| 12483 | /* 45409*/ OPC_RecordChild3, // #2 = $srcy |
| 12484 | /* 45410*/ OPC_MoveChild3, |
| 12485 | /* 45411*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12486 | /* 45414*/ OPC_CheckType, MVT::i32, |
| 12487 | /* 45416*/ OPC_MoveParent, |
| 12488 | /* 45417*/ OPC_RecordChild4, // #3 = $srcz |
| 12489 | /* 45418*/ OPC_MoveChild4, |
| 12490 | /* 45419*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12491 | /* 45422*/ OPC_CheckType, MVT::i32, |
| 12492 | /* 45424*/ OPC_MoveParent, |
| 12493 | /* 45425*/ OPC_RecordChild5, // #4 = $srcw |
| 12494 | /* 45426*/ OPC_MoveChild5, |
| 12495 | /* 45427*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12496 | /* 45430*/ OPC_CheckType, MVT::i32, |
| 12497 | /* 45432*/ OPC_MoveParent, |
| 12498 | /* 45433*/ OPC_RecordChild6, // #5 = $offsetx |
| 12499 | /* 45434*/ OPC_MoveChild6, |
| 12500 | /* 45435*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12501 | /* 45438*/ OPC_CheckType, MVT::i32, |
| 12502 | /* 45440*/ OPC_MoveParent, |
| 12503 | /* 45441*/ OPC_RecordChild7, // #6 = $offsety |
| 12504 | /* 45442*/ OPC_MoveChild7, |
| 12505 | /* 45443*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12506 | /* 45446*/ OPC_CheckType, MVT::i32, |
| 12507 | /* 45448*/ OPC_MoveParent, |
| 12508 | /* 45449*/ OPC_MoveChild, 8, |
| 12509 | /* 45451*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12510 | /* 45454*/ OPC_RecordNode, // #7 = $offsetz |
| 12511 | /* 45455*/ OPC_CheckType, MVT::i32, |
| 12512 | /* 45457*/ OPC_MoveParent, |
| 12513 | /* 45458*/ OPC_MoveChild, 9, |
| 12514 | /* 45460*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12515 | /* 45463*/ OPC_RecordNode, // #8 = $DST_SEL_X |
| 12516 | /* 45464*/ OPC_CheckType, MVT::i32, |
| 12517 | /* 45466*/ OPC_MoveParent, |
| 12518 | /* 45467*/ OPC_MoveChild, 10, |
| 12519 | /* 45469*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12520 | /* 45472*/ OPC_RecordNode, // #9 = $DST_SEL_Y |
| 12521 | /* 45473*/ OPC_CheckType, MVT::i32, |
| 12522 | /* 45475*/ OPC_MoveParent, |
| 12523 | /* 45476*/ OPC_MoveChild, 11, |
| 12524 | /* 45478*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12525 | /* 45481*/ OPC_RecordNode, // #10 = $DST_SEL_Z |
| 12526 | /* 45482*/ OPC_CheckType, MVT::i32, |
| 12527 | /* 45484*/ OPC_MoveParent, |
| 12528 | /* 45485*/ OPC_MoveChild, 12, |
| 12529 | /* 45487*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12530 | /* 45490*/ OPC_RecordNode, // #11 = $DST_SEL_W |
| 12531 | /* 45491*/ OPC_CheckType, MVT::i32, |
| 12532 | /* 45493*/ OPC_MoveParent, |
| 12533 | /* 45494*/ OPC_MoveChild, 13, |
| 12534 | /* 45496*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12535 | /* 45499*/ OPC_RecordNode, // #12 = $RESOURCE_ID |
| 12536 | /* 45500*/ OPC_CheckType, MVT::i32, |
| 12537 | /* 45502*/ OPC_MoveParent, |
| 12538 | /* 45503*/ OPC_MoveChild, 14, |
| 12539 | /* 45505*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12540 | /* 45508*/ OPC_RecordNode, // #13 = $SAMPLER_ID |
| 12541 | /* 45509*/ OPC_CheckType, MVT::i32, |
| 12542 | /* 45511*/ OPC_MoveParent, |
| 12543 | /* 45512*/ OPC_MoveChild, 15, |
| 12544 | /* 45514*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12545 | /* 45517*/ OPC_RecordNode, // #14 = $COORD_TYPE_X |
| 12546 | /* 45518*/ OPC_CheckType, MVT::i32, |
| 12547 | /* 45520*/ OPC_MoveParent, |
| 12548 | /* 45521*/ OPC_MoveChild, 16, |
| 12549 | /* 45523*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12550 | /* 45526*/ OPC_RecordNode, // #15 = $COORD_TYPE_Y |
| 12551 | /* 45527*/ OPC_CheckType, MVT::i32, |
| 12552 | /* 45529*/ OPC_MoveParent, |
| 12553 | /* 45530*/ OPC_MoveChild, 17, |
| 12554 | /* 45532*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12555 | /* 45535*/ OPC_RecordNode, // #16 = $COORD_TYPE_Z |
| 12556 | /* 45536*/ OPC_CheckType, MVT::i32, |
| 12557 | /* 45538*/ OPC_MoveParent, |
| 12558 | /* 45539*/ OPC_MoveChild, 18, |
| 12559 | /* 45541*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
| 12560 | /* 45544*/ OPC_RecordNode, // #17 = $COORD_TYPE_W |
| 12561 | /* 45545*/ OPC_CheckType, MVT::i32, |
| 12562 | /* 45547*/ OPC_MoveParent, |
| 12563 | /* 45548*/ OPC_CheckType, MVT::v4f32, |
| 12564 | /* 45550*/ OPC_CheckPatternPredicate, 2, // (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) |
| 12565 | /* 45552*/ OPC_EmitConvertToTarget, 1, |
| 12566 | /* 45554*/ OPC_EmitConvertToTarget, 2, |
| 12567 | /* 45556*/ OPC_EmitConvertToTarget, 3, |
| 12568 | /* 45558*/ OPC_EmitConvertToTarget, 4, |
| 12569 | /* 45560*/ OPC_EmitConvertToTarget, 5, |
| 12570 | /* 45562*/ OPC_EmitConvertToTarget, 6, |
| 12571 | /* 45564*/ OPC_EmitConvertToTarget, 7, |
| 12572 | /* 45566*/ OPC_EmitConvertToTarget, 8, |
| 12573 | /* 45568*/ OPC_EmitConvertToTarget, 9, |
| 12574 | /* 45570*/ OPC_EmitConvertToTarget, 10, |
| 12575 | /* 45572*/ OPC_EmitConvertToTarget, 11, |
| 12576 | /* 45574*/ OPC_EmitConvertToTarget, 12, |
| 12577 | /* 45576*/ OPC_EmitConvertToTarget, 13, |
| 12578 | /* 45578*/ OPC_EmitConvertToTarget, 14, |
| 12579 | /* 45580*/ OPC_EmitConvertToTarget, 15, |
| 12580 | /* 45582*/ OPC_EmitConvertToTarget, 16, |
| 12581 | /* 45584*/ OPC_EmitConvertToTarget, 17, |
| 12582 | /* 45586*/ OPC_MorphNodeTo1, TARGET_VAL(R600::TEX_LDPTR), 0, |
| 12583 | MVT::v4f32, 18/*#Ops*/, 0, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, |
| 12584 | // Src: (TEXTURE_FETCH:{ *:[v4f32] } 10:{ *:[i32] }, v4i32:{ *:[v4i32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) - Complexity = 59 |
| 12585 | // Dst: (TEX_LDPTR:{ *:[v4f32] } R600_Reg128:{ *:[v4i32] }:$SRC_GPR, (imm:{ *:[i32] }):$srcx, (imm:{ *:[i32] }):$srcy, (imm:{ *:[i32] }):$srcz, (imm:{ *:[i32] }):$srcw, (imm:{ *:[i32] }):$offsetx, (imm:{ *:[i32] }):$offsety, (imm:{ *:[i32] }):$offsetz, (imm:{ *:[i32] }):$DST_SEL_X, (imm:{ *:[i32] }):$DST_SEL_Y, (imm:{ *:[i32] }):$DST_SEL_Z, (imm:{ *:[i32] }):$DST_SEL_W, (imm:{ *:[i32] }):$RESOURCE_ID, (imm:{ *:[i32] }):$SAMPLER_ID, (imm:{ *:[i32] }):$COORD_TYPE_X, (imm:{ *:[i32] }):$COORD_TYPE_Y, (imm:{ *:[i32] }):$COORD_TYPE_Z, (imm:{ *:[i32] }):$COORD_TYPE_W) |
| 12586 | /* 45610*/ 0, /*End of Scope*/ |
| 12587 | /* 45611*/ 0, // EndSwitchOpcode |
| 12588 | 0 |
| 12589 | }; // Total Array size is 45613 bytes |
| 12590 | |
| 12591 | // Opcode Histogram: |
| 12592 | // #OPC_Scope = 147 |
| 12593 | // #OPC_RecordNode = 145 |
| 12594 | // #OPC_RecordChild = 422 |
| 12595 | // #OPC_RecordMemRef = 14 |
| 12596 | // #OPC_CaptureGlueInput = 1 |
| 12597 | // #OPC_MoveChild = 288 |
| 12598 | // #OPC_MoveParent = 396 |
| 12599 | // #OPC_CheckSame = 0 |
| 12600 | // #OPC_CheckChildSame = 90 |
| 12601 | // #OPC_CheckPatternPredicate = 402 |
| 12602 | // #OPC_CheckPredicate = 115 |
| 12603 | // #OPC_CheckOpcode = 277 |
| 12604 | // #OPC_SwitchOpcode = 5 |
| 12605 | // #OPC_CheckType = 434 |
| 12606 | // #OPC_SwitchType = 16 |
| 12607 | // #OPC_CheckChildType = 105 |
| 12608 | // #OPC_CheckInteger = 0 |
| 12609 | // #OPC_CheckChildInteger = 92 |
| 12610 | // #OPC_CheckCondCode = 42 |
| 12611 | // #OPC_CheckChild2CondCode = 0 |
| 12612 | // #OPC_CheckValueType = 3 |
| 12613 | // #OPC_CheckComplexPat = 36 |
| 12614 | // #OPC_CheckAndImm = 0 |
| 12615 | // #OPC_CheckOrImm = 0 |
| 12616 | // #OPC_CheckImmAllOnesV = 0 |
| 12617 | // #OPC_CheckImmAllZerosV = 0 |
| 12618 | // #OPC_CheckFoldableChainNode = 0 |
| 12619 | // #OPC_EmitInteger = 5327 |
| 12620 | // #OPC_EmitStringInteger = 383 |
| 12621 | // #OPC_EmitRegister = 385 |
| 12622 | // #OPC_EmitConvertToTarget = 220 |
| 12623 | // #OPC_EmitMergeInputChains = 94 |
| 12624 | // #OPC_EmitCopyToReg = 0 |
| 12625 | // #OPC_EmitNode = 428 |
| 12626 | // #OPC_EmitNodeXForm = 1 |
| 12627 | // #OPC_CompleteMatch = 7 |
| 12628 | // #OPC_MorphNodeTo = 408 |
| 12629 | |
| 12630 | #undef TARGET_VAL |
| 12631 | SelectCodeCommon(N, MatcherTable,sizeof(MatcherTable)); |
| 12632 | } |
| 12633 | #endif // GET_DAGISEL_BODY |
| 12634 | |
| 12635 | #ifdef GET_DAGISEL_DECL |
| 12636 | bool CheckPatternPredicate(unsigned PredNo) const override; |
| 12637 | #endif |
| 12638 | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
| 12639 | bool DAGISEL_CLASS_COLONCOLON CheckPatternPredicate(unsigned PredNo) const |
| 12640 | #if DAGISEL_INLINE |
| 12641 | override |
| 12642 | #endif |
| 12643 | { |
| 12644 | switch (PredNo) { |
| 12645 | default: llvm_unreachable("Invalid predicate in table?" ); |
| 12646 | case 0: return (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS); |
| 12647 | case 1: return (Subtarget->getGeneration() <= AMDGPUSubtarget::R700); |
| 12648 | case 2: return (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS); |
| 12649 | case 3: return (Subtarget->hasCaymanISA()); |
| 12650 | case 4: return (Subtarget->getGeneration() >= AMDGPUSubtarget::EVERGREEN && !Subtarget->hasCaymanISA()); |
| 12651 | case 5: return (Subtarget->getGeneration() == AMDGPUSubtarget::R700); |
| 12652 | case 6: return (Subtarget->hasFMA()) && (Subtarget->getGeneration() == AMDGPUSubtarget::EVERGREEN ||Subtarget->getGeneration() == AMDGPUSubtarget::NORTHERN_ISLANDS); |
| 12653 | } |
| 12654 | } |
| 12655 | #endif // GET_DAGISEL_BODY |
| 12656 | |
| 12657 | #ifdef GET_DAGISEL_DECL |
| 12658 | bool CheckNodePredicate(SDNode *Node, unsigned PredNo) const override; |
| 12659 | #endif |
| 12660 | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
| 12661 | bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const |
| 12662 | #if DAGISEL_INLINE |
| 12663 | override |
| 12664 | #endif |
| 12665 | { |
| 12666 | switch (PredNo) { |
| 12667 | default: llvm_unreachable("Invalid predicate in table?" ); |
| 12668 | case 0: { |
| 12669 | // Predicate_shl_oneuse |
| 12670 | // Predicate_add_oneuse |
| 12671 | // Predicate_xor_oneuse |
| 12672 | // Predicate_srl_oneuse |
| 12673 | SDNode *N = Node; |
| 12674 | (void)N; |
| 12675 | return N->hasOneUse(); |
| 12676 | } |
| 12677 | case 1: { |
| 12678 | // Predicate_IMMZeroBasedBitfieldMask |
| 12679 | int64_t Imm = cast<ConstantSDNode>(Node)->getSExtValue(); |
| 12680 | |
| 12681 | return isMask_32(Imm); |
| 12682 | |
| 12683 | } |
| 12684 | case 2: { |
| 12685 | // Predicate_FP_ONE |
| 12686 | auto *N = cast<ConstantFPSDNode>(Node); |
| 12687 | (void)N; |
| 12688 | return N->isExactlyValue(1.0); |
| 12689 | } |
| 12690 | case 3: { |
| 12691 | // Predicate_FP_ZERO |
| 12692 | auto *N = cast<ConstantFPSDNode>(Node); |
| 12693 | (void)N; |
| 12694 | return N->getValueAPF().isZero(); |
| 12695 | } |
| 12696 | case 4: { |
| 12697 | // Predicate_unindexedload |
| 12698 | SDNode *N = Node; |
| 12699 | (void)N; |
| 12700 | if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false; |
| 12701 | return true; |
| 12702 | |
| 12703 | } |
| 12704 | case 5: { |
| 12705 | // Predicate_load_private |
| 12706 | SDNode *N = Node; |
| 12707 | (void)N; |
| 12708 | unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace(); |
| 12709 | if (AddrSpace != 5) |
| 12710 | return false; |
| 12711 | if (cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD) return false; |
| 12712 | return true; |
| 12713 | |
| 12714 | } |
| 12715 | case 6: { |
| 12716 | // Predicate_az_extload |
| 12717 | SDNode *N = Node; |
| 12718 | (void)N; |
| 12719 | |
| 12720 | LoadSDNode *L = cast<LoadSDNode>(N); |
| 12721 | return L->getExtensionType() == ISD::ZEXTLOAD || |
| 12722 | L->getExtensionType() == ISD::EXTLOAD; |
| 12723 | |
| 12724 | } |
| 12725 | case 7: { |
| 12726 | // Predicate_az_extloadi8 |
| 12727 | SDNode *N = Node; |
| 12728 | (void)N; |
| 12729 | |
| 12730 | return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8; |
| 12731 | |
| 12732 | } |
| 12733 | case 8: { |
| 12734 | // Predicate_vtx_id3_az_extloadi8 |
| 12735 | // Predicate_vtx_id3_az_extloadi16 |
| 12736 | // Predicate_vtx_id3_load |
| 12737 | SDNode *N = Node; |
| 12738 | (void)N; |
| 12739 | return isConstantLoad(cast<LoadSDNode>(N), 0) || |
| 12740 | (cast<LoadSDNode>(N)->getAddressSpace() == AMDGPUAS::PARAM_I_ADDRESS); |
| 12741 | } |
| 12742 | case 9: { |
| 12743 | // Predicate_az_extloadi16 |
| 12744 | SDNode *N = Node; |
| 12745 | (void)N; |
| 12746 | |
| 12747 | return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16; |
| 12748 | |
| 12749 | } |
| 12750 | case 10: { |
| 12751 | // Predicate_load |
| 12752 | SDNode *N = Node; |
| 12753 | (void)N; |
| 12754 | if (cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD) return false; |
| 12755 | return true; |
| 12756 | |
| 12757 | } |
| 12758 | case 11: { |
| 12759 | // Predicate_vtx_id2_az_extloadi8 |
| 12760 | // Predicate_vtx_id2_az_extloadi16 |
| 12761 | // Predicate_vtx_id2_load |
| 12762 | SDNode *N = Node; |
| 12763 | (void)N; |
| 12764 | |
| 12765 | const MemSDNode *LD = cast<MemSDNode>(N); |
| 12766 | return LD->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS && |
| 12767 | isa<GlobalValue>(getUnderlyingObject( |
| 12768 | LD->getMemOperand()->getValue())); |
| 12769 | |
| 12770 | } |
| 12771 | case 12: { |
| 12772 | // Predicate_vtx_id1_az_extloadi8 |
| 12773 | // Predicate_vtx_id1_az_extloadi16 |
| 12774 | // Predicate_vtx_id1_load |
| 12775 | SDNode *N = Node; |
| 12776 | (void)N; |
| 12777 | |
| 12778 | const MemSDNode *LD = cast<MemSDNode>(N); |
| 12779 | return LD->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS || |
| 12780 | (LD->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS && |
| 12781 | !isa<GlobalValue>(getUnderlyingObject( |
| 12782 | LD->getMemOperand()->getValue()))); |
| 12783 | |
| 12784 | } |
| 12785 | case 13: { |
| 12786 | // Predicate_load_local |
| 12787 | SDNode *N = Node; |
| 12788 | (void)N; |
| 12789 | unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace(); |
| 12790 | if (AddrSpace != 3) |
| 12791 | return false; |
| 12792 | if (cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD) return false; |
| 12793 | return true; |
| 12794 | |
| 12795 | } |
| 12796 | case 14: { |
| 12797 | // Predicate_sextload |
| 12798 | SDNode *N = Node; |
| 12799 | (void)N; |
| 12800 | if (cast<LoadSDNode>(N)->getExtensionType() != ISD::SEXTLOAD) return false; |
| 12801 | return true; |
| 12802 | |
| 12803 | } |
| 12804 | case 15: { |
| 12805 | // Predicate_sextloadi8_local |
| 12806 | // Predicate_truncstorei8_local |
| 12807 | SDNode *N = Node; |
| 12808 | (void)N; |
| 12809 | unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace(); |
| 12810 | if (AddrSpace != 3) |
| 12811 | return false; |
| 12812 | if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i8) return false; |
| 12813 | return true; |
| 12814 | |
| 12815 | } |
| 12816 | case 16: { |
| 12817 | // Predicate_sextloadi16_local |
| 12818 | // Predicate_truncstorei16_local |
| 12819 | SDNode *N = Node; |
| 12820 | (void)N; |
| 12821 | unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace(); |
| 12822 | if (AddrSpace != 3) |
| 12823 | return false; |
| 12824 | if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i16) return false; |
| 12825 | return true; |
| 12826 | |
| 12827 | } |
| 12828 | case 17: { |
| 12829 | // Predicate_unindexedstore |
| 12830 | SDNode *N = Node; |
| 12831 | (void)N; |
| 12832 | if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false; |
| 12833 | return true; |
| 12834 | |
| 12835 | } |
| 12836 | case 18: { |
| 12837 | // Predicate_store_private |
| 12838 | SDNode *N = Node; |
| 12839 | (void)N; |
| 12840 | unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace(); |
| 12841 | if (AddrSpace != 5) |
| 12842 | return false; |
| 12843 | if (cast<StoreSDNode>(N)->isTruncatingStore()) return false; |
| 12844 | return true; |
| 12845 | |
| 12846 | } |
| 12847 | case 19: { |
| 12848 | // Predicate_store_local |
| 12849 | SDNode *N = Node; |
| 12850 | (void)N; |
| 12851 | unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace(); |
| 12852 | if (AddrSpace != 3) |
| 12853 | return false; |
| 12854 | if (cast<StoreSDNode>(N)->isTruncatingStore()) return false; |
| 12855 | return true; |
| 12856 | |
| 12857 | } |
| 12858 | case 20: { |
| 12859 | // Predicate_truncstore |
| 12860 | SDNode *N = Node; |
| 12861 | (void)N; |
| 12862 | if (!cast<StoreSDNode>(N)->isTruncatingStore()) return false; |
| 12863 | return true; |
| 12864 | |
| 12865 | } |
| 12866 | case 21: { |
| 12867 | // Predicate_store_global |
| 12868 | SDNode *N = Node; |
| 12869 | (void)N; |
| 12870 | unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace(); |
| 12871 | if (AddrSpace != 1) |
| 12872 | return false; |
| 12873 | if (cast<StoreSDNode>(N)->isTruncatingStore()) return false; |
| 12874 | return true; |
| 12875 | |
| 12876 | } |
| 12877 | case 22: { |
| 12878 | // Predicate_atomic_load_add_global_noret_32 |
| 12879 | // Predicate_atomic_load_sub_global_noret_32 |
| 12880 | // Predicate_atomic_swap_global_noret_32 |
| 12881 | // Predicate_atomic_load_min_global_noret_32 |
| 12882 | // Predicate_atomic_load_umin_global_noret_32 |
| 12883 | // Predicate_atomic_load_max_global_noret_32 |
| 12884 | // Predicate_atomic_load_umax_global_noret_32 |
| 12885 | // Predicate_atomic_load_and_global_noret_32 |
| 12886 | // Predicate_atomic_load_or_global_noret_32 |
| 12887 | // Predicate_atomic_load_xor_global_noret_32 |
| 12888 | SDNode *N = Node; |
| 12889 | (void)N; |
| 12890 | unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace(); |
| 12891 | if (AddrSpace != 1 && AddrSpace != 4) |
| 12892 | return false; |
| 12893 | if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i32) return false; |
| 12894 | return (SDValue(N, 0).use_empty()); |
| 12895 | } |
| 12896 | case 23: { |
| 12897 | // Predicate_atomic_load_add_local_32 |
| 12898 | // Predicate_atomic_load_sub_local_32 |
| 12899 | // Predicate_atomic_swap_local_32 |
| 12900 | // Predicate_atomic_load_min_local_32 |
| 12901 | // Predicate_atomic_load_umin_local_32 |
| 12902 | // Predicate_atomic_load_max_local_32 |
| 12903 | // Predicate_atomic_load_umax_local_32 |
| 12904 | // Predicate_atomic_load_and_local_32 |
| 12905 | // Predicate_atomic_load_or_local_32 |
| 12906 | // Predicate_atomic_load_xor_local_32 |
| 12907 | // Predicate_atomic_cmp_swap_local_32 |
| 12908 | SDNode *N = Node; |
| 12909 | (void)N; |
| 12910 | unsigned AddrSpace = cast<MemSDNode>(N)->getAddressSpace(); |
| 12911 | if (AddrSpace != 3) |
| 12912 | return false; |
| 12913 | if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i32) return false; |
| 12914 | return true; |
| 12915 | |
| 12916 | } |
| 12917 | case 24: { |
| 12918 | // Predicate_mskor_global |
| 12919 | SDNode *N = Node; |
| 12920 | (void)N; |
| 12921 | |
| 12922 | return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS; |
| 12923 | |
| 12924 | } |
| 12925 | case 25: { |
| 12926 | // Predicate_atomic_cmp_swap_global_noret |
| 12927 | SDNode *N = Node; |
| 12928 | (void)N; |
| 12929 | return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (SDValue(N, 0).use_empty()); |
| 12930 | } |
| 12931 | } |
| 12932 | } |
| 12933 | #endif // GET_DAGISEL_BODY |
| 12934 | |
| 12935 | #ifdef GET_DAGISEL_DECL |
| 12936 | bool CheckComplexPattern(SDNode *Root, SDNode *Parent, |
| 12937 | SDValue N, unsigned PatternNo, |
| 12938 | SmallVectorImpl<std::pair<SDValue, SDNode *>> &Result) override; |
| 12939 | #endif |
| 12940 | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
| 12941 | bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent, |
| 12942 | SDValue N, unsigned PatternNo, |
| 12943 | SmallVectorImpl<std::pair<SDValue, SDNode *>> &Result) |
| 12944 | #if DAGISEL_INLINE |
| 12945 | override |
| 12946 | #endif |
| 12947 | { |
| 12948 | unsigned NextRes = Result.size(); |
| 12949 | switch (PatternNo) { |
| 12950 | default: llvm_unreachable("Invalid pattern # in table?" ); |
| 12951 | case 0: |
| 12952 | Result.resize(NextRes+2); |
| 12953 | return SelectADDRIndirect(N, Result[NextRes+0].first, Result[NextRes+1].first); |
| 12954 | case 1: |
| 12955 | Result.resize(NextRes+2); |
| 12956 | return SelectADDRVTX_READ(N, Result[NextRes+0].first, Result[NextRes+1].first); |
| 12957 | case 2: |
| 12958 | Result.resize(NextRes+1); |
| 12959 | return SelectGlobalValueConstantOffset(N, Result[NextRes+0].first); |
| 12960 | case 3: |
| 12961 | Result.resize(NextRes+2); |
| 12962 | return SelectGlobalValueVariableOffset(N, Result[NextRes+0].first, Result[NextRes+1].first); |
| 12963 | } |
| 12964 | } |
| 12965 | #endif // GET_DAGISEL_BODY |
| 12966 | |
| 12967 | #ifdef GET_DAGISEL_DECL |
| 12968 | SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo) override; |
| 12969 | #endif |
| 12970 | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
| 12971 | SDValue DAGISEL_CLASS_COLONCOLON RunSDNodeXForm(SDValue V, unsigned XFormNo) |
| 12972 | #if DAGISEL_INLINE |
| 12973 | override |
| 12974 | #endif |
| 12975 | { |
| 12976 | switch (XFormNo) { |
| 12977 | default: llvm_unreachable("Invalid xform # in table?" ); |
| 12978 | case 0: { // IMMPopCount |
| 12979 | ConstantSDNode *N = cast<ConstantSDNode>(V.getNode()); |
| 12980 | |
| 12981 | return CurDAG->getTargetConstant(countPopulation(N->getZExtValue()), SDLoc(N), |
| 12982 | MVT::i32); |
| 12983 | |
| 12984 | } |
| 12985 | } |
| 12986 | } |
| 12987 | #endif // GET_DAGISEL_BODY |
| 12988 | |
| 12989 | |
| 12990 | #ifdef DAGISEL_INLINE |
| 12991 | #undef DAGISEL_INLINE |
| 12992 | #endif |
| 12993 | #ifdef DAGISEL_CLASS_COLONCOLON |
| 12994 | #undef DAGISEL_CLASS_COLONCOLON |
| 12995 | #endif |
| 12996 | #ifdef GET_DAGISEL_DECL |
| 12997 | #undef GET_DAGISEL_DECL |
| 12998 | #endif |
| 12999 | #ifdef GET_DAGISEL_BODY |
| 13000 | #undef GET_DAGISEL_BODY |
| 13001 | #endif |
| 13002 | |